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28035 HRPWM 汇编

2017-08-14 分类：C2000™ 32位实时 MCU 阅读(289)

求大神解释 解释：

_Epwm1_Isr:
; entry into Zero event Isr 进入零中断事件
;automatic context save :
;ST0,T,AL,AH,PL,PH,AR0,AR1,ST1,DP,IER,DBGSTAT,return address
;context save ASP
MOVL *SP++,XAR7
SPM 0 NOP *,ARP7

CLRC PAGE0,OVM
SETC SXM

MOVW DP,#_IsrVars + _CPU_DP
MOVL XAR7,#_g_st_RunFlag ;g_st_RunFlag.bit0 = bModelONCtl=1:enable run; 0=disable run
TBIT *,#00
BF CHECKEND,NTC
TBIT *,#07 ;Check if ModelRunState>=3
BF DCPWMON,TC ; >=4(0x100)
TBIT *,#06 ; <4 (0x100)
BF CHECKEND,NTC ; <2 (0x010)
TBIT *,#05 ; >=2 (0x010)
BF CHECKEND,NTC ; =2
DCPWMON: ; >=3 softstart or normal
MOVW DP,#_IsrVars + _CPU_DP
MOV AL,@_u16FlagFsFinal ;
CMP AL,#6
BF PWMUPDT,NEQ
MOVL XAR7,#_EPwm1Regs + _AQCSFRC
MOV *XAR7,#0x05 ; 0x0101 fprce low
MOVL XAR7,#_EPwm2Regs + _AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm3Regs + _AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm4Regs + _AQCSFRC
MOV *XAR7,#0x05
BF CHECKEND,UNC

PWMUPDT:
; MOVW DP,#_IsrVars + _CPU_DP
; MOV AL,@_u16FlagFsOld
; CMP AL,#6
; BF PWMUPDT1,NEQ
MOVL XAR7,#_EPwm1Regs + _AQCSFRC ; 0x0000:no effect
AND *,#0x00
MOVL XAR7,#_EPwm2Regs + _AQCSFRC
AND *,#0x00
MOVL XAR7,#_EPwm3Regs + _AQCSFRC
AND *,#0x00
MOVL XAR7,#_EPwm4Regs + _AQCSFRC
AND *,#0x00
//频率
PWMUPDT1: MOVW DP,#_IsrVars + _CPU_DP
MOVL ACC,@_lDcdcPWMTs MOVL XAR7,#_EPwm1Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm2Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm3Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm4Regs + _TBPRD
MOV *++,AH
MOV *,AL
//占空比
MOVL ACC,@_lManuDuty
MOVL XAR7,#_EPwm1Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcPWMTs
SUBL ACC,@_lManuDuty
MOVL XAR7,#_EPwm2Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcDuty
MOVL XAR7,#_EPwm3Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcPWMTs
SUBL ACC,@_lDcdcDuty
MOVL XAR7,#_EPwm4Regs + _CMPA
MOV *–,AH
MOV *,AL

CHECKEND:
;MOVW DP,#_IsrVars + _CPU_DP
;MOV AL,@_u16FlagFsFinal
;MOV @_u16FlagFsOld,AL
MOVL XAR7,#_EPwm1Regs+_ETCLR OR *,#0x0001 ; clear the event trigger flag

MOVL XAR7,#_EPwm1Regs+_ETSEL AND *,#0xFFF7 ; bit3=0, disable the PWM1.INT

MOVL XAR7,#_EPwm1Regs+_ETPS AND *,#0xFFFE ; INTPRD=0x10, Generate interrupt on second event
MOVL XAR7,#_PieCtrlRegs + _PIEACK
MOV *,#4 MOVL XAR7,*–SP
NASP IRET;—————————————————–
; _Epwm1_Isr end
;—————————————————–
.def _epwm1_tzint_isr
.sect "IsrRamfuncs"
.global _epwm1_tzint_isr
;******************************************************_epwm1_tzint_isr: ;automatic context save :
;ST0,T,AL,AH,PL,PH,AR0,AR1,ST1,DP,IER,DBGSTAT,return address
;context save
ASP
MOVL *SP++,XAR7
SPM 0
MOVL *SP++,XT

MOVL XAR7,#_EPwm1Regs+_AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm2Regs+_AQCSFRC
MOV *XAR7,#0x05 MOVL XAR7,#_EPwm5Regs+_AQCSFRC
MOV *XAR7,#0x05 MOVL XAR7,#_EPwm6Regs+_AQCSFRC
MOV *XAR7,#0x05

MOVW DP,#_PieCtrlRegs + _PIEIER2 AND @_PieCtrlRegs + _PIEIER2,#0xFFFE MOVW DP,#_PieCtrlRegs + _PIEACK
MOV @_PieCtrlRegs + _PIEACK,#2

MOVL XT,*–SP
MOVL XAR7,*–SP
NASP
IRET

Seven Han：

请问怎么没用C写呢？

http://www.ti.com.cn/cn/lit/ug/spru430e/spru430e.pdf第6章C28x汇编指令

求大神解释 解释：

_Epwm1_Isr:
; entry into Zero event Isr 进入零中断事件
;automatic context save :
;ST0,T,AL,AH,PL,PH,AR0,AR1,ST1,DP,IER,DBGSTAT,return address
;context save ASP
MOVL *SP++,XAR7
SPM 0 NOP *,ARP7

CLRC PAGE0,OVM
SETC SXM

MOVW DP,#_IsrVars + _CPU_DP
MOVL XAR7,#_g_st_RunFlag ;g_st_RunFlag.bit0 = bModelONCtl=1:enable run; 0=disable run
TBIT *,#00
BF CHECKEND,NTC
TBIT *,#07 ;Check if ModelRunState>=3
BF DCPWMON,TC ; >=4(0x100)
TBIT *,#06 ; <4 (0x100)
BF CHECKEND,NTC ; <2 (0x010)
TBIT *,#05 ; >=2 (0x010)
BF CHECKEND,NTC ; =2
DCPWMON: ; >=3 softstart or normal
MOVW DP,#_IsrVars + _CPU_DP
MOV AL,@_u16FlagFsFinal ;
CMP AL,#6
BF PWMUPDT,NEQ
MOVL XAR7,#_EPwm1Regs + _AQCSFRC
MOV *XAR7,#0x05 ; 0x0101 fprce low
MOVL XAR7,#_EPwm2Regs + _AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm3Regs + _AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm4Regs + _AQCSFRC
MOV *XAR7,#0x05
BF CHECKEND,UNC

PWMUPDT:
; MOVW DP,#_IsrVars + _CPU_DP
; MOV AL,@_u16FlagFsOld
; CMP AL,#6
; BF PWMUPDT1,NEQ
MOVL XAR7,#_EPwm1Regs + _AQCSFRC ; 0x0000:no effect
AND *,#0x00
MOVL XAR7,#_EPwm2Regs + _AQCSFRC
AND *,#0x00
MOVL XAR7,#_EPwm3Regs + _AQCSFRC
AND *,#0x00
MOVL XAR7,#_EPwm4Regs + _AQCSFRC
AND *,#0x00
//频率
PWMUPDT1: MOVW DP,#_IsrVars + _CPU_DP
MOVL ACC,@_lDcdcPWMTs MOVL XAR7,#_EPwm1Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm2Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm3Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm4Regs + _TBPRD
MOV *++,AH
MOV *,AL
//占空比
MOVL ACC,@_lManuDuty
MOVL XAR7,#_EPwm1Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcPWMTs
SUBL ACC,@_lManuDuty
MOVL XAR7,#_EPwm2Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcDuty
MOVL XAR7,#_EPwm3Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcPWMTs
SUBL ACC,@_lDcdcDuty
MOVL XAR7,#_EPwm4Regs + _CMPA
MOV *–,AH
MOV *,AL

CHECKEND:
;MOVW DP,#_IsrVars + _CPU_DP
;MOV AL,@_u16FlagFsFinal
;MOV @_u16FlagFsOld,AL
MOVL XAR7,#_EPwm1Regs+_ETCLR OR *,#0x0001 ; clear the event trigger flag

MOVL XAR7,#_EPwm1Regs+_ETSEL AND *,#0xFFF7 ; bit3=0, disable the PWM1.INT

MOVL XAR7,#_EPwm1Regs+_ETPS AND *,#0xFFFE ; INTPRD=0x10, Generate interrupt on second event
MOVL XAR7,#_PieCtrlRegs + _PIEACK
MOV *,#4 MOVL XAR7,*–SP
NASP IRET;—————————————————–
; _Epwm1_Isr end
;—————————————————–
.def _epwm1_tzint_isr
.sect "IsrRamfuncs"
.global _epwm1_tzint_isr
;******************************************************_epwm1_tzint_isr: ;automatic context save :
;ST0,T,AL,AH,PL,PH,AR0,AR1,ST1,DP,IER,DBGSTAT,return address
;context save
ASP
MOVL *SP++,XAR7
SPM 0
MOVL *SP++,XT

MOVL XAR7,#_EPwm1Regs+_AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm2Regs+_AQCSFRC
MOV *XAR7,#0x05 MOVL XAR7,#_EPwm5Regs+_AQCSFRC
MOV *XAR7,#0x05 MOVL XAR7,#_EPwm6Regs+_AQCSFRC
MOV *XAR7,#0x05

MOVW DP,#_PieCtrlRegs + _PIEIER2 AND @_PieCtrlRegs + _PIEIER2,#0xFFFE MOVW DP,#_PieCtrlRegs + _PIEACK
MOV @_PieCtrlRegs + _PIEACK,#2

MOVL XT,*–SP
MOVL XAR7,*–SP
NASP
IRET

bamboo wang：

回复 Seven Han:

老大 没，，我这小弟没办法。。

求大神解释 解释：

_Epwm1_Isr:
; entry into Zero event Isr 进入零中断事件
;automatic context save :
;ST0,T,AL,AH,PL,PH,AR0,AR1,ST1,DP,IER,DBGSTAT,return address
;context save ASP
MOVL *SP++,XAR7
SPM 0 NOP *,ARP7

CLRC PAGE0,OVM
SETC SXM

MOVW DP,#_IsrVars + _CPU_DP
MOVL XAR7,#_g_st_RunFlag ;g_st_RunFlag.bit0 = bModelONCtl=1:enable run; 0=disable run
TBIT *,#00
BF CHECKEND,NTC
TBIT *,#07 ;Check if ModelRunState>=3
BF DCPWMON,TC ; >=4(0x100)
TBIT *,#06 ; <4 (0x100)
BF CHECKEND,NTC ; <2 (0x010)
TBIT *,#05 ; >=2 (0x010)
BF CHECKEND,NTC ; =2
DCPWMON: ; >=3 softstart or normal
MOVW DP,#_IsrVars + _CPU_DP
MOV AL,@_u16FlagFsFinal ;
CMP AL,#6
BF PWMUPDT,NEQ
MOVL XAR7,#_EPwm1Regs + _AQCSFRC
MOV *XAR7,#0x05 ; 0x0101 fprce low
MOVL XAR7,#_EPwm2Regs + _AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm3Regs + _AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm4Regs + _AQCSFRC
MOV *XAR7,#0x05
BF CHECKEND,UNC

PWMUPDT:
; MOVW DP,#_IsrVars + _CPU_DP
; MOV AL,@_u16FlagFsOld
; CMP AL,#6
; BF PWMUPDT1,NEQ
MOVL XAR7,#_EPwm1Regs + _AQCSFRC ; 0x0000:no effect
AND *,#0x00
MOVL XAR7,#_EPwm2Regs + _AQCSFRC
AND *,#0x00
MOVL XAR7,#_EPwm3Regs + _AQCSFRC
AND *,#0x00
MOVL XAR7,#_EPwm4Regs + _AQCSFRC
AND *,#0x00
//频率
PWMUPDT1: MOVW DP,#_IsrVars + _CPU_DP
MOVL ACC,@_lDcdcPWMTs MOVL XAR7,#_EPwm1Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm2Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm3Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm4Regs + _TBPRD
MOV *++,AH
MOV *,AL
//占空比
MOVL ACC,@_lManuDuty
MOVL XAR7,#_EPwm1Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcPWMTs
SUBL ACC,@_lManuDuty
MOVL XAR7,#_EPwm2Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcDuty
MOVL XAR7,#_EPwm3Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcPWMTs
SUBL ACC,@_lDcdcDuty
MOVL XAR7,#_EPwm4Regs + _CMPA
MOV *–,AH
MOV *,AL

CHECKEND:
;MOVW DP,#_IsrVars + _CPU_DP
;MOV AL,@_u16FlagFsFinal
;MOV @_u16FlagFsOld,AL
MOVL XAR7,#_EPwm1Regs+_ETCLR OR *,#0x0001 ; clear the event trigger flag

MOVL XAR7,#_EPwm1Regs+_ETSEL AND *,#0xFFF7 ; bit3=0, disable the PWM1.INT

MOVL XAR7,#_EPwm1Regs+_ETPS AND *,#0xFFFE ; INTPRD=0x10, Generate interrupt on second event
MOVL XAR7,#_PieCtrlRegs + _PIEACK
MOV *,#4 MOVL XAR7,*–SP
NASP IRET;—————————————————–
; _Epwm1_Isr end
;—————————————————–
.def _epwm1_tzint_isr
.sect "IsrRamfuncs"
.global _epwm1_tzint_isr
;******************************************************_epwm1_tzint_isr: ;automatic context save :
;ST0,T,AL,AH,PL,PH,AR0,AR1,ST1,DP,IER,DBGSTAT,return address
;context save
ASP
MOVL *SP++,XAR7
SPM 0
MOVL *SP++,XT

MOVL XAR7,#_EPwm1Regs+_AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm2Regs+_AQCSFRC
MOV *XAR7,#0x05 MOVL XAR7,#_EPwm5Regs+_AQCSFRC
MOV *XAR7,#0x05 MOVL XAR7,#_EPwm6Regs+_AQCSFRC
MOV *XAR7,#0x05

MOVW DP,#_PieCtrlRegs + _PIEIER2 AND @_PieCtrlRegs + _PIEIER2,#0xFFFE MOVW DP,#_PieCtrlRegs + _PIEACK
MOV @_PieCtrlRegs + _PIEACK,#2

MOVL XT,*–SP
MOVL XAR7,*–SP
NASP
IRET

bamboo wang：

回复 Seven Han:

你这连接 打不开

求大神解释 解释：

_Epwm1_Isr:
; entry into Zero event Isr 进入零中断事件
;automatic context save :
;ST0,T,AL,AH,PL,PH,AR0,AR1,ST1,DP,IER,DBGSTAT,return address
;context save ASP
MOVL *SP++,XAR7
SPM 0 NOP *,ARP7

CLRC PAGE0,OVM
SETC SXM

MOVW DP,#_IsrVars + _CPU_DP
MOVL XAR7,#_g_st_RunFlag ;g_st_RunFlag.bit0 = bModelONCtl=1:enable run; 0=disable run
TBIT *,#00
BF CHECKEND,NTC
TBIT *,#07 ;Check if ModelRunState>=3
BF DCPWMON,TC ; >=4(0x100)
TBIT *,#06 ; <4 (0x100)
BF CHECKEND,NTC ; <2 (0x010)
TBIT *,#05 ; >=2 (0x010)
BF CHECKEND,NTC ; =2
DCPWMON: ; >=3 softstart or normal
MOVW DP,#_IsrVars + _CPU_DP
MOV AL,@_u16FlagFsFinal ;
CMP AL,#6
BF PWMUPDT,NEQ
MOVL XAR7,#_EPwm1Regs + _AQCSFRC
MOV *XAR7,#0x05 ; 0x0101 fprce low
MOVL XAR7,#_EPwm2Regs + _AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm3Regs + _AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm4Regs + _AQCSFRC
MOV *XAR7,#0x05
BF CHECKEND,UNC

PWMUPDT:
; MOVW DP,#_IsrVars + _CPU_DP
; MOV AL,@_u16FlagFsOld
; CMP AL,#6
; BF PWMUPDT1,NEQ
MOVL XAR7,#_EPwm1Regs + _AQCSFRC ; 0x0000:no effect
AND *,#0x00
MOVL XAR7,#_EPwm2Regs + _AQCSFRC
AND *,#0x00
MOVL XAR7,#_EPwm3Regs + _AQCSFRC
AND *,#0x00
MOVL XAR7,#_EPwm4Regs + _AQCSFRC
AND *,#0x00
//频率
PWMUPDT1: MOVW DP,#_IsrVars + _CPU_DP
MOVL ACC,@_lDcdcPWMTs MOVL XAR7,#_EPwm1Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm2Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm3Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm4Regs + _TBPRD
MOV *++,AH
MOV *,AL
//占空比
MOVL ACC,@_lManuDuty
MOVL XAR7,#_EPwm1Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcPWMTs
SUBL ACC,@_lManuDuty
MOVL XAR7,#_EPwm2Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcDuty
MOVL XAR7,#_EPwm3Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcPWMTs
SUBL ACC,@_lDcdcDuty
MOVL XAR7,#_EPwm4Regs + _CMPA
MOV *–,AH
MOV *,AL

CHECKEND:
;MOVW DP,#_IsrVars + _CPU_DP
;MOV AL,@_u16FlagFsFinal
;MOV @_u16FlagFsOld,AL
MOVL XAR7,#_EPwm1Regs+_ETCLR OR *,#0x0001 ; clear the event trigger flag

MOVL XAR7,#_EPwm1Regs+_ETSEL AND *,#0xFFF7 ; bit3=0, disable the PWM1.INT

MOVL XAR7,#_EPwm1Regs+_ETPS AND *,#0xFFFE ; INTPRD=0x10, Generate interrupt on second event
MOVL XAR7,#_PieCtrlRegs + _PIEACK
MOV *,#4 MOVL XAR7,*–SP
NASP IRET;—————————————————–
; _Epwm1_Isr end
;—————————————————–
.def _epwm1_tzint_isr
.sect "IsrRamfuncs"
.global _epwm1_tzint_isr
;******************************************************_epwm1_tzint_isr: ;automatic context save :
;ST0,T,AL,AH,PL,PH,AR0,AR1,ST1,DP,IER,DBGSTAT,return address
;context save
ASP
MOVL *SP++,XAR7
SPM 0
MOVL *SP++,XT

MOVL XAR7,#_EPwm1Regs+_AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm2Regs+_AQCSFRC
MOV *XAR7,#0x05 MOVL XAR7,#_EPwm5Regs+_AQCSFRC
MOV *XAR7,#0x05 MOVL XAR7,#_EPwm6Regs+_AQCSFRC
MOV *XAR7,#0x05

MOVW DP,#_PieCtrlRegs + _PIEIER2 AND @_PieCtrlRegs + _PIEIER2,#0xFFFE MOVW DP,#_PieCtrlRegs + _PIEACK
MOV @_PieCtrlRegs + _PIEACK,#2

MOVL XT,*–SP
MOVL XAR7,*–SP
NASP
IRET

bamboo wang：

回复 Seven Han:

打不开，，，

求大神解释 解释：

_Epwm1_Isr:
; entry into Zero event Isr 进入零中断事件
;automatic context save :
;ST0,T,AL,AH,PL,PH,AR0,AR1,ST1,DP,IER,DBGSTAT,return address
;context save ASP
MOVL *SP++,XAR7
SPM 0 NOP *,ARP7

CLRC PAGE0,OVM
SETC SXM

MOVW DP,#_IsrVars + _CPU_DP
MOVL XAR7,#_g_st_RunFlag ;g_st_RunFlag.bit0 = bModelONCtl=1:enable run; 0=disable run
TBIT *,#00
BF CHECKEND,NTC
TBIT *,#07 ;Check if ModelRunState>=3
BF DCPWMON,TC ; >=4(0x100)
TBIT *,#06 ; <4 (0x100)
BF CHECKEND,NTC ; <2 (0x010)
TBIT *,#05 ; >=2 (0x010)
BF CHECKEND,NTC ; =2
DCPWMON: ; >=3 softstart or normal
MOVW DP,#_IsrVars + _CPU_DP
MOV AL,@_u16FlagFsFinal ;
CMP AL,#6
BF PWMUPDT,NEQ
MOVL XAR7,#_EPwm1Regs + _AQCSFRC
MOV *XAR7,#0x05 ; 0x0101 fprce low
MOVL XAR7,#_EPwm2Regs + _AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm3Regs + _AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm4Regs + _AQCSFRC
MOV *XAR7,#0x05
BF CHECKEND,UNC

PWMUPDT:
; MOVW DP,#_IsrVars + _CPU_DP
; MOV AL,@_u16FlagFsOld
; CMP AL,#6
; BF PWMUPDT1,NEQ
MOVL XAR7,#_EPwm1Regs + _AQCSFRC ; 0x0000:no effect
AND *,#0x00
MOVL XAR7,#_EPwm2Regs + _AQCSFRC
AND *,#0x00
MOVL XAR7,#_EPwm3Regs + _AQCSFRC
AND *,#0x00
MOVL XAR7,#_EPwm4Regs + _AQCSFRC
AND *,#0x00
//频率
PWMUPDT1: MOVW DP,#_IsrVars + _CPU_DP
MOVL ACC,@_lDcdcPWMTs MOVL XAR7,#_EPwm1Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm2Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm3Regs + _TBPRD
MOV *++,AH
MOV *,AL
MOVL XAR7,#_EPwm4Regs + _TBPRD
MOV *++,AH
MOV *,AL
//占空比
MOVL ACC,@_lManuDuty
MOVL XAR7,#_EPwm1Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcPWMTs
SUBL ACC,@_lManuDuty
MOVL XAR7,#_EPwm2Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcDuty
MOVL XAR7,#_EPwm3Regs + _CMPA
MOV *–,AH
MOV *,AL
MOVL ACC,@_lDcdcPWMTs
SUBL ACC,@_lDcdcDuty
MOVL XAR7,#_EPwm4Regs + _CMPA
MOV *–,AH
MOV *,AL

CHECKEND:
;MOVW DP,#_IsrVars + _CPU_DP
;MOV AL,@_u16FlagFsFinal
;MOV @_u16FlagFsOld,AL
MOVL XAR7,#_EPwm1Regs+_ETCLR OR *,#0x0001 ; clear the event trigger flag

MOVL XAR7,#_EPwm1Regs+_ETSEL AND *,#0xFFF7 ; bit3=0, disable the PWM1.INT

MOVL XAR7,#_EPwm1Regs+_ETPS AND *,#0xFFFE ; INTPRD=0x10, Generate interrupt on second event
MOVL XAR7,#_PieCtrlRegs + _PIEACK
MOV *,#4 MOVL XAR7,*–SP
NASP IRET;—————————————————–
; _Epwm1_Isr end
;—————————————————–
.def _epwm1_tzint_isr
.sect "IsrRamfuncs"
.global _epwm1_tzint_isr
;******************************************************_epwm1_tzint_isr: ;automatic context save :
;ST0,T,AL,AH,PL,PH,AR0,AR1,ST1,DP,IER,DBGSTAT,return address
;context save
ASP
MOVL *SP++,XAR7
SPM 0
MOVL *SP++,XT

MOVL XAR7,#_EPwm1Regs+_AQCSFRC
MOV *XAR7,#0x05
MOVL XAR7,#_EPwm2Regs+_AQCSFRC
MOV *XAR7,#0x05 MOVL XAR7,#_EPwm5Regs+_AQCSFRC
MOV *XAR7,#0x05 MOVL XAR7,#_EPwm6Regs+_AQCSFRC
MOV *XAR7,#0x05

MOVW DP,#_PieCtrlRegs + _PIEIER2 AND @_PieCtrlRegs + _PIEIER2,#0xFFFE MOVW DP,#_PieCtrlRegs + _PIEACK
MOV @_PieCtrlRegs + _PIEACK,#2

MOVL XT,*–SP
MOVL XAR7,*–SP
NASP
IRET

bamboo wang：

回复 Seven Han:

我想问下，所有的汇编指令，为啥前面都加M呢

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