测试的程序使用官方的程序,将主频升至25M,然后循环外部的IO高低电平变化,断开了仿真器,程序直接运行,发现用不了几分钟就跑死了,IO无变化,将N调低,还是会出现跑死现象
Bruce Wei:
楼主你好!
系统是怎么供电的?
试试下面的代码
void Drv_SetVcoreUp (UINT16_T level){ PMMCTL0_H = PMMPW_H; /* Open PMM registers for write */ SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level; /* Set SVS/SVM high side new level */ SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level; /* Set SVM low side to new level */ while ((PMMIFG & SVSMLDLYIFG) == 0); /* Wait till SVM is settled */ PMMIFG &= ~(SVMLVLRIFG + SVMLIFG); /* Clear already set flags */ PMMCTL0_L = PMMCOREV0 * level; /* Set VCore to new level */
if ((PMMIFG & SVMLIFG)) /* Wait till new level reached */ while ((PMMIFG & SVMLVLRIFG) == 0);
SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level; /* Set SVS/SVM low side to new level */ PMMCTL0_H = 0x00; /* Lock PMM registers for write access */}
/*********************************************************************************************************** Drv_UcsInit()** Description : (1) TBD** Argument(s) : none.** Return(s) : none.** Caller(s) : Application.** Note(s) : (1) TBD**********************************************************************************************************/
void Drv_UcsInit (void){ // Increase Vcore setting to level3 to support fsystem=25MHz // NOTE: Change core voltage one level at a time.. Drv_SetVcoreUp (0x01); Drv_SetVcoreUp (0x02); Drv_SetVcoreUp (0x03); UCSCTL3 = SELREF_2; // Set DCO FLL reference = REFO UCSCTL4 |= SELA_2; // Set ACLK = REFO __bis_SR_register(SCG0); // Disable the FLL control loop UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx UCSCTL1 = DCORSEL_7; // Select DCO range 50MHz operation UCSCTL2 = FLLD_1 + 762; // Set DCO Multiplier for 25MHz // (N + 1) * FLLRef = Fdco // (762 + 1) * 32768 = 25MHz // Set FLL Div = fDCOCLK/2 __bic_SR_register(SCG0); // Enable the FLL control loop // Worst-case settling time for the DCO when the DCO range bits have been // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx // UG for optimization. // 32 x 32 x 25 MHz / 32,768 Hz ~ 780k MCLK cycles for DCO to settle __delay_cycles(782000); // Loop until XT1,XT2 & DCO stabilizes – In this case only DCO has to stabilize do { UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG); // Clear XT2,XT1,DCO fault flags SFRIFG1 &= ~OFIFG; // Clear fault flags }while (SFRIFG1&OFIFG); // Test oscillator fault flag}
Stanford Chen:
回复 Bruce Wei:
我是3.3V供电,代码和上面一致
Stanford Chen:
回复 Bruce Wei:
ACLK,SMCLK为外部晶振32.768k和4M
Lina Lian:
回复 Stanford Chen:
Stanford Chen ,
请问在3.3V供电的基础上,在主频设置为25MHz之前,有否将MSP430F5xxx系列的 core-level升高?默认core-level为0,一般而言,最高能支持主频8MHz。若想运行至25MHz的话,得将core-level升高至3。建议使用core library。
Stanford Chen:
回复 Lina Lian:
已升高core-level升高至3,跑了一个晚上,发现跑飞了
Stanford Chen:
回复 Lina Lian:
频率降至20M,正在测试中,半小时内没出现跑飞现象
Bruce Wei:
回复 Stanford Chen:
建议楼主把自己的代码和MCU周边原理图贴出来。
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