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DSP28375与TPS63581A-Q1的SPI通讯问题

目前在研究28375 与电源管理芯片TPS65381 SPI通讯问题,一直无法读取TPS65381寄存器的数据;还请各位帮我看下代码是否有问题?

SPI配置:

void InitSpicGpio()
{EALLOW;

/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCPUD.bit.GPIO69 = 0;// Enable pull-up on GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;// Enable pull-up on GPIO5 (SPISIMOA)GpioCtrlRegs.GPCPUD.bit.GPIO70 = 0;// Enable pull-up on GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;// Enable pull-up on GPIO3 (SPISOMIA)GpioCtrlRegs.GPCPUD.bit.GPIO71 = 0;// Enable pull-up on GPIO71 (***)GpioCtrlRegs.GPCPUD.bit.GPIO72 = 0;// Enable pull-up on GPIO72 (SPISTEC)

/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCQSEL1.bit.GPIO69 = 3; // Asynch input GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 3;  // Asynch input GPIO5 (SPISIMOA)GpioCtrlRegs.GPCQSEL1.bit.GPIO70 = 3; // Asynch input GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 3;  // Asynch input GPIO3 (SPISOMIA)GpioCtrlRegs.GPCQSEL1.bit.GPIO71 = 3; // Asynch input GPIO71 (***)GpioCtrlRegs.GPCQSEL1.bit.GPIO72 = 3; // Asynch input GPIO72 (SPISTEC)

/* Configure SPI-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be SPI functional pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCMUX1.bit.GPIO69 = 1; // Configure GPIO69 as SPISIMOC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 2;  // Configure GPIO5 as SPISIMOAGpioCtrlRegs.GPCMUX1.bit.GPIO70 = 1; // Configure GPIO70 as SPISOMIC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 2;  // Configure GPIO3 as SPISOMIAGpioCtrlRegs.GPCMUX1.bit.GPIO71 = 1; // Configure GPIO71 as ***GpioCtrlRegs.GPCMUX1.bit.GPIO72 = 1; // Configure GPIO72 as SPISTECEDIS;
}
void InitTPS65381ASpi(void)
{
	GPIO_SetupPinMux(68,0,0);			// RESET_POWER,数字电源看门狗及复位,DSP输出给TPS65381A,低电平有效
	GPIO_SetupPinOptions(68,1,0);
	GpioDataRegs.GPCCLEAR.bit.GPIO68 = 0;
	
	GPIO_SetupPinMux(69,0,6);			// SDI,SIMO
	GPIO_SetupPinOptions(69,1,GPIO_ASYNC | GPIO_PULLUP);
	//GpioDataRegs.GPCCLEAR.bit.GPIO70 = 1;
	
	GPIO_SetupPinMux(70,0,6);			// SDO,SOMI
	GPIO_SetupPinOptions(70,0,GPIO_ASYNC | GPIO_PULLUP);
	

	GPIO_SetupPinMux(71,0,6);			// SCLK,CLK
	GPIO_SetupPinOptions(71,1,GPIO_ASYNC | GPIO_PULLUP);

	GPIO_SetupPinMux(72,0,6);			// NCS,CS
	GPIO_SetupPinOptions(72,1,GPIO_ASYNC | GPIO_PULLUP);
	

	EALLOW;

	***.***.all =0x004F;// Reset on, rising edge, 16-bit char bits
	***.***.all =0x0006;// Enable master mode, normal phase,
	***.SPIBRR.all =39;//24;//0x0009;// *** = 200M / 4 / (7) = 7.14M,*** MAX is 8M
	***.SPISTS.all = 0x0000;// reset all status information
	***.SPIPRI.all = 0x0010;// Set so breakpoints don't disturb xmission
	//***.***.bit.SPILBK = 1;
	

	/* reset both fifos */
	***.SPIFFTX.bit.TXFIFO = 0;
	***.SPIFFRX.bit.RXFIFORESET = 0; /*and keep them in reset during configuration */
	/* configure fifos  */
	***.SPIFFTX.all = 0x4041; /* Enable FIFO's, do not use interrupts */
	***.SPIFFRX.all = 0x4041; /* Set RX FIFO, do not use interrupts  */
	***.SPIFFCT.all = 0x0000; /* no delay between FIFO and TXBUF */
	/* releasing fifos from reset */
	***.SPIFFTX.bit.TXFIFO = 1;/* enable tx */
	***.SPIFFRX.bit.RXFIFORESET = 1; /* enable rx */

	***.***.bit.SPISWRESET = 1;
	EDIS;
}

读寄存器code

uint16 ReadRegsTPS65381(uint16 RegAddr)
{
	uint16 rx = 0x0;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 0;
	EDIS;
#endif
	rx |= ((RegAddr << 8) & 0xffff);***.SPITXBUF = rx;/* wait until the transmission is finished */while (***.SPIFFRX.bit.RXFFST < 1)	{}//rx = ***.SPIRXBUF & 0xff;
	rx = ***.SPIRXBUF;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 1;
	EDIS;
#endif
	return (rx);
}

whong zhao:

是读取不上来,还是停止在某个地方了

代码 

目前在研究28375 与电源管理芯片TPS65381 SPI通讯问题,一直无法读取TPS65381寄存器的数据;还请各位帮我看下代码是否有问题?

SPI配置:

void InitSpicGpio()
{EALLOW;

/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCPUD.bit.GPIO69 = 0;// Enable pull-up on GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;// Enable pull-up on GPIO5 (SPISIMOA)GpioCtrlRegs.GPCPUD.bit.GPIO70 = 0;// Enable pull-up on GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;// Enable pull-up on GPIO3 (SPISOMIA)GpioCtrlRegs.GPCPUD.bit.GPIO71 = 0;// Enable pull-up on GPIO71 (***)GpioCtrlRegs.GPCPUD.bit.GPIO72 = 0;// Enable pull-up on GPIO72 (SPISTEC)

/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCQSEL1.bit.GPIO69 = 3; // Asynch input GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 3;  // Asynch input GPIO5 (SPISIMOA)GpioCtrlRegs.GPCQSEL1.bit.GPIO70 = 3; // Asynch input GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 3;  // Asynch input GPIO3 (SPISOMIA)GpioCtrlRegs.GPCQSEL1.bit.GPIO71 = 3; // Asynch input GPIO71 (***)GpioCtrlRegs.GPCQSEL1.bit.GPIO72 = 3; // Asynch input GPIO72 (SPISTEC)

/* Configure SPI-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be SPI functional pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCMUX1.bit.GPIO69 = 1; // Configure GPIO69 as SPISIMOC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 2;  // Configure GPIO5 as SPISIMOAGpioCtrlRegs.GPCMUX1.bit.GPIO70 = 1; // Configure GPIO70 as SPISOMIC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 2;  // Configure GPIO3 as SPISOMIAGpioCtrlRegs.GPCMUX1.bit.GPIO71 = 1; // Configure GPIO71 as ***GpioCtrlRegs.GPCMUX1.bit.GPIO72 = 1; // Configure GPIO72 as SPISTECEDIS;
}
void InitTPS65381ASpi(void)
{
	GPIO_SetupPinMux(68,0,0);			// RESET_POWER,数字电源看门狗及复位,DSP输出给TPS65381A,低电平有效
	GPIO_SetupPinOptions(68,1,0);
	GpioDataRegs.GPCCLEAR.bit.GPIO68 = 0;
	
	GPIO_SetupPinMux(69,0,6);			// SDI,SIMO
	GPIO_SetupPinOptions(69,1,GPIO_ASYNC | GPIO_PULLUP);
	//GpioDataRegs.GPCCLEAR.bit.GPIO70 = 1;
	
	GPIO_SetupPinMux(70,0,6);			// SDO,SOMI
	GPIO_SetupPinOptions(70,0,GPIO_ASYNC | GPIO_PULLUP);
	

	GPIO_SetupPinMux(71,0,6);			// SCLK,CLK
	GPIO_SetupPinOptions(71,1,GPIO_ASYNC | GPIO_PULLUP);

	GPIO_SetupPinMux(72,0,6);			// NCS,CS
	GPIO_SetupPinOptions(72,1,GPIO_ASYNC | GPIO_PULLUP);
	

	EALLOW;

	***.***.all =0x004F;// Reset on, rising edge, 16-bit char bits
	***.***.all =0x0006;// Enable master mode, normal phase,
	***.SPIBRR.all =39;//24;//0x0009;// *** = 200M / 4 / (7) = 7.14M,*** MAX is 8M
	***.SPISTS.all = 0x0000;// reset all status information
	***.SPIPRI.all = 0x0010;// Set so breakpoints don't disturb xmission
	//***.***.bit.SPILBK = 1;
	

	/* reset both fifos */
	***.SPIFFTX.bit.TXFIFO = 0;
	***.SPIFFRX.bit.RXFIFORESET = 0; /*and keep them in reset during configuration */
	/* configure fifos  */
	***.SPIFFTX.all = 0x4041; /* Enable FIFO's, do not use interrupts */
	***.SPIFFRX.all = 0x4041; /* Set RX FIFO, do not use interrupts  */
	***.SPIFFCT.all = 0x0000; /* no delay between FIFO and TXBUF */
	/* releasing fifos from reset */
	***.SPIFFTX.bit.TXFIFO = 1;/* enable tx */
	***.SPIFFRX.bit.RXFIFORESET = 1; /* enable rx */

	***.***.bit.SPISWRESET = 1;
	EDIS;
}

读寄存器code

uint16 ReadRegsTPS65381(uint16 RegAddr)
{
	uint16 rx = 0x0;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 0;
	EDIS;
#endif
	rx |= ((RegAddr << 8) & 0xffff);***.SPITXBUF = rx;/* wait until the transmission is finished */while (***.SPIFFRX.bit.RXFFST < 1)	{}//rx = ***.SPIRXBUF & 0xff;
	rx = ***.SPIRXBUF;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 1;
	EDIS;
#endif
	return (rx);
}

user5867093:

回复 whong zhao:

我这里测试是通过上位机发送一条指令激活SPI通讯的读寄存器值;

switch(dataIdentifier){case SPI_Status:SPIdata = ReadRegsTPS65381(0x6);dataRecord[0] = (SPIdata>>8) &0xff;dataRecord[1] =SPIdata & 0xff;*dataRecordSize = 2;break;}

程序在这里什么也没有读出来,并没有停留在这里,我的控制板有Reset的现象

目前在研究28375 与电源管理芯片TPS65381 SPI通讯问题,一直无法读取TPS65381寄存器的数据;还请各位帮我看下代码是否有问题?

SPI配置:

void InitSpicGpio()
{EALLOW;

/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCPUD.bit.GPIO69 = 0;// Enable pull-up on GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;// Enable pull-up on GPIO5 (SPISIMOA)GpioCtrlRegs.GPCPUD.bit.GPIO70 = 0;// Enable pull-up on GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;// Enable pull-up on GPIO3 (SPISOMIA)GpioCtrlRegs.GPCPUD.bit.GPIO71 = 0;// Enable pull-up on GPIO71 (***)GpioCtrlRegs.GPCPUD.bit.GPIO72 = 0;// Enable pull-up on GPIO72 (SPISTEC)

/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCQSEL1.bit.GPIO69 = 3; // Asynch input GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 3;  // Asynch input GPIO5 (SPISIMOA)GpioCtrlRegs.GPCQSEL1.bit.GPIO70 = 3; // Asynch input GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 3;  // Asynch input GPIO3 (SPISOMIA)GpioCtrlRegs.GPCQSEL1.bit.GPIO71 = 3; // Asynch input GPIO71 (***)GpioCtrlRegs.GPCQSEL1.bit.GPIO72 = 3; // Asynch input GPIO72 (SPISTEC)

/* Configure SPI-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be SPI functional pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCMUX1.bit.GPIO69 = 1; // Configure GPIO69 as SPISIMOC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 2;  // Configure GPIO5 as SPISIMOAGpioCtrlRegs.GPCMUX1.bit.GPIO70 = 1; // Configure GPIO70 as SPISOMIC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 2;  // Configure GPIO3 as SPISOMIAGpioCtrlRegs.GPCMUX1.bit.GPIO71 = 1; // Configure GPIO71 as ***GpioCtrlRegs.GPCMUX1.bit.GPIO72 = 1; // Configure GPIO72 as SPISTECEDIS;
}
void InitTPS65381ASpi(void)
{
	GPIO_SetupPinMux(68,0,0);			// RESET_POWER,数字电源看门狗及复位,DSP输出给TPS65381A,低电平有效
	GPIO_SetupPinOptions(68,1,0);
	GpioDataRegs.GPCCLEAR.bit.GPIO68 = 0;
	
	GPIO_SetupPinMux(69,0,6);			// SDI,SIMO
	GPIO_SetupPinOptions(69,1,GPIO_ASYNC | GPIO_PULLUP);
	//GpioDataRegs.GPCCLEAR.bit.GPIO70 = 1;
	
	GPIO_SetupPinMux(70,0,6);			// SDO,SOMI
	GPIO_SetupPinOptions(70,0,GPIO_ASYNC | GPIO_PULLUP);
	

	GPIO_SetupPinMux(71,0,6);			// SCLK,CLK
	GPIO_SetupPinOptions(71,1,GPIO_ASYNC | GPIO_PULLUP);

	GPIO_SetupPinMux(72,0,6);			// NCS,CS
	GPIO_SetupPinOptions(72,1,GPIO_ASYNC | GPIO_PULLUP);
	

	EALLOW;

	***.***.all =0x004F;// Reset on, rising edge, 16-bit char bits
	***.***.all =0x0006;// Enable master mode, normal phase,
	***.SPIBRR.all =39;//24;//0x0009;// *** = 200M / 4 / (7) = 7.14M,*** MAX is 8M
	***.SPISTS.all = 0x0000;// reset all status information
	***.SPIPRI.all = 0x0010;// Set so breakpoints don't disturb xmission
	//***.***.bit.SPILBK = 1;
	

	/* reset both fifos */
	***.SPIFFTX.bit.TXFIFO = 0;
	***.SPIFFRX.bit.RXFIFORESET = 0; /*and keep them in reset during configuration */
	/* configure fifos  */
	***.SPIFFTX.all = 0x4041; /* Enable FIFO's, do not use interrupts */
	***.SPIFFRX.all = 0x4041; /* Set RX FIFO, do not use interrupts  */
	***.SPIFFCT.all = 0x0000; /* no delay between FIFO and TXBUF */
	/* releasing fifos from reset */
	***.SPIFFTX.bit.TXFIFO = 1;/* enable tx */
	***.SPIFFRX.bit.RXFIFORESET = 1; /* enable rx */

	***.***.bit.SPISWRESET = 1;
	EDIS;
}

读寄存器code

uint16 ReadRegsTPS65381(uint16 RegAddr)
{
	uint16 rx = 0x0;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 0;
	EDIS;
#endif
	rx |= ((RegAddr << 8) & 0xffff);***.SPITXBUF = rx;/* wait until the transmission is finished */while (***.SPIFFRX.bit.RXFFST < 1)	{}//rx = ***.SPIRXBUF & 0xff;
	rx = ***.SPIRXBUF;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 1;
	EDIS;
#endif
	return (rx);
}

user5867093:

回复 whong zhao:

我这边测量了一下NCS , SCLK的波形,发现NCS变成低电平的时候,SCLK也变成了低电平,这个就有问题了,不知道是不是我的配置没有做好。读取的时候应该是停止在读取寄存器的地方了,导致喂狗信号超时,软件复位

目前在研究28375 与电源管理芯片TPS65381 SPI通讯问题,一直无法读取TPS65381寄存器的数据;还请各位帮我看下代码是否有问题?

SPI配置:

void InitSpicGpio()
{EALLOW;

/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCPUD.bit.GPIO69 = 0;// Enable pull-up on GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;// Enable pull-up on GPIO5 (SPISIMOA)GpioCtrlRegs.GPCPUD.bit.GPIO70 = 0;// Enable pull-up on GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;// Enable pull-up on GPIO3 (SPISOMIA)GpioCtrlRegs.GPCPUD.bit.GPIO71 = 0;// Enable pull-up on GPIO71 (***)GpioCtrlRegs.GPCPUD.bit.GPIO72 = 0;// Enable pull-up on GPIO72 (SPISTEC)

/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCQSEL1.bit.GPIO69 = 3; // Asynch input GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 3;  // Asynch input GPIO5 (SPISIMOA)GpioCtrlRegs.GPCQSEL1.bit.GPIO70 = 3; // Asynch input GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 3;  // Asynch input GPIO3 (SPISOMIA)GpioCtrlRegs.GPCQSEL1.bit.GPIO71 = 3; // Asynch input GPIO71 (***)GpioCtrlRegs.GPCQSEL1.bit.GPIO72 = 3; // Asynch input GPIO72 (SPISTEC)

/* Configure SPI-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be SPI functional pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCMUX1.bit.GPIO69 = 1; // Configure GPIO69 as SPISIMOC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 2;  // Configure GPIO5 as SPISIMOAGpioCtrlRegs.GPCMUX1.bit.GPIO70 = 1; // Configure GPIO70 as SPISOMIC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 2;  // Configure GPIO3 as SPISOMIAGpioCtrlRegs.GPCMUX1.bit.GPIO71 = 1; // Configure GPIO71 as ***GpioCtrlRegs.GPCMUX1.bit.GPIO72 = 1; // Configure GPIO72 as SPISTECEDIS;
}
void InitTPS65381ASpi(void)
{
	GPIO_SetupPinMux(68,0,0);			// RESET_POWER,数字电源看门狗及复位,DSP输出给TPS65381A,低电平有效
	GPIO_SetupPinOptions(68,1,0);
	GpioDataRegs.GPCCLEAR.bit.GPIO68 = 0;
	
	GPIO_SetupPinMux(69,0,6);			// SDI,SIMO
	GPIO_SetupPinOptions(69,1,GPIO_ASYNC | GPIO_PULLUP);
	//GpioDataRegs.GPCCLEAR.bit.GPIO70 = 1;
	
	GPIO_SetupPinMux(70,0,6);			// SDO,SOMI
	GPIO_SetupPinOptions(70,0,GPIO_ASYNC | GPIO_PULLUP);
	

	GPIO_SetupPinMux(71,0,6);			// SCLK,CLK
	GPIO_SetupPinOptions(71,1,GPIO_ASYNC | GPIO_PULLUP);

	GPIO_SetupPinMux(72,0,6);			// NCS,CS
	GPIO_SetupPinOptions(72,1,GPIO_ASYNC | GPIO_PULLUP);
	

	EALLOW;

	***.***.all =0x004F;// Reset on, rising edge, 16-bit char bits
	***.***.all =0x0006;// Enable master mode, normal phase,
	***.SPIBRR.all =39;//24;//0x0009;// *** = 200M / 4 / (7) = 7.14M,*** MAX is 8M
	***.SPISTS.all = 0x0000;// reset all status information
	***.SPIPRI.all = 0x0010;// Set so breakpoints don't disturb xmission
	//***.***.bit.SPILBK = 1;
	

	/* reset both fifos */
	***.SPIFFTX.bit.TXFIFO = 0;
	***.SPIFFRX.bit.RXFIFORESET = 0; /*and keep them in reset during configuration */
	/* configure fifos  */
	***.SPIFFTX.all = 0x4041; /* Enable FIFO's, do not use interrupts */
	***.SPIFFRX.all = 0x4041; /* Set RX FIFO, do not use interrupts  */
	***.SPIFFCT.all = 0x0000; /* no delay between FIFO and TXBUF */
	/* releasing fifos from reset */
	***.SPIFFTX.bit.TXFIFO = 1;/* enable tx */
	***.SPIFFRX.bit.RXFIFORESET = 1; /* enable rx */

	***.***.bit.SPISWRESET = 1;
	EDIS;
}

读寄存器code

uint16 ReadRegsTPS65381(uint16 RegAddr)
{
	uint16 rx = 0x0;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 0;
	EDIS;
#endif
	rx |= ((RegAddr << 8) & 0xffff);***.SPITXBUF = rx;/* wait until the transmission is finished */while (***.SPIFFRX.bit.RXFFST < 1)	{}//rx = ***.SPIRXBUF & 0xff;
	rx = ***.SPIRXBUF;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 1;
	EDIS;
#endif
	return (rx);
}

user5867093:

回复 whong zhao:

我这边又修改了一下配置代码。读取回来的数据都是FFFF,该如何解决

目前在研究28375 与电源管理芯片TPS65381 SPI通讯问题,一直无法读取TPS65381寄存器的数据;还请各位帮我看下代码是否有问题?

SPI配置:

void InitSpicGpio()
{EALLOW;

/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCPUD.bit.GPIO69 = 0;// Enable pull-up on GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;// Enable pull-up on GPIO5 (SPISIMOA)GpioCtrlRegs.GPCPUD.bit.GPIO70 = 0;// Enable pull-up on GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;// Enable pull-up on GPIO3 (SPISOMIA)GpioCtrlRegs.GPCPUD.bit.GPIO71 = 0;// Enable pull-up on GPIO71 (***)GpioCtrlRegs.GPCPUD.bit.GPIO72 = 0;// Enable pull-up on GPIO72 (SPISTEC)

/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCQSEL1.bit.GPIO69 = 3; // Asynch input GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 3;  // Asynch input GPIO5 (SPISIMOA)GpioCtrlRegs.GPCQSEL1.bit.GPIO70 = 3; // Asynch input GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 3;  // Asynch input GPIO3 (SPISOMIA)GpioCtrlRegs.GPCQSEL1.bit.GPIO71 = 3; // Asynch input GPIO71 (***)GpioCtrlRegs.GPCQSEL1.bit.GPIO72 = 3; // Asynch input GPIO72 (SPISTEC)

/* Configure SPI-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be SPI functional pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCMUX1.bit.GPIO69 = 1; // Configure GPIO69 as SPISIMOC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 2;  // Configure GPIO5 as SPISIMOAGpioCtrlRegs.GPCMUX1.bit.GPIO70 = 1; // Configure GPIO70 as SPISOMIC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 2;  // Configure GPIO3 as SPISOMIAGpioCtrlRegs.GPCMUX1.bit.GPIO71 = 1; // Configure GPIO71 as ***GpioCtrlRegs.GPCMUX1.bit.GPIO72 = 1; // Configure GPIO72 as SPISTECEDIS;
}
void InitTPS65381ASpi(void)
{
	GPIO_SetupPinMux(68,0,0);			// RESET_POWER,数字电源看门狗及复位,DSP输出给TPS65381A,低电平有效
	GPIO_SetupPinOptions(68,1,0);
	GpioDataRegs.GPCCLEAR.bit.GPIO68 = 0;
	
	GPIO_SetupPinMux(69,0,6);			// SDI,SIMO
	GPIO_SetupPinOptions(69,1,GPIO_ASYNC | GPIO_PULLUP);
	//GpioDataRegs.GPCCLEAR.bit.GPIO70 = 1;
	
	GPIO_SetupPinMux(70,0,6);			// SDO,SOMI
	GPIO_SetupPinOptions(70,0,GPIO_ASYNC | GPIO_PULLUP);
	

	GPIO_SetupPinMux(71,0,6);			// SCLK,CLK
	GPIO_SetupPinOptions(71,1,GPIO_ASYNC | GPIO_PULLUP);

	GPIO_SetupPinMux(72,0,6);			// NCS,CS
	GPIO_SetupPinOptions(72,1,GPIO_ASYNC | GPIO_PULLUP);
	

	EALLOW;

	***.***.all =0x004F;// Reset on, rising edge, 16-bit char bits
	***.***.all =0x0006;// Enable master mode, normal phase,
	***.SPIBRR.all =39;//24;//0x0009;// *** = 200M / 4 / (7) = 7.14M,*** MAX is 8M
	***.SPISTS.all = 0x0000;// reset all status information
	***.SPIPRI.all = 0x0010;// Set so breakpoints don't disturb xmission
	//***.***.bit.SPILBK = 1;
	

	/* reset both fifos */
	***.SPIFFTX.bit.TXFIFO = 0;
	***.SPIFFRX.bit.RXFIFORESET = 0; /*and keep them in reset during configuration */
	/* configure fifos  */
	***.SPIFFTX.all = 0x4041; /* Enable FIFO's, do not use interrupts */
	***.SPIFFRX.all = 0x4041; /* Set RX FIFO, do not use interrupts  */
	***.SPIFFCT.all = 0x0000; /* no delay between FIFO and TXBUF */
	/* releasing fifos from reset */
	***.SPIFFTX.bit.TXFIFO = 1;/* enable tx */
	***.SPIFFRX.bit.RXFIFORESET = 1; /* enable rx */

	***.***.bit.SPISWRESET = 1;
	EDIS;
}

读寄存器code

uint16 ReadRegsTPS65381(uint16 RegAddr)
{
	uint16 rx = 0x0;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 0;
	EDIS;
#endif
	rx |= ((RegAddr << 8) & 0xffff);***.SPITXBUF = rx;/* wait until the transmission is finished */while (***.SPIFFRX.bit.RXFFST < 1)	{}//rx = ***.SPIRXBUF & 0xff;
	rx = ***.SPIRXBUF;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 1;
	EDIS;
#endif
	return (rx);
}

user5867093:

回复 Green Deng:

你好,谢谢指点,我对代码做了修改,

1.屏蔽了函数InitSpicGpio() ,修改了函数InitTPS65381ASpi对SPI的配置

2.SPIFFTX.SPIRST位也使能了

3.MOSI引脚的虚拟值我是给这个针脚输出了高电平可以吗?GpioDataRegs.GPCSET.bit.GPIO70 = 1;

4.示波器查看了SPI总线信号,感觉读取的数据不对;发送的SPI命令是正确的。我这边读取了RD_DEV_REV,RD_SAFETY_STAT_5,RD_SAFETY_CHECK_CTRL,RD_SAFETY_FUNC_CFG,接收到数据是0x507F,0x5080,0x507f,0x5080。

目前在研究28375 与电源管理芯片TPS65381 SPI通讯问题,一直无法读取TPS65381寄存器的数据;还请各位帮我看下代码是否有问题?

SPI配置:

void InitSpicGpio()
{EALLOW;

/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCPUD.bit.GPIO69 = 0;// Enable pull-up on GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;// Enable pull-up on GPIO5 (SPISIMOA)GpioCtrlRegs.GPCPUD.bit.GPIO70 = 0;// Enable pull-up on GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;// Enable pull-up on GPIO3 (SPISOMIA)GpioCtrlRegs.GPCPUD.bit.GPIO71 = 0;// Enable pull-up on GPIO71 (***)GpioCtrlRegs.GPCPUD.bit.GPIO72 = 0;// Enable pull-up on GPIO72 (SPISTEC)

/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCQSEL1.bit.GPIO69 = 3; // Asynch input GPIO69 (SPISIMOC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 3;  // Asynch input GPIO5 (SPISIMOA)GpioCtrlRegs.GPCQSEL1.bit.GPIO70 = 3; // Asynch input GPIO70 (SPISOMIC)
//  GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 3;  // Asynch input GPIO3 (SPISOMIA)GpioCtrlRegs.GPCQSEL1.bit.GPIO71 = 3; // Asynch input GPIO71 (***)GpioCtrlRegs.GPCQSEL1.bit.GPIO72 = 3; // Asynch input GPIO72 (SPISTEC)

/* Configure SPI-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be SPI functional pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPCMUX1.bit.GPIO69 = 1; // Configure GPIO69 as SPISIMOC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 2;  // Configure GPIO5 as SPISIMOAGpioCtrlRegs.GPCMUX1.bit.GPIO70 = 1; // Configure GPIO70 as SPISOMIC
//  GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 2;  // Configure GPIO3 as SPISOMIAGpioCtrlRegs.GPCMUX1.bit.GPIO71 = 1; // Configure GPIO71 as ***GpioCtrlRegs.GPCMUX1.bit.GPIO72 = 1; // Configure GPIO72 as SPISTECEDIS;
}
void InitTPS65381ASpi(void)
{
	GPIO_SetupPinMux(68,0,0);			// RESET_POWER,数字电源看门狗及复位,DSP输出给TPS65381A,低电平有效
	GPIO_SetupPinOptions(68,1,0);
	GpioDataRegs.GPCCLEAR.bit.GPIO68 = 0;
	
	GPIO_SetupPinMux(69,0,6);			// SDI,SIMO
	GPIO_SetupPinOptions(69,1,GPIO_ASYNC | GPIO_PULLUP);
	//GpioDataRegs.GPCCLEAR.bit.GPIO70 = 1;
	
	GPIO_SetupPinMux(70,0,6);			// SDO,SOMI
	GPIO_SetupPinOptions(70,0,GPIO_ASYNC | GPIO_PULLUP);
	

	GPIO_SetupPinMux(71,0,6);			// SCLK,CLK
	GPIO_SetupPinOptions(71,1,GPIO_ASYNC | GPIO_PULLUP);

	GPIO_SetupPinMux(72,0,6);			// NCS,CS
	GPIO_SetupPinOptions(72,1,GPIO_ASYNC | GPIO_PULLUP);
	

	EALLOW;

	***.***.all =0x004F;// Reset on, rising edge, 16-bit char bits
	***.***.all =0x0006;// Enable master mode, normal phase,
	***.SPIBRR.all =39;//24;//0x0009;// *** = 200M / 4 / (7) = 7.14M,*** MAX is 8M
	***.SPISTS.all = 0x0000;// reset all status information
	***.SPIPRI.all = 0x0010;// Set so breakpoints don't disturb xmission
	//***.***.bit.SPILBK = 1;
	

	/* reset both fifos */
	***.SPIFFTX.bit.TXFIFO = 0;
	***.SPIFFRX.bit.RXFIFORESET = 0; /*and keep them in reset during configuration */
	/* configure fifos  */
	***.SPIFFTX.all = 0x4041; /* Enable FIFO's, do not use interrupts */
	***.SPIFFRX.all = 0x4041; /* Set RX FIFO, do not use interrupts  */
	***.SPIFFCT.all = 0x0000; /* no delay between FIFO and TXBUF */
	/* releasing fifos from reset */
	***.SPIFFTX.bit.TXFIFO = 1;/* enable tx */
	***.SPIFFRX.bit.RXFIFORESET = 1; /* enable rx */

	***.***.bit.SPISWRESET = 1;
	EDIS;
}

读寄存器code

uint16 ReadRegsTPS65381(uint16 RegAddr)
{
	uint16 rx = 0x0;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 0;
	EDIS;
#endif
	rx |= ((RegAddr << 8) & 0xffff);***.SPITXBUF = rx;/* wait until the transmission is finished */while (***.SPIFFRX.bit.RXFFST < 1)	{}//rx = ***.SPIRXBUF & 0xff;
	rx = ***.SPIRXBUF;
#if 0
	EALLOW;
	GpioDataRegs.GPCDAT.bit.GPIO72 = 1;
	EDIS;
#endif
	return (rx);
}

Green Deng:

回复 user5867093:

上述图片的意思是:你发送了0x0C00、0xC000、0x4400、0x3A00,
然后在RD_DEV_REV,RD_SAFETY_STAT_5,RD_SAFETY_CHECK_CTRL,RD_SAFETY_FUNC_CFG,
接收到数据是0x507F,0x5080,0x507f,0x5080。
对吗?

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