TI中文支持网Part Number:ADS131M02-Q1Other Parts Discussed in Thread:ADS131M02
We are currently debugging the ADS131M02 chip and have found that when configuring fdata to be less than 4kSPS, the actual output is still 4kSPS. In other words, setting OSR to a value greater than 1024 is ineffective. Register read/write functions are functioning normally. We would like to inquire about the reason for this issue.
Amy Luo：
您好，
在 fdata高于4KSPS时，比如8KSPS、16KSPS时是按正常速率输出的是吗？您是通过检测DRDY信号来确定的输出速率是吗？
高于1024的任何OSR值都无效是吗？
您应用的CLKIN 频率是多少？
PWR[1:0]配置的什么？
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kaixin zheng：
8KSPS，16KSPS，32KSPS速率是正常的，用逻辑分析仪读取的DRDY的波形，高于1024的值都无效，高于1024实测都是4KSPS，CLKIN是8.192MHZ，PWR是10b
