TI中文支持网TI的工程师：好！
有一段话在模拟前端官方资料《bq769x0 Family Top 10 Design Considerations》中的FET DRIVER这一章中：
When the battery is in a normal state and has both the Q1 and Q2 FETs ON, it is desirable to have most
of the CHG pin voltage available on the gate of Q2 to maintain a low resistance in the FET.
本人不太理解，麻烦TI的工程师解释一下，谢谢。
zz L：
还有这句话：When the CHG output turns on CHG and Q3 drain will try to go to approximately 12 V. If the battery had
been discharged 15 V below the charger voltage, there would be a 27 V difference between the Q1
source and the Q3 drain voltage.
不太明白，请问27V怎么来的，帮忙解释一下，谢谢。
Star Xu：
回复 zz L:
您可以参考下面的链接
e2e.ti.com/…/2865488
