TI中文支持网Part Number:PCMD3180
register config in next picture.
and i read from state register.
i config I2S bclk is 48000hz and bclk/FSYNC is 64,reg 0x15 = 0x44 is correct.
is there something wrang in reg config?
please give me some advise.
linyong0321@gmail.com
Taylor：
您好，
已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
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yong lin：
why not ansower?
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Vivian Gao：
The device configuration script seems to be correct.
1) Can you also check the status of the two interrupts in the INT_LTCH0 register?
2) Is there no PDMCLK seen when probing the PDMCLK pins of the PCMD3180 on a scope?
3) Is this systematically seen on multiple PCBs?
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Vivian Gao：
Long time no reply received, this post is closed
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yong lin：
four PCMD318 in one i2s bus,must one PCMD3180 work in master mode?
