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F28388D评估板Debug时出错,求问各位大佬解决办法

最近入手的F28388d的评估板,使用的是评估板上自带的XDS100v2 仿真器,板上的S1:A和S2均按照说明书上的要求设置的,,新建工程如下图所示:

之后Target Configurations测试出现如下错误:

[Start: Texas Instruments XDS100v2 USB Debug Probe_0]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

[Result]

—–[Print the board config pathname(s)]————————————

C:\Users\DELL\AppData\Local\TEXASI~1\CCS\
CCS10A~1\0\0\BrdDat\testBoard.dat

—–[Print the reset-command software log-file]—————————–

This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioserdesusb.dll'.
The library build date was 'May 7 2020'.
The library build time was '21:10:18'.
The library package version is '9.2.0.00002'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

—–[Print the reset-command hardware log-file]—————————–

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).

—–[The log-file for the JTAG TCLK output generated from the PLL]———-

There is no hardware for programming the JTAG TCLK frequency.

—–[Measure the source and frequency of the final JTAG TCLKR input]——–

There is no hardware for measuring the JTAG TCLK frequency.

—–[Perform the standard path-length test on the JTAG IR and DR]———–

This path-length test uses blocks of 64 32-bit words.

The test for the JTAG IR instruction path-length failed.
The JTAG IR instruction scan-path is stuck-at-ones.

The test for the JTAG DR bypass path-length failed.
The JTAG DR bypass scan-path is stuck-at-ones.

—–[Perform the Integrity scan-test on the JTAG IR]————————

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Test 2 Word 0: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 1: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 2: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 3: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 4: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 5: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 6: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 7: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
The details of the first 8 errors have been provided.
The utility will now report only the count of failed tests.
Scan tests: 2, skipped: 0, failed: 1
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 2
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 3
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 4
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 5
Some of the values were corrupted – 83.3 percent.

The JTAG IR Integrity scan-test has failed.

—–[Perform the Integrity scan-test on the JTAG DR]————————

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Test 2 Word 0: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 1: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 2: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 3: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 4: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 5: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 6: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
Test 2 Word 7: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
The details of the first 8 errors have been provided.
The utility will now report only the count of failed tests.
Scan tests: 2, skipped: 0, failed: 1
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 2
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 3
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 4
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 5
Some of the values were corrupted – 83.3 percent.

The JTAG DR Integrity scan-test has failed.

[End: Texas Instruments XDS100v2 USB Debug Probe_0]

链接不上,直接Debug会出现如下错误:

请问哪位大佬这到底是什么原因,可以帮帮我吗?

Susan Yang:

您使用的是 TMDSCNCD28388D?您的TMS320F28388D.ccxml是如何设置的?

连线的话

1 S1:APosition 1: ON (right)

2Connect a mini USB cable between J1:A and your computer

若是可以的话,可以拍照一下您现在的板子连接情况吗?

Susan Yang:

另外您现在有使用下面的基板吗?

为了评估TMDSCNCD28388D,需要一个180针扩展坞TMDSHSECDOCK,可以单独购买或捆绑购买。

周小俊:

回复 Susan Yang:

你好,我也买了这个扩展坞,也是Debug不了,和直接用板载的是一个错误

周小俊:

回复 Susan Yang:

你好,我的你好,我的TMS320F28388D .ccxml设置如下:

我的板子连线方式如图所示:

Susan Yang:

回复 周小俊:

您下面的基板是如何供电的?

我当时使用的是USB口连接电脑,然后开关拨到USB供电,可以成功的

周小俊:

回复 Susan Yang:

你的意思是基板也要同时供电对吗?我已经给板子上的J3端口供电了

Susan Yang:

回复 周小俊:

那您若是用J3的话,尝试去掉基板,直接J1:A和J3

若是使用基板的话,按照Option 1的设置来

周小俊:

回复 Susan Yang:

这两种方法我都试过了,都是不行的,都会出现上面的错误

Susan Yang:

建议您使用基板的方式连接,而后连接uniflash试试能不能发现设备

另外换一根线试试

software-dl.ti.com/…/ccsv7_debugging_jtag_connectivity_issues.html

software-dl.ti.com/…/ccsv7_debugging_jtag_connectivity_issues.html

您现在回读数据全是0

If the data read back is all zeros (0x00000000), it is possible there is a power failure on the circuit or one of the JTAG lines has a short to GND.

建议您按照上面的链接测量一下电压是否正常

周小俊:

回复 Susan Yang:

好的我试下,可以发我一个基板的PCB板吗?我没有在官网上找到

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