925/926中断问题

主板上信号由FPGA给到925（925的IIC连接到MCU）,925通过STP线给到926，主板需要读取926的中断状态，请问该如何配置。请TI的工程师指点一下，谢谢！

Kailyn Chen：

您参考下datasheet P27有关中断的步骤：
7.3.19 Interrupt Pin — Functional Description and Usage (INTB)
1. On DS90UB925Q-Q1, set register 0xC6[5] = 1 and 0xC6[0] = 1
2. DS90UB926Q-Q1 deserializer INTB_IN (pin 16) is set LOW by some downstream device.
3. DS90UB925Q-Q1 serializer pulls INTB (pin 31) LOW. The signal is active low, so a LOW indicates an
interrupt condition.
4. External controller detects INTB = LOW; to determine interrupt source, read ISR register .
5. A read to ISR will clear the interrupt at the DS90UB925Q-Q1, releasing INTB.
6. The external controller typically must then access the remote device to determine downstream interrupt
source and clear the interrupt driving INTB_IN. This would be when the downstream device releases the
INTB_IN (pin 16) on the DS90UB926Q-Q1. The system is now ready to return to step (1) at next falling edgeof INTB_IN.

alex zh：

回复 Kailyn Chen:

Hi kailyn :

 可否理解为以下步骤：

 1、配置925的0xC6寄存器。

 2、如果解串器926的INTB发生中断，那么会导致STP线另一端的串行器925会把INTB拉低。

 3、MCU读925的ISR寄存器 ，清925的中断。

 4、第6点理解的不是很清楚，方便的话请稍微详细解释以下。

谢谢！