TI中文支持网自己做了一个TMS320C6678的电路板，DSP有输入频率，而且仿真器能够找到DSP芯片，但是加载GEL文件出错，错误如下：
C66xx_0: GEL Output: Setup_Memory_Map…
C66xx_0: GEL Output: Setup_Memory_Map… Done.
C66xx_0: GEL Output:
Connecting Target…
C66xx_0: GEL Output: DSP core #0
C66xx_0: GEL Output: C6678L GEL file Ver is 2.005
C66xx_0: GEL Output: Global Default Setup…
C66xx_0: GEL Output: Setup Cache…
C66xx_0: GEL Output: L1P = 32K
C66xx_0: GEL Output: L1D = 32K
C66xx_0: GEL Output: L2 = ALL SRAM
C66xx_0: GEL Output: Setup Cache… Done.
C66xx_0: GEL Output: Main PLL (PLL1) Setup …
C66xx_0: GEL Output: PLL in Bypass …
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output: PLL1 Setup… Done.
C66xx_0: GEL Output: Power on all PSC modules and DSP domains…
C66xx_0: GEL Output: Security Accelerator disabled!
C66xx_0: GEL Output: Power on all PSC modules and DSP domains… Done.
C66xx_0: GEL Output: PA PLL (PLL3) Setup …
C66xx_0: GEL Output: PA PLL Setup… Done.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup …
C66xx_0: GEL Output: DDR3 PLL Setup… Done.
C66xx_0: GEL Output: DDR begin (1333 auto)
C66xx_0: GEL Output: XMC Setup … Done
C66xx_0: GEL Output:
DDR3 initialization is complete.
C66xx_0: GEL Output: DDR done
C66xx_0: GEL Output: DDR3 memory test… Started
C66xx_0: GEL Output: DDR3 memory test… Failed
C66xx_0: GEL Output: Main PLL (PLL1) Setup …
C66xx_0: GEL Output: PLL not in Bypass, Enable BYPASS in the PLL Controller…
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output: PLL1 Setup… Done.
C66xx_0: GEL Output: PA PLL (PLL3) Setup …
C66xx_0: GEL Output: PA PLL Setup… Done.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup …
C66xx_0: GEL Output: DDR3 PLL Setup… Done.
C66xx_0: GEL Output: DDR begin (1333 auto)
C66xx_0: GEL Output: XMC Setup … Done
C66xx_0: GEL Output:
DDR3 initialization is complete.
C66xx_0: GEL Output: DDR done
C66xx_0: GEL Output: DDR3 memory test… Started
C66xx_0: GEL Output: DDR3 memory test… Failed
C66xx_0: GEL Output: Main PLL (PLL1) Setup …
C66xx_0: GEL Output: PLL not in Bypass, Enable BYPASS in the PLL Controller…
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output: PLL1 Setup… Done.
C66xx_0: GEL Output: PA PLL (PLL3) Setup …
C66xx_0: GEL Output: PA PLL Setup… Done.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup …
C66xx_0: GEL Output: DDR3 PLL Setup… Done.
C66xx_0: GEL Output: DDR begin (1333 auto)
C66xx_0: GEL Output: XMC Setup … Done
C66xx_0: GEL Output:
DDR3 initialization is complete.
C66xx_0: GEL Output: DDR done
C66xx_0: GEL Output: DDR3 memory test… Started
C66xx_0: GEL Output: DDR3 memory test… Failed
C66xx_0: GEL Output: Main PLL (PLL1) Setup …
C66xx_0: GEL Output: PLL not in Bypass, Enable BYPASS in the PLL Controller…
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output: PLL1 Setup… Done.
C66xx_0: GEL Output: PA PLL (PLL3) Setup …
C66xx_0: GEL Output: PA PLL Setup… Done.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup …
C66xx_0: GEL Output: DDR3 PLL Setup… Done.
C66xx_0: GEL Output: DDR begin (1333 auto)
C66xx_0: GEL Output: XMC Setup … Done
C66xx_0: GEL Output:
DDR3 initialization is complete.
C66xx_0: GEL Output: DDR done
C66xx_0: GEL Output: DDR3 memory test… Started
C66xx_0: GEL Output: DDR3 memory test… Failed
C66xx_0: GEL Output: Main PLL (PLL1) Setup …
C66xx_0: GEL Output: PLL not in Bypass, Enable BYPASS in the PLL Controller…
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output: PLL1 Setup… Done.
C66xx_0: GEL Output: PA PLL (PLL3) Setup …
C66xx_0: GEL Output: PA PLL Setup… Done.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup …
C66xx_0: GEL Output: DDR3 PLL Setup… Done.
C66xx_0: GEL Output: DDR begin (1333 auto)
C66xx_0: GEL Output: XMC Setup … Done
C66xx_0: GEL Output:
DDR3 initialization is complete.
C66xx_0: GEL Output: DDR done
C66xx_0: GEL Output: DDR3 memory test… Started
C66xx_0: GEL Output: DDR3 memory test… Failed
C66xx_0: GEL Output: Main PLL (PLL1) Setup …
C66xx_0: GEL Output: PLL not in Bypass, Enable BYPASS in the PLL Controller…
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output: PLL1 Setup… Done.
C66xx_0: GEL Output: PA PLL (PLL3) Setup …
C66xx_0: GEL Output: PA PLL Setup… Done.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup …
C66xx_0: GEL Output: DDR3 PLL Setup… Done.
C66xx_0: GEL Output: DDR begin (1333 auto)
C66xx_0: GEL Output: XMC Setup … Done
C66xx_0: GEL Output:
DDR3 initialization is complete.
C66xx_0: GEL Output: DDR done
C66xx_0: GEL Output: DDR3 memory test… Started
C66xx_0: GEL Output: DDR3 memory test… Failed
C66xx_0: GEL Output: Main PLL (PLL1) Setup …
C66xx_0: GEL Output: PLL not in Bypass, Enable BYPASS in the PLL Controller…
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output: PLL1 Setup… Done.
C66xx_0: GEL Output: PA PLL (PLL3) Setup …
C66xx_0: Trouble Writing Memory Block at 0x2620338 on Page 0 of Length 0x4: (Error -1060 @ 0x2620338) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
C66xx_0: GEL: Error while executing OnTargetConnect(): Target failed to write 0x02620338 at (*((unsigned int *) 0x02620338)|=((temp<<24)&0xFF000000)) [evmc6678l.gel:226] at Init_Pll3(PLLM_PASS, PLLD_PASS) [evmc6678l.gel:870] at Global_Default_Setup_Silent() [evmc6678l.gel:577] at OnTargetConnect() .
C66xx_0: Trouble Reading Register ControlRegisters_CSR: (Error -1060 @ 0x41) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
C66xx_0: GEL Output: Invalidate All Cache…
C66xx_0: Trouble Writing Memory Block at 0x1845028 on Page 0 of Length 0x4: (Error -1060 @ 0x1845028) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
C66xx_0: GEL: Error calling OnPreFileLoaded(): Target failed to write 0x01845028
C66xx_0: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.
C66xx_0: Trouble Reading Register ControlRegisters_CSR: (Error -1060 @ 0x41) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
C66xx_0: Trouble Writing Register PC: (Error -1060 @ 0x5F) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
C66xx_0: Trouble Reading Register ControlRegisters_DNUM: (Error -1060 @ 0x50) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
C66xx_0: GEL: Error while executing OnRestart( 0 ): Target failed to read register ControlRegisters_DNUM at (DNUM==0) [evmc6678l.gel:771] at OnRestart(0) .
C66xx_0: Trouble Reading Register ControlRegisters_DNUM: (Error -1060 @ 0x50) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
C66xx_0: GEL: Error while executing OnFileLoaded( 0, 0): Target failed to read register ControlRegisters_DNUM at (DNUM==0) [evmc6678l.gel:667] at OnFileLoaded(0, 0) .
C66xx_0: AutoRun: Target not run as breakpoint could not be set: Error enabling this function: Claim hardware resource ownership failed.
C66xx_0: Trouble Reading Register ControlRegisters_CSR: (Error -1060 @ 0x41) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
请问一下，什么问题呀，谢谢！
第一次接触TMS320C6678，由于这个问题，不能往DSP中下载程序。
Nancy Wang：
C66xx_0: GEL Output: DDR3 memory test… Failed
您是直接使用的官网的GEL文件吗？如果是的话需要根据自制开发板重新配置DDR相关的寄存器并且修改GEL文件。参考以下链接：http://www.ti.com/lit/an/sprabl2e/sprabl2e.pdf
这两个链接也看一下。
http://www.ti.com/lit/an/spracl8/spracl8.pdf
http://www.ti.com/lit/an/sprabi1c/sprabi1c.pdf
Shine：
请问您的GEL文件是在EVM板的GEL文件上做修改的吗？看着打印了很多重复的初始化操作。请看一下是否按照下面文档中的步骤连接板子的？建议手动connect板子，不要直接点debug按钮。
2.2 Creating the Target Configuration File
www.ti.com/…/sprac17b.pdf
user4802057：
回复 Shine:
我是用的EVM板的GEL文件，不过不知道在哪里修改DDR3的信息，我也是估计DDR3配置的问题，能否说详细点，谢谢！
