我的McASP配置分别如下:
管脚的复用设置是:
void McASPPinMuxSetup(void)
{unsigned int savePinMux = 0;savePinMux = HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) & \~(SYSCFG_PINMUX0_PINMUX0_27_24 | \SYSCFG_PINMUX0_PINMUX0_23_20 | \SYSCFG_PINMUX0_PINMUX0_19_16 | \SYSCFG_PINMUX0_PINMUX0_15_12 | \SYSCFG_PINMUX0_PINMUX0_11_8 | \SYSCFG_PINMUX0_PINMUX0_7_4 | \SYSCFG_PINMUX0_PINMUX0_3_0);HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) = \(PINMUX0_MCASP0_AMUTE_ENABLE | PINMUX0_MCASP0_AHCLKX_ENABLE | \PINMUX0_MCASP0_AHCLKR_ENABLE | PINMUX0_MCASP0_AFSX_ENABLE | \PINMUX0_MCASP0_AFSR_ENABLE | PINMUX0_MCASP0_ACLKX_ENABLE | \PINMUX0_MCASP0_ACLKR_ENABLE | savePinMux);savePinMux = HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(1)) & \~(SYSCFG_PINMUX1_PINMUX1_19_16 | \SYSCFG_PINMUX1_PINMUX1_15_12 | \SYSCFG_PINMUX1_PINMUX1_11_8 | \SYSCFG_PINMUX1_PINMUX1_7_4| \SYSCFG_PINMUX1_PINMUX1_23_20 | \SYSCFG_PINMUX1_PINMUX1_27_24 | \SYSCFG_PINMUX1_PINMUX1_31_28);HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(1)) = \(PINMUX1_MCASP0_AXR11_ENABLE | \PINMUX1_MCASP0_AXR12_ENABLE | \PINMUX1_MCASP0_AXR13_ENABLE | \PINMUX1_MCASP0_AXR14_ENABLE | \PINMUX1_MCASP0_AXR8_ENABLE | \PINMUX1_MCASP0_AXR9_ENABLE | \PINMUX1_MCASP0_AXR10_ENABLE | \savePinMux);
}
1.McASPI2SConfigure(); McASP的配置程序如下:
static void McASPI2SConfigure(void)
{McASPRxReset(SOC_MCASP_0_CTRL_REGS);McASPTxReset(SOC_MCASP_0_CTRL_REGS);/* Enable the FIFOs for DMA transfer */
//McASPReadFifoEnable(SOC_MCASP_0_FIFO_REGS, 6, 1);
//McASPWriteFifoEnable(SOC_MCASP_0_FIFO_REGS, 1, 1);/* Set I2S format in the transmitter/receiver format units */McASPRxFmtI2SSet(SOC_MCASP_0_CTRL_REGS, WORD_SIZE, SLOT_SIZE,MCASP_RX_MODE_NON_DMA);McASPTxFmtI2SSet(SOC_MCASP_0_CTRL_REGS, WORD_SIZE, SLOT_SIZE,MCASP_TX_MODE_NON_DMA);/* Configure the frame sync. I2S shall work in TDM format with 2 slots */McASPRxFrameSyncCfg(SOC_MCASP_0_CTRL_REGS, 2, MCASP_RX_FS_WIDTH_WORD,MCASP_RX_FS_EXT_BEGIN_ON_FALL_EDGE);McASPTxFrameSyncCfg(SOC_MCASP_0_CTRL_REGS, 2, MCASP_TX_FS_WIDTH_WORD,MCASP_TX_FS_EXT_BEGIN_ON_RIS_EDGE);/* configure the clock for receiver */
//McASPRxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_INTERNAL, 16u, 16u);McASPRxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_EXTERNAL, 0, 0);McASPRxClkPolaritySet(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_POL_RIS_EDGE);McASPRxClkCheckConfig(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLKCHCK_DIV32,0x00, 0xFF);/* configure the clock for transmitter */
//HWREG(0x01D000A0) = (0x00001F00);
//McASPTxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_INTERNAL, 16u, 16u);McASPTxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_EXTERNAL, 0, 0);McASPTxClkPolaritySet(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_POL_FALL_EDGE);McASPTxClkCheckConfig(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLKCHCK_DIV32,0x00, 0xFF);/* Enable synchronization of RX and TX sections */McASPTxRxClkSyncEnable(SOC_MCASP_0_CTRL_REGS);/* Enable the transmitter/receiver slots. I2S uses 2 slots */McASPRxTimeSlotSet(SOC_MCASP_0_CTRL_REGS, I2S_SLOTS);McASPTxTimeSlotSet(SOC_MCASP_0_CTRL_REGS, I2S_SLOTS);/*** Set the serializers, Currently only one serializer is set as** transmitter and one serializer as receiver.*/McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_RX);McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 13u);McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 14u);McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 8u);McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 10u);McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 11u);McASPSerializerTxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_TX);/*** Configure the McASP pins** Input - Frame Sync, Clock and Serializer Rx** Output - Serializer Tx is connected to the input of the codec*/McASPPinMcASPSet(SOC_MCASP_0_CTRL_REGS, 0xFFFFFFFF);McASPPinDirOutputSet(SOC_MCASP_0_CTRL_REGS,MCASP_PIN_AXR(MCASP_XSER_TX)| MCASP_PIN_AMUTE);McASPPinDirInputSet(SOC_MCASP_0_CTRL_REGS,MCASP_PIN_AFSX| MCASP_PIN_AFSR| MCASP_PIN_AHCLKX| MCASP_PIN_AHCLKR| MCASP_PIN_ACLKX| MCASP_PIN_ACLKR| MCASP_PIN_AXR(MCASP_XSER_RX)| MCASP_PIN_AXR(1u<<(13u))| MCASP_PIN_AXR(1u<<(14u))| MCASP_PIN_AXR(1u<<(8u))| MCASP_PIN_AXR(1u<<(10u))| MCASP_PIN_AXR(1u<<(11u)));/* Enable error interrupts for McASP */McASPTxIntEnable(SOC_MCASP_0_CTRL_REGS,MCASP_TX_DATAREADY| MCASP_TX_CLKFAIL| MCASP_TX_SYNCERROR| MCASP_TX_UNDERRUN);McASPRxIntEnable(SOC_MCASP_0_CTRL_REGS,MCASP_RX_DATAREADY| MCASP_RX_CLKFAIL| MCASP_RX_SYNCERROR| MCASP_RX_OVERRUN);
//MCASP_RX_DMAERROR MCASP_TX_DMAERROR
}
2.运行完上述配置后激活发送接受I2SDataTxRxActivate(); 遇到这个问题:程序无法跳出红色部分的语句
static void I2SDataTxRxActivate(void)
{/* Start the clocks */McASPRxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_EXTERNAL);McASPTxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_EXTERNAL);/* Enable EDMA for the transfer */
//EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_CHA_MCASP0_RX,
//EDMA3_TRIG_MODE_EVENT);
//EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS,
//EDMA3_CHA_MCASP0_TX, EDMA3_TRIG_MODE_EVENT);/* Activate the serializers */
McASPRxSerActivate(SOC_MCASP_0_CTRL_REGS); McASPTxSerActivate(SOC_MCASP_0_CTRL_REGS);/* make sure that the XDATA bit is cleared to zero */while(McASPTxStatusGet(SOC_MCASP_0_CTRL_REGS) & MCASP_TX_STAT_DATAREADY);/* Activate the state machines */McASPRxEnable(SOC_MCASP_0_CTRL_REGS);McASPTxEnable(SOC_MCASP_0_CTRL_REGS);McASPTxBufWrite(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_TX, 0);
}
Tony Tang:
跟踪一下这个函数具体访问了什么寄存器,也可以在CCS里查看这个寄存器的状态。
TI中文支持网

