TI中文支持网应用ti的ti-sdk-am335x-evm-07.00.00.00版SDK软件包。请问都需要进行哪些配置修改，才能实现GPMC接口与FPGA的数据通信。多谢
leo chen：
你已经做了哪些修改呢？
在dts中
1、需要配置pinmux
2、需要配置gpmc
Yalan Han：
回复 leo chen:
谢谢您的回复！
pinmux配置如下：fpga_pins_default: fpga_pins_default { pinctrl-single,pins = < 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ 0x20 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad0 */ 0x24 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad1 */ 0x28 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad2 */ 0x2c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad3 */ 0x30 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad4 */ 0x34 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad5 */ 0x38 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad6 */ 0x3c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad7 */ /*0x40 (PIN_OUTPUT | MUX_MODE1) 0x44 (PIN_OUTPUT | MUX_MODE1) 0x48 (PIN_OUTPUT | MUX_MODE1) 0x4c (PIN_OUTPUT | MUX_MODE1) 0x50 (PIN_OUTPUT | MUX_MODE1) 0x54 (PIN_OUTPUT | MUX_MODE1) 0x58 (PIN_OUTPUT | MUX_MODE1) 0x5c (PIN_OUTPUT | MUX_MODE1) 0x60 (PIN_OUTPUT | MUX_MODE1) 0x64 (PIN_OUTPUT | MUX_MODE1) 0x68 (PIN_OUTPUT | MUX_MODE1) 0x6c (PIN_OUTPUT | MUX_MODE1)*/ 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ 0x80 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */ 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ >; }; nandflash_pins_sleep: nandflash_pins_sleep { pinctrl-single,pins = < 0x0 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x4 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x8 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0xc (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) >; };
pinmux里没有配置nand了。
gpmc配置如下：
gpmc: gpmc@50000000 { status = "okay"; pinctrl-names = "default";//, "sleep"; pinctrl-0 = <&fpga_pins_default>; //pinctrl-1 = <&nandflash_pins_sleep>; ranges = <0 0 0x08000000 0x10000000>, <1 0 0x20000000 0x08000000>; /* CS0: NAND */ nand@0,0 { reg = <0 0 0>; /* CS0, offset 0 */ nand-bus-width = <16>; gpmc,device-width = <1>; gpmc,sync-clk-ps = <0>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <44>; gpmc,cs-wr-off-ns = <44>; gpmc,adv-on-ns = <6>; gpmc,adv-rd-off-ns = <34>; gpmc,adv-wr-off-ns = <44>; gpmc,we-on-ns = <0>; gpmc,we-off-ns = <40>; gpmc,oe-on-ns = <0>; gpmc,oe-off-ns = <54>; gpmc,access-ns = <64>; gpmc,rd-cycle-ns = <82>; gpmc,wr-cycle-ns = <82>; gpmc,wait-on-read = "true"; gpmc,wait-on-write = "true"; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; gpmc,wait-monitoring-ns = <0>; gpmc,wr-access-ns = <40>; gpmc,wr-data-mux-bus-ns = <0>; ti,nand-ecc-opt= "bch8"; ti,elm-id = <&elm>; /* MTD partition table */ /* All SPL-* partitions are sized to minimal length * which can be independently programmable. For * NAND flash this is equal to size of erase-block */ #address-cells = <1>; #size-cells = <1>; partition@0 { label = "NAND.SPL"; reg = <0x00000000 0x000020000>; }; partition@1 { label = "NAND.SPL.backup1"; reg = <0x00020000 0x00020000>; }; partition@2 { label = "NAND.SPL.backup2"; reg = <0x00040000 0x00020000>; }; partition@3 { label = "NAND.SPL.backup3"; reg = <0x00060000 0x00020000>; }; partition@4 { label = "NAND.u-boot-spl-os"; reg = <0x00080000 0x00040000>; }; partition@5 { label = "NAND.u-boot"; reg = <0x000C0000 0x00100000>; }; partition@6 { label = "NAND.u-boot-env"; reg = <0x001C0000 0x00020000>; }; partition@7 { label = "NAND.u-boot-env.backup1"; reg = <0x001E0000 0x00020000>; }; partition@8 { label = "NAND.kernel"; reg = <0x00200000 0x00800000>; }; partition@9 { label = "NAND.file-system"; reg = <0x00A00000 0x0F600000>; }; }; nor@1,0 { compatible = "cfi-flash"; #address-cells = <1>; #size-cells = <1>; reg = <1 0 0x08000000>; bank-width = <2>; /*gpmc,mux-add-data = <2>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <186>; gpmc,cs-wr-off-ns = <186>; gpmc,adv-on-ns = <12>; gpmc,adv-rd-off-ns = <48>; gpmc,adv-wr-off-ns = <48>; gpmc,oe-on-ns = <54>; gpmc,oe-off-ns = <168>; gpmc,we-on-ns = <54>; gpmc,we-off-ns = <168>; gpmc,rd-cycle-ns = <186>; gpmc,wr-cycle-ns = <186>; gpmc,access-ns = <114>; gpmc,page-burst-access-ns = <6>; gpmc,bus-turnaround-ns = <12>; gpmc,cycle2cycle-delay-ns = <18>; gpmc,wr-data-mux-bus-ns = <90>; gpmc,wr-access-ns = <186>; gpmc,cycle2cycle-samecsen; gpmc,cycle2cycle-diffcsen;*/ /*partition@0 { label = "bootloader-nor"; reg = <0 0x40000>; }; partition@0x40000 { label = "params-nor"; reg = <0x40000 0x40000>; }; partition@0x80000 { label = "kernel-nor"; reg = <0x80000 0x200000>; }; partition@0x280000 { label = "filesystem-nor"; reg = <0x240000 0x7d80000>; };*/ }; }; };
硬件fpga的片选为CS1。请您帮忙看看是否有不对的地方，多谢
Yalan Han：
没有人知道么？请求帮助啊！多谢
