AM335X搭配DDR3阻抗设定

AM335X datasheet写

Single-ended impedance, Zo  Typ 50Ohm，Max 75Ohm.

CK spacing set to ensure proper differential impedance. Differential impedance should be Zo x 2, where Zo is the single-ended
impedance.

DQS[x] pair spacing is set to ensure proper differential impedance. Differential impedance should be Zo x 2, where Zo is the singleended
impedance.

1.请问DQ，DQLM，ADDR，CTRL这些Single-end信号设定阻抗50Ohm，差分信号CK ，DQS[x] 的阻抗设定100Ohm，这样设定是否OK？

2.有去参考TMDSSK3358_3H0009_REV1_2A_PCB_0531.brd和BeagleBone_Black_revB6_nologo.brd，没有叠层结构（stackup impedance）无法得知具体是设定多少Ohm的阻抗，请问是否有叠构表可以参考呢？

Shine：

1.可以这样设定。

2. 请参考下面的帖子。
e2e.ti.com/…/407051