cc1310 RTOS 中断计时问题

你好！

我遇到一个问题，使用CC1310 , TI RTOS， 希望可以测量一个周期变化的PWM信号源的每一个波形实时周期。 

使用的是PIN Interrupt 的方式，配置上拉，下降沿或者双沿触发。然后在PIN interrupt 回调含税里计数并计时。 

发现有时会漏掉PWM波形，也就是说没有引起触发。

信号源PWM信号的最小周期大概是25uS， 长一点的有100uS。 

我想问导致中断漏掉的原因是什么？  会不会和RTOS有关系，如任务优先级等原因？  还是不可以这样操作？  现在我测量的是一路信号，并且是一个测试程序，没有其他任务的执行。 后续我会加一些工作任务，并且测试几路这样的信号。  请问是否可行（系统在瞬时可能需要承受频繁外部IO中断）？

谢谢

Tyler

Felix ZF：

你可以考虑一下使用CC1310的Sensor Control Engine中的TDC（Time to digital converter）来实现你的应用。

你可以通过Sensor Control Studio的help了解TDC的相关功能。

Description

Time to digital converter

The TDC peripheral is a high-precision time-to-digital converter for measuring the time between a configurable start trigger and a configurable stop trigger.

For capacitive touch sensing, the TDC is used together with the ISRC and COMPA peripherals. ISRC will then drive an internal reference voltage for COMPA, nominally 0.8 V, while charging the capacitance that is also connected to the COMPA input. The time from start of charging until the COMPA output goes high is measured using the TDC.

Note that the TI-provided Power driver (used in SimpleLink SDKs for CC13xx and CC26xx devices) uses the TDC for RCOSC calibration, and that the Peripheral Sharing resource must be used to handle this safely.

TDC Behavior

The TDC starts counting when the start trigger occurs, and stops counting when the stop trigger has occurred a configurable number of times.

The TDC counts at either 96 MHz (generated by RCOSC) or 48 MHz (generated by RCOSC or XOSC). Note that using XOSC as counter clock source can interfere with fast XOSC startup for the application and radio stack, and can potentially break radio protocol timing.

Timing requirements for start and stop triggers vary between different use cases. See the Use Cases section below for details. For frequency/period measurements on a single signal, the maximum signal frequency is 2.4 MHz. To measure a higher frequency signal, up to 24 MHz, the TDC prescaler must be used. The prescaler detects rising edges on the input signal, and effectively divides the signal frequency by a factor 16 or 64.

The TDC startup can either be synchronous or asynchronous:

In asynchronous startup, the start trigger must be idle before the start trigger occurs (low before a rising edge start trigger, or high before a falling edge start trigger). This mode can be used when the start signal is controlled from Sensor Controller task code, and can be triggered after the TDC has been armed.
In synchronous startup, an opposite edge must occur on the start trigger signal before the start trigger can occur. This mode must be used when the start trigger is a continuous signal (for example a clock signal) that is not idle when the TDC is armed.

Use Cases

Below are the main supported use cases:

Measure width of a single pulse

Select the same signal as start and stop triggers, with opposite polarity
Select stop trigger ignore count 0
Use asynchronous start
Timing requirements:

Signal must be idle before the start trigger occurs
Time between start trigger and stop trigger: 292 ns or more
Signal must be idle after the after stop trigger for: 42 ns or more

Measure N periods of a continuous signal (for example a clock signal), frequency up to 2.4 MHz

Select the same signal as start and stop triggers, with same polarity
Select stop trigger ignore count N

Stop trigger ignore count must be N rather than N – 1 because the stop signal is active at startup

Use synchronous start
Timing requirements:

Signal must be high for: 210 ns or more
Signal must be low for: 210 ns or more

Measure N periods of a continuous signal (for example a clock signal), frequency up to 24 MHz

Enable the TDC prescaler with division factor 16 or 64
Select TDC prescaler as start and stop trigger
Select stop trigger ignore count N / "prescaler division factor"

Stop trigger ignore count must be N rather than N – 1 because the stop signal is active at startup

Use synchronous start
Timing requirements:

Time between rising edges on the signal: 42 ns or more

Measure time from a single edge on one signal to the N'th edge on another signal

Select different signals as start and stop triggers
Select stop trigger ignore count N – 1
Use asynchronous or synchronous start
Timing requirements:

For asynchronous start: Start trigger signal must be idle before the start trigger occurs
For synchronous start: Start trigger signal must be idle before start trigger occurs for: 126 ns or more
Start trigger signal must be active for: 42 ns or more
At startup, the stop trigger signal must be idle until: 168 ns or more after start trigger has occurred
Stop trigger signal must be active for: 42 ns or more
For N > 1, the stop trigger signal must be idle between stop triggers for: 168 ns or more