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Memory map error:READ access by cpu to address 0x1b3f018(Device Config Space)which is not supported in simulator

load程序到DM642开发板上之后,点击了run按钮出现了如下的错误:

Memory map error:READ access by cpu to address 0x1b3f018(Device Config Space)which is not supported in simulator

我检查了CMD文件应该是没有问题的,CMD代码内容如下:

/*
 * Copyright (C) 2004 SEED Incorporated
 * All Rights Reserved
 */
/*
 *---------timer1.cmd---------
 *
 */
-l.\lib\cslDM642.lib
-l.\lib\rts6400.lib
MEMORY
{L2 : o = 00000400h l = 0003fb00h  /* all SRAM ,L2,为DSP片内存储器,是第2级存储器[第一级存储器包括独立的程序Cach(L1P)和数据Cach(L1D) ],它是一个统一的空间,部分程序和数据,统称为L2,可以作为普通的SRAM映射到存储空间*/CE01: o = 80000000h l = 00100000h /* external memory*/CE02: o = 80100000h l = 00f000000h /* external memory*/
}

SECTIONS
{.cinit>L2  /*初始化变量和常数表*/.text>L2  /*可执行代码段的映射*/.stack>L2  /*为系统堆栈分配存储器。该段用于将变量传递至函数或者用来分配局部变量*/.bss>L2  /*保留全局和静态变量空间。在启动和导入的时候,C/C++编译器会会启动程序将.cint段中的数据复制出来,以初始化.bss段中的变量*/.const>L2/*包含由C/C++限定词const定义的字符常量和数据*/.data>L2/*初始化数据段*/.far>L2/*供外部文件调用的变量*/.switch>L2/*控制语句段映射*/.sysmem>L2/*初始化系统空间*/.tables>L2/*初始化数据表*/.cio>L2/*io口*/.capChaAYSpace>CE01.capChaACbSpace>CE01/* .capChaACbSpace>L2*//* .capChaACrSpace>L2*/.capChaACrSpace>CE01.disChaAYSpace>CE02.disChaACbSpace>CE02.disChaACrSpace>CE02.external>CE02/*外部变量的初始化*/
}

这个配置应该是没有问题的,接下来我查看了工程里面的GEL文件,文件内容如下:

/*--------------------------------------------------------------*/
/* EVMDM642.gel*/
/* Version 1.70*/
/**/
/* This GEL file is designed to be used in conjunction with*/
/* CCS 2.20.18 and the TMS320DM642 based EVM.*/
/**/
/*--------------------------------------------------------------*/

/*--------------------------------------------------------------*/
/* The StartUp() function is called each time CCS is started.*/
/* Customize this function to perform desired initialization.*/
/*--------------------------------------------------------------*/

StartUp()
{setup_memory_map();GEL_Reset();init_emif();
} 

/*--------------------------------------------------------------*/
/* Setup memory map for DM642 EVM.*/
/**/
/*--------------------------------------------------------------*/
setup_memory_map()
{GEL_MapOn();GEL_MapReset();/* On-chip memory map */GEL_MapAdd(0x00000000, 0, 0x00040000, 1, 1); /* Internal Memory*/GEL_MapAdd(0x01800000, 0, 0x00000058, 1, 1); /* EMIFA CTL REGS*/GEL_MapAdd(0x01840000, 0, 0x000082FC, 1, 1); /* INT MEM CTL REGS*/GEL_MapAdd(0x018C0000, 0, 0x0000003C, 1, 1); /* MCBSP0 CTL REGS*/GEL_MapAdd(0x01900000, 0, 0x0000003C, 1, 1); /* MCBSP1 CTL REGS*/GEL_MapAdd(0x01940000, 0, 0x00000008, 1, 1); /* TIMER0 CTL REGS*/GEL_MapAdd(0x01980000, 0, 0x00000008, 1, 1); /* TIMER1 CTL REGS*/GEL_MapAdd(0x019C0000, 0, 0x00000008, 1, 1); /* INT CTL REGS*/GEL_MapAdd(0x01A00000, 0, 0x0000FFFC, 1, 1); /* EDMA REGS AND PARAM*/GEL_MapAdd(0x01A40000, 0, 0x0000003C, 1, 1); /* MCBSP2 CTL REGS*/GEL_MapAdd(0x01A80000, 0, 0x00000058, 1, 1); /* EMIFB CTL REGS*/GEL_MapAdd(0x01AC0000, 0, 0x00000008, 1, 1); /* TIMER2 CTL REGS*/GEL_MapAdd(0x01B00000, 0, 0x00000024, 1, 1); /* GPIO REGS*/GEL_MapAdd(0x01B3F000, 0, 0x00000020, 1, 1); /* Device Configuration  */GEL_MapAdd(0x01B40000, 0, 0x0000003C, 1, 1); /* I2C CTL REGS*/GEL_MapAdd(0x01B4C000, 0, 0x000002A0, 1, 1); /* McASP0 CTL REGS*/GEL_MapAdd(0x01C00000, 0, 0x00000028, 1, 1); /* PCI CTL REGS*/GEL_MapAdd(0x01C20000, 0, 0x0000000C, 1, 1); /* PCI EEPROM REGS*/GEL_MapAdd(0x01C40000, 0, 0x00000270, 1, 1); /* VP0 Control*/GEL_MapAdd(0x01C44000, 0, 0x00000270, 1, 1); /* VP1 Control*/GEL_MapAdd(0x01C48000, 0, 0x00000270, 1, 1); /* VP2 Control*/GEL_MapAdd(0x01C80000, 0, 0x00000680, 1, 1); /* EMAC CTL REGS*/GEL_MapAdd(0x01C81000, 0, 0x00002000, 1, 1); /* EMAC Wrapper*/GEL_MapAdd(0x01C83000, 0, 0x0000000C, 1, 1); /* EWRAP REGS*/GEL_MapAdd(0x01C83800, 0, 0x00000090, 1, 1); /* MDIO CTL REGS*/GEL_MapAdd(0x02000000, 0, 0x00000030, 1, 1); /* QDMA REGS*/GEL_MapAdd(0x30000000, 0, 0x04000000, 1, 1); /* MCBSP0 Data, EDMA map */GEL_MapAdd(0x34000000, 0, 0x04000000, 1, 1); /* MCBSP1 Data, EDMA map */GEL_MapAdd(0x74000000, 0, 0x02000000, 1, 1); /* VP0 Channel A Data*/GEL_MapAdd(0x76000000, 0, 0x02000000, 1, 1); /* VP0 Channel B Data*/GEL_MapAdd(0x78000000, 0, 0x02000000, 1, 1); /* VP1 Channel A Data*/GEL_MapAdd(0x7A000000, 0, 0x02000000, 1, 1); /* VP1 Channel B Data*/GEL_MapAdd(0x7C000000, 0, 0x02000000, 1, 1); /* VP2 Channel A Data*/GEL_MapAdd(0x7E000000, 0, 0x02000000, 1, 1); /* VP2 Channel B Data*//* Off-chip memory map */GEL_MapAdd(0x80000000, 0, 0x02000000, 1, 1); /* 32MB SDRAM EMIF-A, CE0*/GEL_MapAdd(0x90000000, 0, 0x00080000, 1, 1); /* 4MB Flash EMIF-A, CE1 */GEL_MapAdd(0x90080000, 0, 0x00080000, 1, 1); /* 4MB FPGA EMIF-A, CE1  */GEL_MapAdd(0xA0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE2 EXPANSION */GEL_MapAdd(0xB0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE3 EXPANSION */
}

我的硬件的配置时 CCS3.3+SEED-DKT-VPM642+SEED-XDS560PLUS Emulator
下面是工程run过程的Message:

Seven Han:

你好,请检查下你的仿真器配置,另外DM642是属于达芬奇系列的,你也可以到达芬奇达芬奇(Davinci™)论坛咨询。

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