LMH1983: PLL1输出时钟调整

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Arrow Chen：

配置寄存器如下:

i2c_updateSettings_bits(XPAR_IIC_0_DEVICE_ID,LMH1983_ADDR,0x05,0x20,0x00);

//1080P30 //set vsync code and input format data=FORMAT_CODE_1080p30; i2c_WriteSettings(XPAR_IIC_0_DEVICE_ID,LMH1983_ADDR,0x20,data); data=VSYNC_CODE_4_30; i2c_WriteSettings(XPAR_IIC_0_DEVICE_ID,LMH1983_ADDR,0x21,data);

int divide_n=900; data=(divide_n>>8)&0xff; i2c_WriteSettings(XPAR_IIC_0_DEVICE_ID,LMH1983_ADDR,0x2B,data); data=divide_n&0xff; i2c_WriteSettings(XPAR_IIC_0_DEVICE_ID,LMH1983_ADDR,0x2C,data);

但是实际结果是:没有lock住并且input format读取异常

status 0X00:0x6status 0X01:0x60status 0X02:0x80control 0X05:0xb[b5:EN_AFD]input format 0X20:0x3einput fps code 0X21:0x4PLL1 R:0x0 0x1PLL1 N:0x3 0x84

,

Eirwen：

已经收到了您的案例，调查需要些时间，感谢您的耐心等待。

,

Links：

您好，

正确，您需要手动将反馈分频器设置为4000 (6.74326k x 4000 = 26.97304 MHz)

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