TI中文支持网Part Number:AM623
AM623的Main_SPI0作为主机，FPGA作为从机，通过中断的方式，能否达到20ms 128*32 byte呢？目前打算通过GPIO中断直接进行SPI读写数据，然后通过DMA给到内存，请问这个方案有什么问题吗？如果可以实现能否提供下这个方案实现上的帮助呢？例如：Main_SPI0如何配置为DMA模式，还有如何操作可以通过GPIO中断实现SPI数据读写呢？
Shine：
感谢您对TI产品的关注！由于问题比较复杂，已将您的问题发布在E2E英文技术论坛上，由资深的英文论坛工程师为您提供帮助。 您也可以点击下帖链接了解进展：https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1317716/am623-main_spi0-performance
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bu yuying：
嗯嗯，谢谢，需求是FPGA做ADC采样，速度是20ms 128*32 byte，然后给个中断给到CPU，CPU在中断读取FPGA的数据
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Shine：
不客气~
已把您的项目需求更新到帖子里了。
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Shine：
工程师想了解您是否想知道怎么去用GPIO中断启动SPI传输？下面是工程师的回复。
I understand that the customer is using FPGA(Field Programmable Gate Array) as peripheral and AM62x's MAIN_SPI0 as the master.
So currently I can interpret from your question that you want to know how to initiate SPI transfer using GPIO Interrupts. Is my understanding correct ?
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bu yuying：
对的，想在GPIO中断了去使用SPI读取，原本的方案是FPGA作为主机，A核作为从机，然后FPGA给数据A核接收，但是现在驱动没有从机，所以才使用A核作为主机，FPGA作为从机的方式，FPGA通过ADC采集到数据后触发GPIO中断，然后A核收到中断后在中断里直接去操控SPI读取数据
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Shine：
已跟进，请关注帖子的回复。
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Shine：
工程师还有一个问题。
您是使用linux还是使用MCU PLUS SDK?
如果使用的是MCU PLUS SDK，他想知道您是怎么初始化SoC的？因为有许多方式可以用来初始化SoC。
One more follow up question.
So is this Linux centric approach customer is applying or are they using MCU PLUS SDK ?
If its MCU PLUS SDK, I want to know what has the customer used for SoC Initialization as they are many ways to initialize the SoC.
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bu yuying：
A核使用的是Linux
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bu yuying：
因为通过时间片轮询的方式去中断读取spi的数据太慢了，不好把控，所以才想直接在中断读取，需求是2ms必须读取一次spi
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Shine：
已跟进，请关注帖子的回复。
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Shine：
请看下面e2e工程师的回复。
Reading something from SPI every 20ms in an interrupt-driven way should not be an issue; interrupt response time and context switch times should be in the range of 10s of us (depending on system as well as kernel configuration), leaving plenty of time for processing.
On a high-level here's one way get the data moving from the FPGA to the AM62:
Implement a custom Kernel driver leveraging the Linux IIO framework (https://www.kernel.org/doc/html/latest/driver-api/iio/index.html). It's almost perfectly tailored for this use case, and allows for easy access of the data though a sysfs interface
In the custom driver, use/configure the SPI interface, and use a GPIO-based interrupt scheme. The reading/writing of data from the FPGA over SPI can either be done through SPI framework commands, or the 'regmap' abstraction layer, like many of the existing IIO drivers do.
You can look for and clone an existing SPI-based IIO driver that uses interrupts as a template for a custom driver, such as this one here: https://www.ti2k.com/wp-content/uploads/ti2k/DeyiSupport_DSP_gitweb
Then you can also see at the associated device tree bindings to see how the device is configured, and how interrupts are connected, as an example to model after: https://www.ti2k.com/wp-content/uploads/ti2k/DeyiSupport_DSP_gitweb
