TMS320F28035: PWM怎样才能初始低电平

我的28035在还没发波前epwm2a和epwm3a输出的是高电平，这样会导致开关同时导通而短路，我想让pwm波形在初始状态（未通电）时是低电平，应该怎么操作呢，谢谢

chenzheng：

void InitEPwm2(void)
{EPwm2Regs.TBPRD = TB_PERIOD;EPwm2Regs.CMPA.half.CMPA = DUTY_VALUE;EPwm2Regs.TBPHS.half.TBPHS = 0;// Set Phase register to zeroEPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUTEPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical modeEPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;// Master moduleEPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW;EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=ZeroEPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=ZeroEPwm2Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPwm2AEPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;//EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR; // set actions for EPwm2A//EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;// Interrupt where we will change the Compare ValuesEPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero eventEPwm2Regs.ETSEL.bit.INTEN = 1;// Enable INTEPwm2Regs.ETPS.bit.INTPRD = ET_1ST;// Generate INT on 3rd eventEPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band moduleEPwm2Regs.DBFED = DB_VALUE; // FED = 300 TBCLKs initiallyEPwm2Regs.DBRED = DB_VALUE; // RED = 300 TBCLKs initially
}void InitEPwm3(void)
{EPwm3Regs.TBPRD = TB_PERIOD; // Period = 15000 TBCLK countsEPwm3Regs.CMPA.half.CMPA = DUTY_VALUE;EPwm3Regs.TBPHS.half.TBPHS = 0;// Set Phase register to zero initiallyEPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUTEPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical modeEPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;// Slave moduleEPwm3Regs.TBCTL.bit.PRDLD = TB_SHADOW;EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-throughEPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=ZeroEPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=Zero//EPwm3Regs.AQCTLA.bit.ZRO = AQ_CLEAR; // set actions for EPwm3A//EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPwm3AEPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;// Interrupt where we will change the Compare ValuesEPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero eventEPwm3Regs.ETSEL.bit.INTEN = 1;// Enable INTEPwm3Regs.ETPS.bit.INTPRD = ET_1ST;// Generate INT on 3rd eventEPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band moduleEPwm3Regs.DBFED = DB_VALUE; // FED = 30 TBCLKs initiallyEPwm3Regs.DBRED = DB_VALUE; // RED = 40 TBCLKs initially// Run Time (Note: Example execution of one run-time instant)//============================================================EPwm3Regs.TBPHS.half.TBPHS = TB_PERIOD / 2;//EPwm3Regs.TBPHS.half.TBPHS = 15000 - yixiangjiao; // Set Phase reg to 300/1200 * 360 = 90 deg//EPwm3Regs.DBFED = FED2_NewValue; // Update ZVS transition interval//EPwm3Regs.DBRED = RED2_NewValue; // Update ZVS transition interval
}

这是我pwm2和pwm3的配置代码，基本上一样，只是pwm3有一半周期的位移

,

Ben Qin：

chenzheng said:我的28035在还没发波前epwm2a和epwm3a输出的是高电平

还没发波前就是高电平，那么可能是IO的配置问题。

,

chenzheng：

你好，我的IO口配置如下：

//
// InitEPwm2Gpio - This function initializes GPIO pins to function as EPwm2
//
voidInitEPwm2Gpio(void)
{EALLOW;//// Disable internal pull-up for the selected output pins// for reduced power consumption// Pull-ups can be enabled or disabled by the user.// This will enable the pullups for the specified pins.// Comment out other unwanted lines.//GpioCtrlRegs.GPAPUD.bit.GPIO2 = 1;// Disable pull-up on GPIO2 (EPWM2A)GpioCtrlRegs.GPAPUD.bit.GPIO3 = 1;// Disable pull-up on GPIO3 (EPWM2B)//// Configure EPwm-2 pins using GPIO regs// This specifies which of the possible GPIO pins will be// EPWM2 functional pins.// Comment out other unwanted lines.//GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1;// Configure GPIO2 as EPWM2AGpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1;// Configure GPIO3 as EPWM2BEDIS;
}//
// InitEPwm3Gpio - This function initializes GPIO pins to function as EPwm3
//
voidInitEPwm3Gpio(void)
{EALLOW;// Disable internal pull-up for the selected output pins// for reduced power consumption// Pull-ups can be enabled or disabled by the user.// This will enable the pullups for the specified pins.// Comment out other unwanted lines.//GpioCtrlRegs.GPAPUD.bit.GPIO4 = 1;// Disable pull-up on GPIO4 (EPWM3A)GpioCtrlRegs.GPAPUD.bit.GPIO5 = 1;// Disable pull-up on GPIO5 (EPWM3B)//// Configure EPwm-3 pins using GPIO regs// This specifies which of the possible GPIO pins will be// EPWM3 functional pins.// Comment out other unwanted lines.//GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1;// Configure GPIO4 as EPWM3AGpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1;// Configure GPIO5 as EPWM3BEDIS;
}

就是把GUAPUD和GPAMUX都设置为1，是否需要修改？谢谢

,

Ben Qin：

你好，GPIO应该没问题。你这里设置了couznter 等于0的时候置位，尝试将其改成清零。

EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET;

,

chenzheng：

你好，我的代码里 设置的是：

EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET;  EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;

这与你回答的

EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET;

是一样的呀，是要把我代码里的

EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;

这一行删掉吗，谢谢。

,

Ben Qin：

不是的，把

EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET

改成

EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR

,

chenzheng：

好的，那还需要把

EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;

改成

EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;

吗？因为CAU和ZRO好像是一起设置的

,

Ben Qin：

对的，这里是要一起设置的。

,

Barbecue：

PWM对应IO初始化时禁用上拉

PWM初始化前，先手动OST

这样就可以了

在开机时复位OST。

,

chenzheng：

我之前设置过，设置之后占空比的大小变了

,

chenzheng：

具体怎么操作呢，谢谢

,

Barbecue：

强制关
EPwm1Regs.TZFRC.bit.OST = 1;

清除强制关

EPwm1Regs.TZCLR.all     = 0x3F;

操作类似上面代码

,

chenzheng：

你好，您给的这两行代码应该放在epwm配置代码里的哪个位置呢，谢谢

,

Barbecue：

上面代码在EPWM初始化前。

,

chenzheng：

void InitEPwm2(void)
{EPwm2Regs.TZFRC.bit.OST = 1;EPwm2Regs.TZCLR.all = 0*3F;EPwm2Regs.TBPRD = TB_PERIOD;EPwm2Regs.CMPA.half.CMPA = DUTY_VALUE;EPwm2Regs.TBPHS.half.TBPHS = 0;// Set Phase register to zeroEPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUTEPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical modeEPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;// Master moduleEPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW;EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=ZeroEPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=Zero//EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPwm2A
//EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR;EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;//EPwm2Regs.AQCSFRC.bit.CSFA = 0;// Interrupt where we will change the Compare ValuesEPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero eventEPwm2Regs.ETSEL.bit.INTEN = 1;// Enable INTEPwm2Regs.ETPS.bit.INTPRD = ET_1ST;// Generate INT on 3rd eventEPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band moduleEPwm2Regs.DBFED = DB_VALUE; // FED = 300 TBCLKs initiallyEPwm2Regs.DBRED = DB_VALUE; // RED = 300 TBCLKs initially}void InitEPwm3(void)
{EPwm3Regs.TZFRC.bit.OST = 1;EPwm3Regs.TZCLR.all = 0*3F;EPwm3Regs.TBPRD = TB_PERIOD; // Period = 15000 TBCLK countsEPwm3Regs.CMPA.half.CMPA = DUTY_VALUE;EPwm3Regs.TBPHS.half.TBPHS = 0;// Set Phase register to zero initiallyEPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUTEPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical modeEPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;// Slave moduleEPwm3Regs.TBCTL.bit.PRDLD = TB_SHADOW;EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-throughEPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=ZeroEPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=Zero//EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPwm3A
//EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;EPwm3Regs.AQCTLA.bit.ZRO = AQ_CLEAR;EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;//EPwm3Regs.AQCSFRC.bit.CSFA = 0;// Interrupt where we will change the Compare ValuesEPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero eventEPwm3Regs.ETSEL.bit.INTEN = 1;// Enable INTEPwm3Regs.ETPS.bit.INTPRD = ET_1ST;// Generate INT on 3rd eventEPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band moduleEPwm3Regs.DBFED = DB_VALUE; // FED = 30 TBCLKs initiallyEPwm3Regs.DBRED = DB_VALUE; // RED = 40 TBCLKs initially// Run Time (Note: Example execution of one run-time instant)//============================================================EPwm3Regs.TBPHS.half.TBPHS = TB_PERIOD / 2;//EPwm3Regs.TBPHS.half.TBPHS = 15000 - yixiangjiao; // Set Phase reg to 300/1200 * 360 = 90 deg//EPwm3Regs.DBFED = FED2_NewValue; // Update ZVS transition interval//EPwm3Regs.DBRED = RED2_NewValue; // Update ZVS transition interval}

你好，是像这样，在epwm2和epwm3配置的第一航添加您说的代码进去吗，谢谢