TXS0102-Q1: vil QUESTION

in the datasheet, both the VIL of the power A/B sid is 0.15V(max), for example,  if we use the chip for I2C levelshift, if the low logic higher than 0.15V in B side, what is the logic in A side? I think if B side high than 0.15V, the chip could not recongnize the signal as "LOW" logic in cornern case, so that the output in the A side, it will show as "high " logic? thanks.

Amy Luo：

Hi Ziyang,

No, the TXS behaves as an analog switch, when output low, the voltage at the output is equal to Equation :

VOL = VIL + IOL × Rpass

where

• Rpass is the on-state resistance of the pass transistor.

• IOL is the current flowing through the pass transistor

When you have devices A <-> TXS <-> B, then the VOL of A plus the FET voltage drop must match the VIL of B, and the VOL of B plus the FET voltage drop must match the VIL of A. For the voltage drop, see figure 2 of the Factors Affecting VOL for TXS and LSF Auto-bidirectional Translation Devices application note.

more information see the FAQ:

[FAQ] Why are the TXS01xx VIH/VIL specifications so stringent?

,

ZIYANG LAI：

hi Amy，thanks for your information.