Part Number:AWR2944EVMOther Parts Discussed in Thread:UNIFLASH, AWR2944
- in sop[2:0]=101 UART Boot Mode,I use python script to download these three image: sbl_uart_uniflash.release.tiimage, sbl_qspi.release.tiimage, ti/utils/ccsdebug/awr2944_ccsdebug.appimage
- in sop[2:0]=001 QSPI Boot Mode, I open Code Composer Studio,create a 2944.ccxml target configuration to debug myself app code, I can just connect cotex_R5_0,the other two core,I can not connect well.
So.my problem is that How to connect these core well and to debug myself app code.
By the way, I changed the SDK to mmwave_mcuplus_sdk_04_03_00_01,and use the same way to flash images, I can connect coretex-r5_0 and dsp (not connect coretex-r5_1). When I use mmwave_mcuplus_sdk_04_02_00_02 ,I can just connect coretex-r5_0,so please help me with this problem.
Thanks!



Cherry Zhou:
Hi,
We've got the issue and are looking help from our expert, please expect the response.
Thanks.
,
Cherry Zhou:
Hi,
In AWR2944, the device operates in lockstep mode by default. Meaning the second R5 core will be following the first cores execution in lockstep and the second R5 core cannot be used/connected to by the user (Only R5F_0 and DSP core can be connected). This is as per the safety requirement and is expected when the device is running in lockstep mode. Operating the device in non-lockstep mode (i.e dual core mode) is not recommended in AWR2944.
Thanks.
,
Xiang Liping:
but i just connect r5f_0,not dsp!
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