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LMK05318B: Synchronizing GPS Clock with LMK05318B

Part Number:LMK05318B

Hi, TI suppor team

I would like to seek some assistance regarding the usage of the LMK05318B device, and I sincerely appreciate your help.

I intend to use the LMK05318B device to synchronize the PPS (Pulse-Per-Second) clock output from a GPS module and generate a 100MHz clock for an FPGA.

I have two specific questions regarding this usage:

  1. Can the LMK05318B achieve this functionality? And does the outputted 100MHz clock remain synchronized with the PPS clock?

  2. Suppose I have two separate boards, each equipped with the LMK05318B. Can the 100MHz clocks generated by the LMK05318B on these two boards be considered synchronized? Alternatively, under the assumption of a strong GPS signal, is the frequency and phase difference between the 100MHz clocks on the two boards the same and fixed?

  3. What register configurations are required to achieve this functionality, and what reference materials can I consult for further information?

I genuinely appreciate your valuable insights and assistance on this matter.

Warmest regards,

Du.

Cherry Zhou:

Hi,

We've got the issue and asked help from our experts, please expect the response.

Thanks

,

Cherry Zhou:

Hi,

Yes and yes. The LMK05318B is a network synchronizer; using the DPLL, the output (100 MHz) will lock to and remain synchronized to the reference (PPS input).
If the two devices are locked to the same reference (e.g. PPS), then they will both be synchronzied to that reference. The DPLL's job is to update the VCO frequency to ensure the outputs continue to track the reference which means that the DPLL across devices will continously work to stay locked to the input.
Please download TICSPRO-SW. We have an LMK05318B guide available in the attached PDF.

LMK05318B TICS Pro GUI Overview_april 25 2023.pdf

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