TMS320x2802x, 2803x Piccolo Serial Peripheral Interface (SPI) Reference Guide
Literature Number: SPRUG71B
February 2009–Revised October 2009······················································datasheet 版本
Page 23
In 3-wire master mode, SPICLKx, SPISTEx, and SPISIMOx pins must be configured as SPI pins
(SPISOMIx pin can be configured as non-SPI pin). When the master transmits, it receives the data it
transmits (because SPISIMOx and SPISOMIx are connected internally in 3-wire mode).Therefore, the
junk data received must be cleared from the receive buffer every time data is transmitted.
—-这里自发自收。因此每次发送时,必须清除从接收缓存器接收的无效数据。 这里只是发送,和接收缓存器的数据有什么关系
请了解SPI的告知
Example 4. 3-Wire Master Mode Transmit
Uint16 data;
Uint16 dummy;
SpiaRegs.SPICTL.bit.TALK = 1; // Enable Transmit path
SpiaRegs.SPITXBUF = data; // Master transmits data
while(SpiaRegs.SPISTS.bit.INT_FLAG !=1) {} // Waits until data rx’d
dummy = SpiaRegs.SPIRXBUF; // Clears junk data from itself ·······请问这里说的清除的无效数据 同上处红字,可以详细说讲解?
// bc it rx’d same data tx’d
小弟保持关注 不胜感激
Forrest:
文档的上面有说,因为发送和接收内部连接,所以SPITXBUF发送的数据会返回到SPIRXBUF接收中(也就是说TX data=RX data),所以要读一次清除该无效数据。
当然,不读也可以,只要你程序中能够分得清接收FIFO中哪个是有效数据哪个是无效数据。
TMS320x2802x, 2803x Piccolo Serial Peripheral Interface (SPI) Reference Guide
Literature Number: SPRUG71B
February 2009–Revised October 2009······················································datasheet 版本
Page 23
In 3-wire master mode, SPICLKx, SPISTEx, and SPISIMOx pins must be configured as SPI pins
(SPISOMIx pin can be configured as non-SPI pin). When the master transmits, it receives the data it
transmits (because SPISIMOx and SPISOMIx are connected internally in 3-wire mode).Therefore, the
junk data received must be cleared from the receive buffer every time data is transmitted.
—-这里自发自收。因此每次发送时,必须清除从接收缓存器接收的无效数据。 这里只是发送,和接收缓存器的数据有什么关系
请了解SPI的告知
Example 4. 3-Wire Master Mode Transmit
Uint16 data;
Uint16 dummy;
SpiaRegs.SPICTL.bit.TALK = 1; // Enable Transmit path
SpiaRegs.SPITXBUF = data; // Master transmits data
while(SpiaRegs.SPISTS.bit.INT_FLAG !=1) {} // Waits until data rx’d
dummy = SpiaRegs.SPIRXBUF; // Clears junk data from itself ·······请问这里说的清除的无效数据 同上处红字,可以详细说讲解?
// bc it rx’d same data tx’d
小弟保持关注 不胜感激
iwantu:
回复 Forrest:
非常感谢,我又看了SPI Master/Slave Connection。这里比如主机发送一个命令,从机本应该给出相应的应答或者数据,但是由于发送和接收内部连接,返回的还是主机发送的命令,这时从SPIRXBUF无效的命令数据,是这样吗?
TMS320x2802x, 2803x Piccolo Serial Peripheral Interface (SPI) Reference Guide
Literature Number: SPRUG71B
February 2009–Revised October 2009······················································datasheet 版本
Page 23
In 3-wire master mode, SPICLKx, SPISTEx, and SPISIMOx pins must be configured as SPI pins
(SPISOMIx pin can be configured as non-SPI pin). When the master transmits, it receives the data it
transmits (because SPISIMOx and SPISOMIx are connected internally in 3-wire mode).Therefore, the
junk data received must be cleared from the receive buffer every time data is transmitted.
—-这里自发自收。因此每次发送时,必须清除从接收缓存器接收的无效数据。 这里只是发送,和接收缓存器的数据有什么关系
请了解SPI的告知
Example 4. 3-Wire Master Mode Transmit
Uint16 data;
Uint16 dummy;
SpiaRegs.SPICTL.bit.TALK = 1; // Enable Transmit path
SpiaRegs.SPITXBUF = data; // Master transmits data
while(SpiaRegs.SPISTS.bit.INT_FLAG !=1) {} // Waits until data rx’d
dummy = SpiaRegs.SPIRXBUF; // Clears junk data from itself ·······请问这里说的清除的无效数据 同上处红字,可以详细说讲解?
// bc it rx’d same data tx’d
小弟保持关注 不胜感激
Forrest:
回复 iwantu:
并没能很清楚的理解你的问题。
这是3线的SPI,由于没有MISO引脚,所以在主机发送的时候从机无法同时给出数据。SPI协议是发送接收同时进行,由于MISO和MOSI引脚内部连接所以,在发送数据的时候,模块会同时接收到发送的数据。