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MSP430FR6043: 捕获不到信号

Part Number:MSP430FR6043Other Parts Discussed in Thread:MSP430FR6041, , MSP430FR5043, MSP430FR5041, EVM430-FR6043

您好,我们使用了“MSP430FR6043_MSP430FR6041_MSP430FR5043_MSP430FR5041_Code_Examples”里的“msp430fr6043_saph_01.c”和“msp430fr6043_sdhs_01.c”例程,用示波器可以看到换能器接收到由另一个换能器发送的激励波形,但是程序里的results数组观察不到有效的波形,形状差不多如图1所示,请问怎样才能观察到正确的波形呢?

图1

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//******************************************************************************
//MSP430FR60xx Demo - SDHS sampling at 8MSPS and DTC transfer results to RAM
//
//Description: Configure the SDHS for stand-alone use (register mode) at 8MSPS.
//Use the DTC to transfer the results to an array in RAM named "results" (located
//in LEA RAM at 0x5000). Convert array back to input voltage using:
//V = (adc_code * (f_s/2))/(gain*7FF) + Bias
//where,adc_code is the ADC result(16-Bit Signed Int),f_s = .755V(Full-scale voltage),
//gain = 10^(0.1/20)) = approximately 1, Bias = .9V, 7FF = 2047
//
//***NOTE: On TS-Board, remove JP14, put SIG on inner pin and GND to outer pin.
//Valid input range is 600mV - 1200mV, as configured.***
//MSP430FR6043
//---------------
///|\||
//| ||
//--|RST|
//|P1.5|---> LED
//||-USSXTIN
//||-USSXTOUT
//|CH0_IN|<--- input signal
//
//Gary Gao & Matt Calvo
//Texas Instruments Inc.
//February 2018
//Built with IAR Embedded Workbench V7.10 & Code Composer Studio V7.3
//******************************************************************************
#include <msp430.h>

#define OSCTYPE__CRYSTAL OSCTYPE_0

void HSPLL_init(void);

#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_SECTION(results, ".leaRAM")
#pragma RETAIN(results)
 int results[1800] = {0};
#elif defined(__IAR_SYSTEMS_ICC__)
#pragma location=0x5000
__no_init  int results[1024];
#pragma required = results
#elif defined(__GNUC__)
 int results[1800] __attribute__ ((section (".leaRAM"), used));
#else
#error Compiler not supported!
#endif

int main(void)
{WDTCTL = WDTPW | WDTHOLD;// Stop WDT// Configure P1.5 as output for LEDP1OUT &= ~BIT5;P1DIR |= BIT5;// Disable the GPIO power-on default high-impedance mode to activate// previously configured port settingsPM5CTL0 &= ~LOCKLPM5;// Configure one FRAM waitstate as required by the device datasheet for MCLK// operation beyond 8MHz _before_ configuring the clock system.FRCTL0 = FRCTLPW | NWAITS_1;// Clock System SetupCSCTL0_H = CSKEY_H;// Unlock CS registers// Per Device Errata(CS12) set divider to 4 before changing frequency to// prevent out of spec operation from overshoot transientCSCTL3 = DIVA__4 | DIVS__4 | DIVM__4;// Set all corresponding clk sources to divide by 4 for errata(CS12)CSCTL1 = DCOFSEL_4 | DCORSEL;// Set DCO to 16MHz// Delay by ~10us to let DCO settle. 60 cycles = 20 cycles buffer + (10us / (1/4MHz))__delay_cycles(60);CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1;// Set all dividers to 1 for 16MHz operationCSCTL3 = DIVA__1 | DIVS__1 | DIVM__1;// MCLK = SMCLK = 16MHzCSCTL0_H = 0;// Lock CS registers//Setup SAPH Bias Register ControlledSAPHKEY = KEY;SAPHBCTL &= ~ASQBSC;//Tx bias and Rx bias switches control source select; 0h (R/W) = Bias switches are controlled by SAPHBCTL.CH0EBSW, SAPHBCTL.CH1EBSW, SAPHBCTL.PGABSW bits (register mode)SAPHBCTL |= CPDA;//Enable the power supply (Charge Pump) for the the input multiplexer during data acquisition. 1h (R/W) = Keep turning on the charge pump during data acquisition.SAPHICTL0 = 0;//Input Multiplexer Channel SelectSAPHKEY = KEY+1;//Setup the SDHS with register modeSDHSCTL0 = TRGSRC_0 | AUTOSSDIS_1 | DFMSEL_0;// Software trigger,Left, 2s complement formatSDHSCTL1 = OSR_4;// OSR = 10 (80MHz/10 = 8MSPS). CS must set MCLK >= 8MHz.SDHSCTL2 = 1799;// SMPSZ = 255+1 samplesSDHSCTL6 = 0x20;// PGA Gain 0.1 dBSDHSCTL7 = 0xC;// MODOPTI = 0xC (80MHz PLL output frequency)SDHSDTCDA = 0x800;// DTC transfer data to start of LEA RAMSDHSIMSC = ACQDONE;// Enable acquisition done interrupt (after 256 samples transferred)SDHSCTL3 = TRIGEN_1;// Enable triggerSDHSCTL4 = SDHSON;// Turn on SD and start conversion__delay_cycles(640);// Delay for PGA worst case 40us settling timeHSPLL_init();// Initialize the HSPLL and wait for it to lock

///*SAPH// Set up the PPG settingsSAPHKEY = KEY;// Unlock the SAPH registersSAPHPGC = PLEV_0 | PPOL_0 | 0x000A;// 10 excitation pulses, 0 stop pulses, output low when inactive, high polaritySAPHPGLPER = 40;// Low phase = 40 HSPLL cycles = 500nsSAPHPGHPER = 40;// High phase = 40 HSPLL cycles = 500nsSAPHPGCTL = TRSEL_2 | PPGCHSEL_0 | PGSEL_0; // TA2.1 trigger, CH0 output, register mode// Set up the PHY to output PPG on dedicated CH0_OUT pinSAPHOSEL = PCH0SEL__PPGSE;// Output PPG// Enable the PPGSAPHPGCTL |= PPGEN;
//SAPH*/// Configure TA2.1 for 1/sec to trigger the pulse generation and toggle LEDTA2CCR0 = 9400;TA2CCR1 = 4700;TA2CCTL1 = OUTMOD_7 | CCIE;// Enable output signal to trigger PPG, enable InterruptTA2CTL = TASSEL__ACLK | TACLR | MC__UP; // Timer sourced from ACLK (VLO), clear timerwhile(1){__bis_SR_register(LPM0_bits | GIE); // Enter LPM0 w/interrupt__no_operation();// For debug}
}

// Timer A2 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = TIMER2_A1_VECTOR
__interrupt void Timer2_A1_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(TIMER2_A1_VECTOR))) Timer2_A1_ISR (void)
#else
#error Compiler not supported!
#endif
{switch(__even_in_range(TA2IV, TAIV__TAIFG)){case TAIV__NONE:break;// No interruptcase TAIV__TACCR1:SDHSCTL4&= ~SDHSON;SDHSCTL5 &= ~SSTART;SDHSCTL3 = 0;SDHSDTCDA = 0x800;SDHSCTL3 = TRIGEN_1;SDHSCTL4 = SDHSON;SDHSCTL5 |= SSTART;// Start conversion__no_operation();break;case TAIV__TAIFG:// overflow__no_operation();break;default: break;}
}

// SDHS interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = SDHS_VECTOR
__interrupt void SDHS_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(SDHS_VECTOR))) SDHS_ISR (void)
#else
#error Compiler not supported!
#endif
{switch(__even_in_range(SDHSIIDX, IIDX_6)){case IIDX_0:break;// No interruptcase IIDX_1:__no_operation();break;// OVF interruptcase IIDX_2:// ACQDONE interruptP1OUT ^= BIT5;// Toggle LED to show new cyclelll__delay_cycles(1000);__no_operation();// Put breakpoint here to view resultsbreak;case IIDX_3:break;// SSTRG interruptcase IIDX_4:break;// DTRDY interruptcase IIDX_5:break;// WINHI interruptcase IIDX_6:break;// WINLO interruptdefault: break;}
}

void HSPLL_init(void)
{// Configure USSXT OscillatorHSPLLUSSXTLCTL = OSCTYPE__CRYSTAL |  USSXTEN;// Set up timer to wait in LPM for crystal stabilization time = 4096 clocks for crystal resonator.// For 8MHz XTAL, 4096 clocks = 512us. Using VLO = 9.4kHz, wait 5 timer clock cycles = 532us.TA4CCR0 = 5;TA4CCTL0 = CCIE;// Enable InterruptTA4CTL = TASSEL__ACLK | TACLR | MC__UP; // Timer sourced from ACLK (VLO), clear timer__bis_SR_register(LPM3_bits | GIE);// Enter LPM3 w/interrupt__no_operation();// For debug// Check if oscillator is stablewhile((HSPLLUSSXTLCTL & OSCSTATE) == 0);// Output oscillator on pinHSPLLUSSXTLCTL &= ~XTOUTOFF;// Init PLL// Use the PLLM setting to get 80MHz output from our 8MHz input// Equation: PLL output clock frequency x 2 = input clock frequency x (PLLM+1)// Input clock frequency = 8MHz// Desired PLL output clock frequency = 80MHz// PLLM = 19HSPLLCTL = PLLM4 | PLLM1 | PLLM0 | PLLINFREQ; //PLLM = 19, PLL input frequency > 6MHz// Power up the UUPS to start the PLLUUPSCTL |= USSPWRUP;// Wait for UUPS to power upwhile((UUPSCTL & UPSTATE_3) != UPSTATE_3);// Wait for PLL to lockwhile(!(HSPLLCTL & PLL_LOCK));
}

// Timer A4 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = TIMER4_A0_VECTOR
__interrupt void Timer4_A0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(TIMER4_A0_VECTOR))) Timer4_A0_ISR (void)
#else
#error Compiler not supported!
#endif
{// Stop the timer and wake from LPMTA4CTL = MC__STOP;__bic_SR_register_on_exit(LPM3_bits | GIE);__no_operation();
}

Ben Qin:

你好,你有注意到这个吗?

,

measure CHANG:

您好,我看到了这个公式,我把results数组里的值带入公式后,得到的数据绘制成的图如图1下面那个所示,这似乎也和我想象地不太一样,请问需要怎么做?谢谢您!

,

Ben Qin:

measure CHANG 说:这似乎也和我想象地不太一样

你想象的是什么?

请解释一下你的图片的XY轴代表什么,你的输入信号是什么?

,

measure CHANG:

您好,我想象的是一个接收波形,如图1黄色部分所示。图1是我用示波器捕捉到的波形,分别是X_CH0_OUT 和 X_CH1_IN脚,一个是发送10个激励(高电平持续500ns,低电平持续500ns),一个是通过换能器接收发送的激励。

X轴是采样的点数,采样频率我通过“SDHSCTL1 = OSR_0”设置成了8MHz,也尝试了“SDHSCTL1 = OSR_4;”的0.5MHz,但是都是这样的波形,Y轴是程序里的results数组里的数值。也想过是不是采样点数太小,我也把results增加到1800个,但是出来的图形差不多也是这样的,不是我想象的。

输入信号是如图1黄色部分所示。

图1

,

Ben Qin:

你的第二个蓝色信号是做什么用的?

你可以用一个简单的正弦波作为输入来再来画个图看看吗?

,

measure CHANG:

第二个蓝色信号是发送10个激励(高电平持续500ns,低电平持续500ns),是由单片机产生,发送给换能器1,作为激励信号的。黄色的是换能器2接收到的蓝色信号,然后送入单片机进行捕获。之所以用两个通道是因为黄色的信号比较难捕获,用蓝色信号作为位置的提示,因为本质上这两个波形是同一个东西,相差的时间就是波形在两个换能器之间传输的时间。

用一个简单的正弦波作为输入,如图1,2 所示,频率为16kHz(单片机采样频率是80MHz,捕获的数组长度是800个),幅度为300mV(注释里的输入范围是600mV~1200mV单片机里有900mV的偏置,幅度为300mV,满足要求)。捕获的结果如图3,4所示。这并不是正弦波,请问是为什么?

图1

图2

图3

图4

,

Ben Qin:

你使用的是launchpad吗?result数组中应该是存放的ADC转换结果,能否检查下它是否正确?

,

measure CHANG:

请问launchpad是什么?是开发板吗?使用的是msp430fr6043开发板,左上角的标签是EVM430-FR6043,官网买的,如图1。

上面画的图片是result数组的值,在CCS软件中的数组画图工具画的,看上去是不正确的,因为输入的是正弦波,请问除了这么看,还需要怎么检查它是否正确?

,

Ben Qin:

这就有点奇怪了。

measure CHANG 说:上面画的图片是result数组的值

你是指的这个图吧。你确定你接到正确的引脚上了吗?这看起来毫无规律。

,

measure CHANG:

您好,之前说“用一个简单的正弦波作为输入,如图1,2 所示,… 捕获的结果如图3,4所示。”,图3,4所画的是result数组里的数值。信号是接在了X_CH1_IN,如图5,6。我也感觉毫无规律,关键用的是例程,程序在第一次提问中给出,就很纳闷,请问怎么解决?

图3

图4

图5

图6

,

Ben Qin:

measure CHANG 说:信号是接在了X_CH1_IN,

例程中是写的CH0_IN

,

measure CHANG:

您说得很对,我将频率为1MHz,幅度为300mV,偏移为900mV的正弦波输入到CH0_IN引脚后得到的波形如图1所示。但我原本的想法是捕获到换能器收到的波形(图2中黄色的波形)。我很困惑的点是因为有1000pF电容在换能器的信号线和输入引脚CH0_IN之间,如图3。所以按理来说是不需要加上900mV偏移就可以捕获到换能器收到的波形(图2中黄色的波形)。再放一下接上换能器试图捕获换能器收到的波形(图2中黄色的波形)的results数组里的图片4 5 6,每次捕获的波形都不一样,怀疑是信号经过1000pF电容(图3)后输入到单片机CH0_IN时没有偏置导致的。请问是不是需要改变一些寄存器,使得CH0_IN可以捕获到不加900mV(或者说可以捕获的范围在-700mV-+700mV或更大范围)的信号?请问具体需要怎么操作呢?

图1

图2

图3

图4

图5

图6

,

Ben Qin:

measure CHANG 说:请问是不是需要改变一些寄存器,使得CH0_IN可以捕获到不加900mV(或者说可以捕获的范围在-700mV-+700mV或更大范围)的信号?请问具体需要怎么操作呢?

应该是可以利用PGA来实现。合适的参数需要你自行调试得到。

根据上图,CH0_IN后是接一个PGA。关于该PGA具体参数:

user guide:MSP430FR58xx, MSP430FR59xx, and MSP430FR6xx Family User's Guide (Rev. P) (ti.com.cn)

,

measure CHANG:

您好,我使用了8MHz采样频率,1600个采样点,在timer2中开启采样,timer2是触发发射激励的时钟。用示波器也能观察到CH0_IN的波形。按理说,results数组完全包括了与激励信号相差60us,持续15us的接收波形。我按照增益表把所有的参数都试了一遍,但是似乎都没有捕捉到,请问怎么解决?

修改增益获得的波形.zip

,

Ben Qin:

我需要咨询下资深工程师,一旦有回复会立即回复您。

,

weiliang qin:

您好,不知道是不是因为捕获的时间太早了这个原因,需要调整design center中上面这个参数。

我也在学习中,请问你的EVM430-FR6043开发板是在哪里买的,能告诉我一下吗?厂家推出这个是不是为了产品用?

,

Ben Qin:

你好,

weiliang qin 说:请问你的EVM430-FR6043开发板是在哪里买的

这个可以在TI官网购买的:www.ti.com.cn/…/EVM430-FR6043

,

weiliang qin:

好的,谢谢!

,

measure CHANG:

您好,我感觉关系不大,因为当输入为连续的正弦波时,result数组捕获不到完整的波形,我感觉和电压偏移有关,不知道有没有相关例程参考。

,

measure CHANG:

请问工程师怎么说?

,

Ben Qin:

那边还没有回复,有回复我会立即回复您。

,

Ben Qin:

你好,

对于 USS 应用程序,我们建议您使用 USS Library:

https://www.ti.com/tool/MSP-ULTRASONIC-DESIGN-CENTER

对于100pf的电容,这个用来隔离直流信号,实际的Transducer回波波形会有负电压,所以我们要隔离直流电压,然后在UXX_IN脚加一个偏压,保证输入电压在900mV以内。

我想你可以先尝试使用USS库,然后检查USS波形是否正常。

,

measure CHANG:

Ben Qin 说:然后在UXX_IN脚加一个偏压

请问怎么用软件加上这个偏压呢?需要什么语句,具体加在哪里,有相关例程吗?因为您给的USS Library是自动模式,而所用的程序是寄存器模式,两种模式不一样,似乎不太能参考吧

,

Ben Qin:

已向工程师跟进。

,

Ben Qin:

你好,你可以在这里找到bias:

实际上,我们推荐用户使用USS Libiary来开发他们的产品,USS外设难度更大,如果使用寄存器模式,你会遇到更多问题,我们提供寄存器模式只是为了一些外设评估。

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