我按照《TMS320x2802x,2803x Piccolo Enhanced Pulse Widt hModulator (ePWM) Module》LiteratureNumber:SPRUGE9E 中的例程进行了设置
所用软件为CCS5.5 下载器:xds100v2 芯片:TMS320F28035 Pin80
据体设置代码如下:
//=====================================================================
// Configuration
//=====================================================================
// Initialization Time
//========================// EPWM Module 1 config
EPwm1Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm1Regs.TBCTL.bit.PHSEN= TB_DISABLE; // Master module
EPwm1Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module
EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm1Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.AQCTLA.all= 0; // set actions for EPWM1A //设里修改了a
EPwm1Regs.AQCTLB.all = 0;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm1Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm1Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 2 config
EPwm2Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm2Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm2Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm2Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm2Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm2Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm2Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.AQCTLA.all = 0; // set actions for EPWM2A //设里修改了动作
EPwm2Regs.AQCTLB.all = 0;
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm2Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm2Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 3 config
EPwm3Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm3Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm3Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm3Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm3Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm3Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm3Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.AQCTLA.all = 0; // set actions for EPWM3A //设里修改了动作
EPwm3Regs.AQCTLB.all = 0;
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm3Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm3Regs.DBRED= 50; // RED = 50 TBCLKs
// Run Time (Note: Example execution of one run-time instant)
//=========================================================
EPwm1Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM1A
EPwm2Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM2A
EPwm3Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM3A
EPwm1Regs.CMPB = 600; // adjust for output EPWM1A
EPwm2Regs.CMPB = 600; // adjust for output EPWM2A
EPwm3Regs.CMPB = 600; // adjust for output EPWM3A
//测试输出
EPwm1Regs.AQCTLA.all =0x60; EPwm1Regs.AQCSFRC.all = 0x4; //设置 EPWM1 A输出,B关闭(持续强制输出低)
EPwm2Regs.AQCTLB.all =0x60; EPwm2Regs.AQCSFRC.all = 0x1; //设置 EPWM2 A关闭(持续强制输出低),B输出
EPwm3Regs.AQCSFRC.all = 0x05;//关闭epwm3
我只对程序作了一些小小的修改。但是输出却还是只有EPWM1通道 而且只有A,B引脚刚好是反相的。
请问我是什么地方设置 有误么?还是对程说明书的理解有误。
Brian Wang0:您好,
您把AQCTL改成0,PWM肯定没有什么动作啊。
建议仔细理解手册,并参考C2000ware中的例程进行调试。
我按照《TMS320x2802x,2803x Piccolo Enhanced Pulse Widt hModulator (ePWM) Module》LiteratureNumber:SPRUGE9E 中的例程进行了设置
所用软件为CCS5.5 下载器:xds100v2 芯片:TMS320F28035 Pin80
据体设置代码如下:
//=====================================================================
// Configuration
//=====================================================================
// Initialization Time
//========================// EPWM Module 1 config
EPwm1Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm1Regs.TBCTL.bit.PHSEN= TB_DISABLE; // Master module
EPwm1Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module
EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm1Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.AQCTLA.all= 0; // set actions for EPWM1A //设里修改了a
EPwm1Regs.AQCTLB.all = 0;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm1Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm1Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 2 config
EPwm2Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm2Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm2Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm2Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm2Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm2Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm2Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.AQCTLA.all = 0; // set actions for EPWM2A //设里修改了动作
EPwm2Regs.AQCTLB.all = 0;
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm2Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm2Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 3 config
EPwm3Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm3Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm3Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm3Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm3Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm3Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm3Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.AQCTLA.all = 0; // set actions for EPWM3A //设里修改了动作
EPwm3Regs.AQCTLB.all = 0;
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm3Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm3Regs.DBRED= 50; // RED = 50 TBCLKs
// Run Time (Note: Example execution of one run-time instant)
//=========================================================
EPwm1Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM1A
EPwm2Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM2A
EPwm3Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM3A
EPwm1Regs.CMPB = 600; // adjust for output EPWM1A
EPwm2Regs.CMPB = 600; // adjust for output EPWM2A
EPwm3Regs.CMPB = 600; // adjust for output EPWM3A
//测试输出
EPwm1Regs.AQCTLA.all =0x60; EPwm1Regs.AQCSFRC.all = 0x4; //设置 EPWM1 A输出,B关闭(持续强制输出低)
EPwm2Regs.AQCTLB.all =0x60; EPwm2Regs.AQCSFRC.all = 0x1; //设置 EPWM2 A关闭(持续强制输出低),B输出
EPwm3Regs.AQCSFRC.all = 0x05;//关闭epwm3
我只对程序作了一些小小的修改。但是输出却还是只有EPWM1通道 而且只有A,B引脚刚好是反相的。
请问我是什么地方设置 有误么?还是对程说明书的理解有误。
mangui zhang:是不是配置为互补输出的原因仔细看看EPWM的寄存器
我按照《TMS320x2802x,2803x Piccolo Enhanced Pulse Widt hModulator (ePWM) Module》LiteratureNumber:SPRUGE9E 中的例程进行了设置
所用软件为CCS5.5 下载器:xds100v2 芯片:TMS320F28035 Pin80
据体设置代码如下:
//=====================================================================
// Configuration
//=====================================================================
// Initialization Time
//========================// EPWM Module 1 config
EPwm1Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm1Regs.TBCTL.bit.PHSEN= TB_DISABLE; // Master module
EPwm1Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module
EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm1Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.AQCTLA.all= 0; // set actions for EPWM1A //设里修改了a
EPwm1Regs.AQCTLB.all = 0;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm1Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm1Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 2 config
EPwm2Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm2Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm2Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm2Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm2Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm2Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm2Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.AQCTLA.all = 0; // set actions for EPWM2A //设里修改了动作
EPwm2Regs.AQCTLB.all = 0;
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm2Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm2Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 3 config
EPwm3Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm3Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm3Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm3Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm3Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm3Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm3Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.AQCTLA.all = 0; // set actions for EPWM3A //设里修改了动作
EPwm3Regs.AQCTLB.all = 0;
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm3Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm3Regs.DBRED= 50; // RED = 50 TBCLKs
// Run Time (Note: Example execution of one run-time instant)
//=========================================================
EPwm1Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM1A
EPwm2Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM2A
EPwm3Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM3A
EPwm1Regs.CMPB = 600; // adjust for output EPWM1A
EPwm2Regs.CMPB = 600; // adjust for output EPWM2A
EPwm3Regs.CMPB = 600; // adjust for output EPWM3A
//测试输出
EPwm1Regs.AQCTLA.all =0x60; EPwm1Regs.AQCSFRC.all = 0x4; //设置 EPWM1 A输出,B关闭(持续强制输出低)
EPwm2Regs.AQCTLB.all =0x60; EPwm2Regs.AQCSFRC.all = 0x1; //设置 EPWM2 A关闭(持续强制输出低),B输出
EPwm3Regs.AQCSFRC.all = 0x05;//关闭epwm3
我只对程序作了一些小小的修改。但是输出却还是只有EPWM1通道 而且只有A,B引脚刚好是反相的。
请问我是什么地方设置 有误么?还是对程说明书的理解有误。
10#:
Zhang Xueyang
EPwm1Regs.AQCTLA.all =0x60; EPwm1Regs.AQCSFRC.all = 0x4; //设置 EPWM1 A输出,B关闭(持续强制输出低)
EPwm2Regs.AQCTLB.all =0x60; EPwm2Regs.AQCSFRC.all = 0x1; //设置 EPWM2 A关闭(持续强制输出低),B输出EPwm3Regs.AQCSFRC.all = 0x05;//关闭epwm3
我只对程序作了一些小小的修改。但是输出却还是只有EPWM1通道 而且只有A,B引脚刚好是反相的。
请先把问题描述得清楚一点。
你是说,希望配置EPWM1A输出正常占空比,EPWM1B持续输出低电平,EPWM2A持续输出低电平,EPWM2B输出正常占空比,EPWM3A/B不输出?
那么实际看到的结果分别是什么?
我按照《TMS320x2802x,2803x Piccolo Enhanced Pulse Widt hModulator (ePWM) Module》LiteratureNumber:SPRUGE9E 中的例程进行了设置
所用软件为CCS5.5 下载器:xds100v2 芯片:TMS320F28035 Pin80
据体设置代码如下:
//=====================================================================
// Configuration
//=====================================================================
// Initialization Time
//========================// EPWM Module 1 config
EPwm1Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm1Regs.TBCTL.bit.PHSEN= TB_DISABLE; // Master module
EPwm1Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module
EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm1Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.AQCTLA.all= 0; // set actions for EPWM1A //设里修改了a
EPwm1Regs.AQCTLB.all = 0;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm1Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm1Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 2 config
EPwm2Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm2Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm2Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm2Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm2Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm2Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm2Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.AQCTLA.all = 0; // set actions for EPWM2A //设里修改了动作
EPwm2Regs.AQCTLB.all = 0;
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm2Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm2Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 3 config
EPwm3Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm3Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm3Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm3Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm3Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm3Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm3Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.AQCTLA.all = 0; // set actions for EPWM3A //设里修改了动作
EPwm3Regs.AQCTLB.all = 0;
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm3Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm3Regs.DBRED= 50; // RED = 50 TBCLKs
// Run Time (Note: Example execution of one run-time instant)
//=========================================================
EPwm1Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM1A
EPwm2Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM2A
EPwm3Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM3A
EPwm1Regs.CMPB = 600; // adjust for output EPWM1A
EPwm2Regs.CMPB = 600; // adjust for output EPWM2A
EPwm3Regs.CMPB = 600; // adjust for output EPWM3A
//测试输出
EPwm1Regs.AQCTLA.all =0x60; EPwm1Regs.AQCSFRC.all = 0x4; //设置 EPWM1 A输出,B关闭(持续强制输出低)
EPwm2Regs.AQCTLB.all =0x60; EPwm2Regs.AQCSFRC.all = 0x1; //设置 EPWM2 A关闭(持续强制输出低),B输出
EPwm3Regs.AQCSFRC.all = 0x05;//关闭epwm3
我只对程序作了一些小小的修改。但是输出却还是只有EPWM1通道 而且只有A,B引脚刚好是反相的。
请问我是什么地方设置 有误么?还是对程说明书的理解有误。
Zhang Xueyang:
回复 10#:
对的,希望配置EPWM1A输出正常占空比,EPWM1B持续输出低电平,EPWM2A持续输出低电平,EPWM2B输出正常占空比,EPWM3A/B都输出低电平,我贴出的是去修改后的程序。
我按照《TMS320x2802x,2803x Piccolo Enhanced Pulse Widt hModulator (ePWM) Module》LiteratureNumber:SPRUGE9E 中的例程进行了设置
所用软件为CCS5.5 下载器:xds100v2 芯片:TMS320F28035 Pin80
据体设置代码如下:
//=====================================================================
// Configuration
//=====================================================================
// Initialization Time
//========================// EPWM Module 1 config
EPwm1Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm1Regs.TBCTL.bit.PHSEN= TB_DISABLE; // Master module
EPwm1Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module
EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm1Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.AQCTLA.all= 0; // set actions for EPWM1A //设里修改了a
EPwm1Regs.AQCTLB.all = 0;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm1Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm1Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 2 config
EPwm2Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm2Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm2Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm2Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm2Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm2Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm2Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.AQCTLA.all = 0; // set actions for EPWM2A //设里修改了动作
EPwm2Regs.AQCTLB.all = 0;
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm2Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm2Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 3 config
EPwm3Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm3Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm3Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm3Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm3Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm3Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm3Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.AQCTLA.all = 0; // set actions for EPWM3A //设里修改了动作
EPwm3Regs.AQCTLB.all = 0;
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm3Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm3Regs.DBRED= 50; // RED = 50 TBCLKs
// Run Time (Note: Example execution of one run-time instant)
//=========================================================
EPwm1Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM1A
EPwm2Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM2A
EPwm3Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM3A
EPwm1Regs.CMPB = 600; // adjust for output EPWM1A
EPwm2Regs.CMPB = 600; // adjust for output EPWM2A
EPwm3Regs.CMPB = 600; // adjust for output EPWM3A
//测试输出
EPwm1Regs.AQCTLA.all =0x60; EPwm1Regs.AQCSFRC.all = 0x4; //设置 EPWM1 A输出,B关闭(持续强制输出低)
EPwm2Regs.AQCTLB.all =0x60; EPwm2Regs.AQCSFRC.all = 0x1; //设置 EPWM2 A关闭(持续强制输出低),B输出
EPwm3Regs.AQCSFRC.all = 0x05;//关闭epwm3
我只对程序作了一些小小的修改。但是输出却还是只有EPWM1通道 而且只有A,B引脚刚好是反相的。
请问我是什么地方设置 有误么?还是对程说明书的理解有误。
10#:
回复 Zhang Xueyang:
那么实际看到的结果分别是什么?是否有波形可以说明问题呢?
我按照《TMS320x2802x,2803x Piccolo Enhanced Pulse Widt hModulator (ePWM) Module》LiteratureNumber:SPRUGE9E 中的例程进行了设置
所用软件为CCS5.5 下载器:xds100v2 芯片:TMS320F28035 Pin80
据体设置代码如下:
//=====================================================================
// Configuration
//=====================================================================
// Initialization Time
//========================// EPWM Module 1 config
EPwm1Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm1Regs.TBCTL.bit.PHSEN= TB_DISABLE; // Master module
EPwm1Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module
EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm1Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.AQCTLA.all= 0; // set actions for EPWM1A //设里修改了a
EPwm1Regs.AQCTLB.all = 0;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm1Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm1Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 2 config
EPwm2Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm2Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm2Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm2Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm2Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm2Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm2Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.AQCTLA.all = 0; // set actions for EPWM2A //设里修改了动作
EPwm2Regs.AQCTLB.all = 0;
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm2Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm2Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 3 config
EPwm3Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm3Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm3Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm3Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm3Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm3Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm3Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.AQCTLA.all = 0; // set actions for EPWM3A //设里修改了动作
EPwm3Regs.AQCTLB.all = 0;
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm3Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm3Regs.DBRED= 50; // RED = 50 TBCLKs
// Run Time (Note: Example execution of one run-time instant)
//=========================================================
EPwm1Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM1A
EPwm2Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM2A
EPwm3Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM3A
EPwm1Regs.CMPB = 600; // adjust for output EPWM1A
EPwm2Regs.CMPB = 600; // adjust for output EPWM2A
EPwm3Regs.CMPB = 600; // adjust for output EPWM3A
//测试输出
EPwm1Regs.AQCTLA.all =0x60; EPwm1Regs.AQCSFRC.all = 0x4; //设置 EPWM1 A输出,B关闭(持续强制输出低)
EPwm2Regs.AQCTLB.all =0x60; EPwm2Regs.AQCSFRC.all = 0x1; //设置 EPWM2 A关闭(持续强制输出低),B输出
EPwm3Regs.AQCSFRC.all = 0x05;//关闭epwm3
我只对程序作了一些小小的修改。但是输出却还是只有EPWM1通道 而且只有A,B引脚刚好是反相的。
请问我是什么地方设置 有误么?还是对程说明书的理解有误。
Zhang Xueyang:
回复 10#:
控制任意一个pwm引脚输出,。关闭死区功能就好了。
我按照《TMS320x2802x,2803x Piccolo Enhanced Pulse Widt hModulator (ePWM) Module》LiteratureNumber:SPRUGE9E 中的例程进行了设置
所用软件为CCS5.5 下载器:xds100v2 芯片:TMS320F28035 Pin80
据体设置代码如下:
//=====================================================================
// Configuration
//=====================================================================
// Initialization Time
//========================// EPWM Module 1 config
EPwm1Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm1Regs.TBCTL.bit.PHSEN= TB_DISABLE; // Master module
EPwm1Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module
EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm1Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.AQCTLA.all= 0; // set actions for EPWM1A //设里修改了a
EPwm1Regs.AQCTLB.all = 0;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm1Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm1Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 2 config
EPwm2Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm2Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm2Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm2Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm2Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm2Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm2Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.AQCTLA.all = 0; // set actions for EPWM2A //设里修改了动作
EPwm2Regs.AQCTLB.all = 0;
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm2Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm2Regs.DBRED= 50; // RED = 50 TBCLKs
// EPWM Module 3 config
EPwm3Regs.TBPRD= 800; // Period = 1600 TBCLKcounts
EPwm3Regs.TBPHS.half.TBPHS = 0; // Set Phaseregister to zero
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode
EPwm3Regs.TBCTL.bit.PHSEN= TB_ENABLE; // Slavemodule
EPwm3Regs.TBCTL.bit.PRDLD= TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm3Regs.CMPCTL.bit.SHDWAMODE=CC_IMMEDIATE; //修改了shadow模式
EPwm3Regs.CMPCTL.bit.SHDWBMODE=CC_IMMEDIATE;
EPwm3Regs.CMPCTL.bit.LOADAMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE= CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.AQCTLA.all = 0; // set actions for EPWM3A //设里修改了动作
EPwm3Regs.AQCTLB.all = 0;
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm3Regs.DBFED= 50; // FED = 50 TBCLKs
EPwm3Regs.DBRED= 50; // RED = 50 TBCLKs
// Run Time (Note: Example execution of one run-time instant)
//=========================================================
EPwm1Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM1A
EPwm2Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM2A
EPwm3Regs.CMPA.half.CMPA = 600; // adjust duty for output EPWM3A
EPwm1Regs.CMPB = 600; // adjust for output EPWM1A
EPwm2Regs.CMPB = 600; // adjust for output EPWM2A
EPwm3Regs.CMPB = 600; // adjust for output EPWM3A
//测试输出
EPwm1Regs.AQCTLA.all =0x60; EPwm1Regs.AQCSFRC.all = 0x4; //设置 EPWM1 A输出,B关闭(持续强制输出低)
EPwm2Regs.AQCTLB.all =0x60; EPwm2Regs.AQCSFRC.all = 0x1; //设置 EPWM2 A关闭(持续强制输出低),B输出
EPwm3Regs.AQCSFRC.all = 0x05;//关闭epwm3
我只对程序作了一些小小的修改。但是输出却还是只有EPWM1通道 而且只有A,B引脚刚好是反相的。
请问我是什么地方设置 有误么?还是对程说明书的理解有误。
user5787625:
回复 Zhang Xueyang:
你好,你可以参考下面两种解决方式来解决你的问题:
1.你可以在TI的官网里面下载有关EPWM的手册,那里面有你需要配置的这种模式,找到之后按照手册里面的历程配置就可以了
2.按照你现在的配置方式,把需要输出低电平的管脚不复用为EPWM模式,就复用为普通IO,输出模式,之后在需要拉低时候管脚输出为低就可以了