TMS320F280049C: CLA配置问题

在不加CLA初始化时程序运行正常，当把CLA初始化程序加上以后会出现两个警告

将程序烧录进DSP后点击运行会弹出interrupt.h文件

这个是因为CLA地址分配问题吗？怎么解决呢？

Green Deng：

两个警告应该是地址分配的问题，可能你没有更换带CLA的cmd文件？不过这两个警告应该可以忽略不影响程序运行。

弹出的应该是程序进入了死循环，你看一下代码上面的注释是怎么解释这个死循环的？以及单步运行看一下是哪句代码跳到死循环的。

另外，官方有提供几个CLA的例程不知道你有参考过吗？C:\ti\c2000\C2000Ware_4_01_00_00\driverlib\f28004x\examples\cla

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C YG：

是的，地址问题已经解决了，这个死循环问题还没有解决。

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C YG：

我现在使用的是采用外部中断XINT1来触发CLA，但是我在CLA任务1中加上清除XINT1的中断标志位就会报错显示INTERRUPT_ACK_GROUP1未定义，实际上我按住CTRL点击INTERRUPT_ACK_GROUP1是可以跳转的，为什么会显示未定义呢？是不是因为我在中断执行完毕后没有清除中断标志位才导致点击运行弹出interrupt.h文件显示进入其循环呢？

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C YG：

我现在使用的程序框架就是参考TI的官网例程搭建的

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Green Deng：

你看一下例程中的main.c开头include了哪些.h文件，加上之后再在工程属性中的build – C2000 Compiler – include options看看有没有添加对应的文件路径。

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C YG：

这个检查过了，没有问题。

现在我通过单步调试发现了问题所在，这个是初始化CLA的程序，通过单步调试发现程序执行到红框框住的那句话时就会跳到一个死循环中，这个是从TI的CLA历程中直接复制过来的，不知道这句话什么意思。当把这句话注释掉以后发现程序不报错了，但是没有触发CLA。加上这句话会触发CLA，但是运行几个周期就会跳出之前的那个interrupt.h文件中的一个死循环。

这个是什么原因呢？

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Green Deng：

这句代码是用于将CLA程序分配到RAMLS0区域的。之前提到CCS有报警告，后来警告是通过更换cmd文件解决的吗？如果是的话更换的是哪个cmd文件？

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C YG：

您好

MEMORY
{
PAGE 0 :/* BEGIN is used for the "boot to SARAM" bootloader mode*/BEGIN: origin = 0x000000, length = 0x000002RAMM0: origin = 0x0000F4, length = 0x00030CRAMLS0: origin = 0x008000, length = 0x000800RAMLS1: origin = 0x008800, length = 0x000800RAMLS2: origin = 0x009000, length = 0x000800RAMLS3: origin = 0x009800, length = 0x000800RAMLS4: origin = 0x00A000, length = 0x000800RESET: origin = 0x3FFFC0, length = 0x000002/* Flash sectors: you can use FLASH for program memory when the RAM is filled up*//* BANK 0 */FLASH_BANK0_SEC0: origin = 0x080000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC1: origin = 0x081000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC2: origin = 0x082000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC3: origin = 0x083000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC4: origin = 0x084000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC5: origin = 0x085000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC6: origin = 0x086000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC7: origin = 0x087000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC8: origin = 0x088000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC9: origin = 0x089000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000	/* on-chip Flash */FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000	/* on-chip Flash *//* BANK 1 */FLASH_BANK1_SEC0: origin = 0x090000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC1: origin = 0x091000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC2: origin = 0x092000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC3: origin = 0x093000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC4: origin = 0x094000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC5: origin = 0x095000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC6: origin = 0x096000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC7: origin = 0x097000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC8: origin = 0x098000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC9: origin = 0x099000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000	/* on-chip Flash */FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000	/* on-chip Flash */PAGE 1 :BOOT_RSVD: origin = 0x000002, length = 0x0000F1/* Part of M0, BOOT rom will use this for stack */RAMM1: origin = 0x000400, length = 0x0003F8/* on-chip RAM block M1 */
//RAMM1_RSVD: origin = 0x0007F8, length = 0x000008/* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */RAMLS1: origin = 0x008800, length = 0x000800RAMLS2: origin = 0x009000, length = 0x000800RAMLS5: origin = 0x00A800, length = 0x000800RAMLS6: origin = 0x00B000, length = 0x000800RAMLS7: origin = 0x00B800, length = 0x000800RAMGS0: origin = 0x00C000, length = 0x002000RAMGS1: origin = 0x00E000, length = 0x002000RAMGS2: origin = 0x010000, length = 0x002000RAMGS3: origin = 0x012000, length = 0x001FF8
//RAMGS3_RSVD: origin = 0x013FF8, length = 0x000008/* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */CLA1_MSGRAMLOW: origin = 0x001480, length = 0x000080CLA1_MSGRAMHIGH: origin = 0x001500, length = 0x000080
}/*You can arrange the .text, .cinit, .const, .pinit, .switch and .econst to FLASH when RAM is filled up.*/
SECTIONS
{codestart: > BEGIN,PAGE = 0.TI.ramfunc: > RAMM0,PAGE = 0.text: >> RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4,PAGE = 0.cinit: > RAMM0,PAGE = 0.switch: > RAMM0,PAGE = 0.reset: > RESET,PAGE = 0, TYPE = DSECT /* not used, */.stack: > RAMM1,PAGE = 1#if defined(__TI_EABI__).bss: > RAMLS5,PAGE = 1.bss:output: > RAMLS5,PAGE = 1.init_array: > RAMM0,PAGE = 0.const: > RAMLS6,PAGE = 1.data: > RAMLS6,PAGE = 1.sysmem: > RAMLS6,PAGE = 1.bss:cio: > RAMLS5,PAGE = 1
#else.pinit: > RAMM0,PAGE = 0.ebss: >>RAMLS5 | RAMLS6,PAGE = 1.econst: > RAMLS6,PAGE = 1.esysmem: > RAMLS6,PAGE = 1.cio: > RAMLS5,PAGE = 1
#endiframgs0: > RAMGS0,PAGE = 1ramgs1: > RAMGS1,PAGE = 1dclfuncs: > RAMLS5,PAGE = 1// CLA SectionsCla1Prog: > RAMLS0,PAGE = 0.scratchpad: > RAMLS1,PAGE = 1.bss_cla: > RAMLS1,PAGE = 1.const_cla: > RAMLS1,PAGE = 1Cla1ToCpuMsgRAM: > CLA1_MSGRAMLOW,PAGE = 1CpuToCla1MsgRAM: > CLA1_MSGRAMHIGH,PAGE = 1Cla1DataRam: > RAMLS2,PAGE = 1cla_shared: > RAMLS1,PAGE = 1CLADataLS1: > RAMLS1,PAGE = 1
}/*
//===========================================================================
// End of file.
//===========================================================================
*/

这个问题是通过在CMD中添加了一些东西解决的，目前cmd文件内容如下

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Green Deng：

收到，我会咨询一下CLA方面的工程师帮忙看一下你的问题。

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Green Deng：

你好，看到LS0也被分配用于“.text”段？确保配置为CLA程序内存的LSRAM仅用于分配CLA代码，而不是C28x代码。