TI中文支持网Part Number:TMS320C5517
数据手册3.3.2.2这样写着
To transfer the incoming data in the UART FIFO to its proper location in internal memory, the DMA
channel must be set up for a burst transfer with synchronization enabled. Since a receive event (URXEVT)
is generated every time the FIFO trigger level is reached, it is necessary to have the DMA channel burst
transfer size match the UART FIFO trigger level. For example, if the UART FIFO trigger level is set to 8
bytes, the DMA channel burst size must be set to 8 double words. Note that although the DMA always
transfers double words, the UART treats each double word request as a single byte request. Also, when
allocating memory for the receive buffer, four bytes must be allocated for every UART data sample.
是不是代表着每次32位的传输其实只有8位的有效数据，DMA的效率就会降低，可不可以一次32位的DMA传输实现4个8位数据的传输
Shine：
这个是硬件上固定的，不能改变。The UART treats each double word transfer as a single byte. Therefore, an 8 double word transfer from the DMA to the UART will yield 8 new bytes in the UART FIFO
