TLV320ADC3100: Is the official website driver available?

Our company uses this IC for recording. We downloaded the driver from the official website, and the register configuration is as follows, but the recording failed. Is there a problem with register configuration?

[root@newx:/]# i2cdump -f -y 1 0x18
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 00 20 00 00 11 18 00 00 00 00 00 00 00 00 00    .. ..??………
10: 00 00 90 86 40 80 04 00 00 00 01 0c 00 03 81 00    ..??@??…??.??.
20: 00 10 00 00 00 00 02 00 00 00 00 00 00 00 00 00    .?….?………
30: 00 00 00 28 04 12 02 02 00 00 00 44 00 01 00 00    …(????…D.?..
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    …………….
50: 00 00 88 00 00 00 00 00 7f 00 00 00 00 00 00 00    ..?…..?…….
60: 7f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ?……………
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    …………….
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    …………….
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    …………….
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    …………….
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    …………….
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    …………….
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    …………….
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    …………….
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    …………….

Kailyn Chen：

Hello, what operating system do you use, Linux or Android?  Do you have any screenshot of the failed information? 

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XIANG HUANG：

linux4.4 buildroot

dowload driver path:

https://git.ti.com/cgit/ti-analog-linux-kernel/dmurphy-analog/tree/sound/soc/codecs/tlv320adc310x.c?h=tlv320adc310x_318&id=9ade84cc7e746abbf6bd9c12051eba3b80f056a9

I found that the downloaded header file is completely not on the Datasheet, such as the address of page1 and so on.

screenshot of failed:

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XIANG HUANG：

HI Is there a new driver?

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XIANG HUANG：

Hello, how to configure the MCLK of this chip? I can't get the MCLK signal from my side

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Kailyn Chen：

Sorry to reply you so late, and I didn't find the ADC3100 Linux driver of Verison4.4. We have the  TLV320ADCx140 linux driver which is similar with ADC3100.  By the way, this driver is meant to run with Linux v5.x. The Linux ALSA drivers changed somewhere around v4.x and these drivers are not compatible with earlier versions. In addition it need  to replace all the register commands from the TLV320ADCx140 with the corresponding commands of the TLV320ADC3100.

Here is the link for the TLV320ADCx140 linux driver.

git.ti.com/gitweb
git.ti.com/gitweb

The device tree binding example is at:

git.ti.com/gitweb

The documentation with the example at the end of the document to setup the I2C is at: 

https://git.ti.com/gitweb?p=ti-analog-linux-kernel/dmurphy-analog.git;a=blob;f=Documentation/devicetree/bindings/sound/tlv320adcx140.yaml;h=1433ff62b14f0264ae5278d40a612da8a82ad718;hb=47d53a01e1835c56eec2f301b93156c494f3e068

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XIANG HUANG：

Can the I2S MCLK of this chip be provided by itself or can only be provided by CPU and can only be done in slave mode

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Kailyn Chen：

Hello,

If you don't connect external MCLK input, the BCK input on ADC3100 can be used as the PLL input to generate the required internal MCLK.

Please see section 8.3.6 Audio Clock Generation in the datasheet.

https://www.ti.com.cn/lit/ds/symlink/tlv320adc3100.pdf

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XIANG HUANG：

Could you please tell me whether TLV is the master or CPU is the master? I need to configure CPU

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Kailyn Chen：

If you used the BCLK as PLL input to generate the internal MCLK, the TLV is the slave mode, because if the TLV is master, the BCLK is an output. 

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XIANG HUANG：

I am now sending MCLK from the CPU side to the TLV. I use oscilloscope to measure TLV pin (MCLK, LRCK, SCLK, SDI0) are normal, ARecord-d hw:0,0 –period-size=1024 –buffer-size= 4096-r 48000-c 2-f s16_le R.av Is the register not matched?

snd_soc_write(codec, ADC310X_RESET, SOFT_RESET);//0x01    snd_soc_write(codec, ADC310X_CLK_GEN_MUX, 0x03);//0x04    snd_soc_write(codec, ADC310X_PLL_PR_VAL, 0x91);//0x05    snd_soc_write(codec, ADC310X_PLL_J_VAL, 0x08);//0x06    snd_soc_write(codec, ADC310X_PLL_D_VAL_MSB, 0x07);//0x07    snd_soc_write(codec, ADC310X_PLL_D_VAL_LSB, 0x80);//0x08        snd_soc_write(codec, ADC310X_NADC_CLK, 0x88);//0x12    snd_soc_write(codec, ADC310X_MADC_CLK, 0x82);//0x13    snd_soc_write(codec, ADC310X_AOSR, 0x80);//0x14    snd_soc_write(codec, ADC310X_ADC_IADC, 0x80);//0x15    snd_soc_write(codec, ADC310X_BLCK_N_DIV, 0x84);//0x1e    snd_soc_write(codec, ADC310X_ADC_PROC_BLK, 0x01);//0x3d    snd_soc_write(codec, ADC310X_ADC_INTF_CTRL_1, 0x00);//0x1b,i2s 16bit    snd_soc_write(codec, ADC310X_ADC_INTF_CTRL_2, 0x03);//0x1d        snd_soc_write(codec, ADC310X_PAGE_SELECT, 0x01);//0x00    snd_soc_write(codec, ADC310X_DMCLK_GPIO2, 0x00);//0x33    snd_soc_write(codec, 0x3b, 0x00);//0x3b    snd_soc_write(codec, 0x3c, 0x00);//0x3c    snd_soc_write(codec, ADC310X_DMDIN_GPIO1, 0x7f);//0x34    snd_soc_write(codec, 0x36, 0x3f);//0x37    snd_soc_write(codec, 0x37, 0x7f);//0x37    snd_soc_write(codec, 0x39, 0x3f);//0x3b            snd_soc_write(codec, ADC310X_PAGE_SELECT, 0x00);//0x00    snd_soc_write(codec, ADC310X_ADC_DIGITAL, 0xc2);//0x51    snd_soc_write(codec, ADC310X_ADC_VOL_CTRL, 0x00);    snd_soc_write(codec, ADC310X_ADC_VOL_L, 0x7a);//0x53    snd_soc_write(codec, ADC310X_ADC_VOL_R, 0x7a);//0x54

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XIANG HUANG：

The data I have recorded now is some noise. I think there is something wrong with the output of the chip's SDI0. May I ask if there is something wrong with the configuration of the register?

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Kailyn Chen：

Hello, if there is some noise, it should not to be related to the register configuration, please refer to the FAQ about the " Audio CODECs and ADCs: Common Noise Issues":

https://e2e.ti.com/support/audio-group/audio/f/audio-forum/901452/faq-audio-codecs-and-adcs-common-noise-issues