TI中文支持网Part Number:TMS320F280049C
/******************************************************
*
* FUNC : SVG TI .c
* HW : TI 280049
* TIME : 2020.8.12
* NOTE :
*******************************************************/
// 头文件
#include "Main_Control.h"
#include "TI_CLA_TASK.h"
#include "device.h"
#include "can.h"
#include "sysctl.h"
#include "gpio.h"
//#include "f28004x_gpio.h"s
//CAN变量移植
#define MSG_DATA_LENGTH 4
volatile unsigned long msgCount = 0;
// Main
uint16_t temp_txMsgData[2],temp_rxMsgData[2];
uint16_t txMsgData[4], rxMsgData[4];
//void initCLA( void );
//变量定义
Uint32 Task_Mode = 0;
Uint32 Load_Dram_Num=0;
Uint32 Fram_Check_Cnt=0;
Uint32 Fram_Check_Result=0;
//50hz-60hz 程序兼容添加 / 数据中转 /修改 hz 后断电生效
float DETECT_N_ADD =0;
float DETECT_N_INV_ADD =0;
float DETECT_N2_ADD =0;
float DETECT_N2_INV_ADD =0;
float DETECT_N4_ADD =0;
float DETECT_N4_INV_ADD =0;
float DETECT_N8_ADD =0;
float DETECT_N8_INV_ADD =0;
//函数部分
//Uint16 buffer[500]={0};
float buffer_f[624]={0};
Uint16 num=0,num1=0;
void main(void)
{
static int16 Temp1= 0,Temp2=0;
InitSysCtrl(); //初始化系统时钟
InitPieCtrl(); //初始化PIE,clear PIE
InitGpio(); //初始化GPIO
GPIO_SetupPinMux(DEVICE_GPIO_PIN_LED1, GPIO_MUX_CPU1, 0);
GPIO_SetupPinOptions(DEVICE_GPIO_PIN_LED1, GPIO_OUTPUT, GPIO_PUSHPULL);
SCI_INIT(); //SCI 初始化配置
//initCLA();
IER = 0x0000; //CPU级中断失能
IFR = 0x0000; //清除CPU级中断标志
InitPieVectTable(); //初始化向量表
DINT; //关闭中断
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; //Enable the PIE
PieCtrlRegs.PIEACK.all = 0xFFFF;
EALLOW;
PieVectTable.EPWM1_INT = &EPWM1_ISR; //Write the ISR vector
EDIS;
PieCtrlRegs.PIEIER3.bit.INTx1 = 1; //PIEIERx bit
IER |= M_INT3; //Set the CPU IER @group 3
GPIO_setPinConfig(DEVICE_GPIO_CFG_CANRXA);
GPIO_setPinConfig(DEVICE_GPIO_CFG_CANTXA);
CAN_initModule(CANA_BASE);
CAN_setBitRate(CANA_BASE, DEVICE_SYSCLK_FREQ, 500000, 20);
/*
InitCpuTimers();
// 15.6K → 64
ConfigCpuTimer(&CpuTimer1, 100, 150);
CpuTimer1Regs.TCR.all = 0x4000;
*/
EPWM_INIT_GPIO();
EPWM_INIT_func();
PwmEnable();
//InitSPI(); //需要确认
//InitSPIB(); //需要确认
Control_Init(); //控制参数初始化
EINT; //Enable interrupts globally
ERTM;
//
// Initialize the receive message object used for receiving CAN messages.
// Message Object Parameters:
// Message Object ID Number: 2
// Message Identifier: 0x1234
// Message Frame: Standard
// Message Type: Receive
// Message ID Mask: 0x0
// Message Object Flags: None
// Message Data Length: 2 Bytes
CAN_enableTestMode(CANA_BASE, CAN_TEST_EXL);
CAN_setupMessageObject(CANA_BASE, 1, 0x18102700, CAN_MSG_FRAME_EXT,
CAN_MSG_OBJ_TYPE_TX, 0x0, CAN_MSG_OBJ_NO_FLAGS ,
MSG_DATA_LENGTH);
CAN_setupMessageObject(CANA_BASE, 2, 0x18102700, CAN_MSG_FRAME_EXT,
CAN_MSG_OBJ_TYPE_RX, 0xFFFF, CAN_MSG_OBJ_RX_INT_ENABLE|CAN_MSG_OBJ_USE_ID_FILTER|CAN_MSG_OBJ_USE_EXT_FILTER,
MSG_DATA_LENGTH);
CAN_startModule(CANA_BASE);
temp_txMsgData[0]=0x1234;
temp_txMsgData[1]=0x5678;
txMsgData[0] = temp_txMsgData[0]>>8;
txMsgData[1] = temp_txMsgData[0]&0xFF;
txMsgData[2] = temp_txMsgData[1]>>8;
txMsgData[3] = temp_txMsgData[1]&0xFF;
*(uint16_t *)rxMsgData = 0;
while(1)
{
CAN_sendMessage(CANA_BASE, 1, MSG_DATA_LENGTH, txMsgData);
DEVICE_DELAY_US(500000);
if (CAN_readMessage(CANA_BASE, 2, rxMsgData))
{
// Check that received data matches sent data.
// Device will halt here during debug if data doesn't match.
if((txMsgData[0] != rxMsgData[0])||(txMsgData[1] != rxMsgData[1])||
(txMsgData[2] != rxMsgData[2])||(txMsgData[3] != rxMsgData[3]))
{
Example_Fail = 1;
asm(" ESTOP0");
}
else
{
temp_rxMsgData[0]=rxMsgData[0]<<8|rxMsgData[1];
temp_rxMsgData[1]=rxMsgData[2]<<8|rxMsgData[3];
// Increment message received counter
msgCount++;
Example_PassCount++;
}
}
else
{
//
// Device will halt here during debug if no new data was received.
//
Example_Fail = 1;
asm(" ESTOP0");
}
txMsgData[0] += 0x01;
txMsgData[1] += 0x01;
if(txMsgData[0] > 0xFF)
{
txMsgData[0] = 0;
}
if(txMsgData[1] > 0xFF)
{
txMsgData[1] = 0;
}
}
}
void initCLA( void )
{
//
// Copy the program and constants from FLASH to RAM before configuring
// the CLA
//
#if defined(_FLASH)
// memcpy((Uint32 *)&Cla1ProgRunStart, (Uint32 *)&Cla1ProgLoadStart, (Uint32)&Cla1ProgLoadSize );
// memcpy((Uint32 *)&Cla1ConstRunStart, (Uint32 *)&Cla1ConstLoadStart,(Uint32)&Cla1ConstLoadSize );
// memcpy((Uint32 *)&CLA1mathTablesRunStart, (Uint32 *)&CLA1mathTablesLoadStart,(Uint32)&CLA1mathTablesLoadSize );
#endif //defined(_FLASH)
EALLOW;
// CLA Program will reside in RAMLS0 and data in RAMLS6, RAMLS7
//
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS0 = 1U; // 1: CLA Program memory
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS6 = 0U; // 0: CLA Data memory
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS7 = 0U;
//
// Select CLA as the master of RAMLS0, RAMSL6, RAMLS7
//
MemCfgRegs.LSxMSEL.bit.MSEL_LS0 = 0U; // 01: Memory is shared between CPU and CLA1 if···
MemCfgRegs.LSxMSEL.bit.MSEL_LS6 = 0U; // 00: Memory is dedicated to CPU.
MemCfgRegs.LSxMSEL.bit.MSEL_LS7 = 0U;
//
// Suppressing #770-D conversion from pointer to smaller integer
// The CLA address range is 16 bits so the addresses passed to the MVECT
// registers will be in the lower 64KW address space. Turn the warning
// back on after the MVECTs are assigned addresses
//
#pragma diag_suppress=770
// Assign the task vectors and set the triggers for task 1 — 8
//
/* Cla1Regs.MVECT1 = (uint16_t)&Cla1Task1;
Cla1Regs.MVECT2 = (uint16_t)&Cla1Task2;
Cla1Regs.MVECT3 = (uint16_t)&Cla1Task3;
Cla1Regs.MVECT4 = (uint16_t)&Cla1Task4;
Cla1Regs.MVECT5 = (uint16_t)&Cla1Task5;
Cla1Regs.MVECT6 = (uint16_t)&Cla1Task6;
Cla1Regs._MVECTBGRND = (uint16_t)&Cla1BackgroundTask;
DmaClaSrcSelRegs.CLA1TASKSRCSEL1.bit.TASK1 = 1; //ADCA1
DmaClaSrcSelRegs.CLA1TASKSRCSEL2.bit.TASK7 = 1; //Software
*/
// Enable Tasks 1 and 7. Since task 7 is forced in software, we must
// enable software forcing (IACKE)
// Task N Interrupt Enable
/* Cla1Regs.MIER.bit.INT1 = 1U; //0h (R/W) = TASK_INT_DISABLE
Cla1Regs.MIER.bit.INT2 = 0; //1h (R/W) = TASK_INT_ENABLE
Cla1Regs.MIER.bit.INT3 = 0;
Cla1Regs.MIER.bit.INT4 = 0;
Cla1Regs.MIER.bit.INT5 = 0;
Cla1Regs.MIER.bit.INT6 = 0;
Cla1Regs.MIER.bit.INT7 = 0;
*/
// Cla1Regs.MCTL.bit.IACKE = 1U; //
// The background task will be triggered by software; it shares
// the same trigger source as task 8. Disable the hardware triggering
// mechanism for the background task (if it is enabled) and then
// set the trigger source for task 8 to 0 indicating a software
// trigger.
//
// Enable the background task and start it. Enabling the background
// task disables task 8.
//
#pragma diag_warning=770
/*
Cla1Regs._MCTLBGRND.bit.TRIGEN = 0U; // 0 Hardware trigger is disabled.
DmaClaSrcSelRegs.CLA1TASKSRCSEL2.bit.TASK8 = 0U; // Software
Cla1Regs._MCTLBGRND.bit.BGEN = 1U; // 1 Background task is enabled
Cla1Regs._MCTLBGRND.bit.BGSTART = 1U; // Value of 1 will start the background task
// Force task 7, the one time initialization task
Cla1Regs.MIFRC.bit.INT1 = 1; // Soft start CLA1 / 1:en
Cla1Regs.MIFRC.bit.INT2 = 0; // Soft start CLA2
Cla1Regs.MIFRC.bit.INT3 = 0; // Soft start CLA3
Cla1Regs.MIFRC.bit.INT4 = 0; // Soft start CLA4
*/
EDIS;
}
void
GPIO_setPinConfig(uint32_t pinConfig)
{
uint32_t muxRegAddr;
uint32_t pinMask, shiftAmt;
muxRegAddr = (uint32_t)GPIOCTRL_BASE + (pinConfig >> 16);
shiftAmt = ((pinConfig >> 8) & (uint32_t)0xFFU);
pinMask = (uint32_t)0x3U << shiftAmt;
EALLOW;
//
// Clear fields in MUX register first to avoid glitches
//
HWREG(muxRegAddr) &= ~pinMask;
//
// Write value into GMUX register
//
HWREG(muxRegAddr + GPIO_MUX_TO_GMUX) =
(HWREG(muxRegAddr + GPIO_MUX_TO_GMUX) & ~pinMask) |
(((pinConfig >> 2) & (uint32_t)0x3U) << shiftAmt);
//
// Write value into MUX register
//
HWREG(muxRegAddr) |= ((pinConfig & (uint32_t)0x3U) << shiftAmt);
EDIS;
}
Green Deng：
你好，方便描述一下具体情况？
,
shipeng huang：
就是不管什么ID发送都可以接收到
,
Green Deng：
具体在新帖中进行讨论：https://www.ti2k.com/wp-content/uploads/ti2k/DeyiSupport_C2000_tms320f280049c
