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C2000 ware

在测试自己DIY制作的电路板的过程中

发现232串口一直没有数据显示

1、自己思考可能出现的问题:

有可能是设计电路板的时候,232没有将RXD、TXD交叉连接

2、自己思考的解决方案:

从CCS  C2000ware中的例程中,找到定义多路复用引脚的文件,将100多个引脚中的SCIA的功能定义,改成我们自己想要的功能。

3、操作如下:

例程初始定义的是

SCIA RXD是GPIO8 

SCIA TXD是GPIO9

我想修改成:

SCIA TXD是GPIO8 

SCIA RXD是GPIO9

4、相请教的问题

之前配置的时候,见过GPIOmap之类的文件,里面有何28388D的所有引脚的功能定义。

但是,现在单独去找,找了好久,没找到这个文件所在的位置

特来请教

谢谢

Susan Yang:

您指的是下面的文件?

//###########################################################################
//
// FILE:f2838x_gpio.h
//
// TITLE:Definitions for the GPIO registers.
//
//###########################################################################
// $TI Release: F2838x Support Library v3.03.00.00 $
// $Release Date: Sun Oct4 16:00:36 IST 2020 $
// $Copyright:
// Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without// modification, are permitted provided that the following conditions// are met:
////Redistributions of source code must retain the above copyright//notice, this list of conditions and the following disclaimer.
////Redistributions in binary form must reproduce the above copyright
//notice, this list of conditions and the following disclaimer in the//documentation and/or other materials provided with the//distribution.
////Neither the name of Texas Instruments Incorporated nor the names of
//its contributors may be used to endorse or promote products derived
//from this software without specific prior written permission.
//// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//############################################################################ifndef F2838X_GPIO_H
#define F2838X_GPIO_H#ifdef __cplusplus
extern "C" {
#endif//---------------------------------------------------------------------------
// GPIO Individual Register Bit Definitions:struct GPACTRL_BITS {// bits descriptionUint16 QUALPRD0:8;// 7:0 Qualification sampling period for GPIO0 to GPIO7Uint16 QUALPRD1:8;// 15:8 Qualification sampling period for GPIO8 to GPIO15Uint16 QUALPRD2:8;// 23:16 Qualification sampling period for GPIO16 to GPIO23Uint16 QUALPRD3:8;// 31:24 Qualification sampling period for GPIO24 to GPIO31
};union GPACTRL_REG {Uint32all;structGPACTRL_BITSbit;
};struct GPAQSEL1_BITS {// bits descriptionUint16 GPIO0:2;// 1:0 Select input qualification type for GPIO0Uint16 GPIO1:2;// 3:2 Select input qualification type for GPIO1Uint16 GPIO2:2;// 5:4 Select input qualification type for GPIO2Uint16 GPIO3:2;// 7:6 Select input qualification type for GPIO3Uint16 GPIO4:2;// 9:8 Select input qualification type for GPIO4Uint16 GPIO5:2;// 11:10 Select input qualification type for GPIO5Uint16 GPIO6:2;// 13:12 Select input qualification type for GPIO6Uint16 GPIO7:2;// 15:14 Select input qualification type for GPIO7Uint16 GPIO8:2;// 17:16 Select input qualification type for GPIO8Uint16 GPIO9:2;// 19:18 Select input qualification type for GPIO9Uint16 GPIO10:2;// 21:20 Select input qualification type for GPIO10Uint16 GPIO11:2;// 23:22 Select input qualification type for GPIO11Uint16 GPIO12:2;// 25:24 Select input qualification type for GPIO12Uint16 GPIO13:2;// 27:26 Select input qualification type for GPIO13Uint16 GPIO14:2;// 29:28 Select input qualification type for GPIO14Uint16 GPIO15:2;// 31:30 Select input qualification type for GPIO15
};union GPAQSEL1_REG {Uint32all;structGPAQSEL1_BITSbit;
};struct GPAQSEL2_BITS {// bits descriptionUint16 GPIO16:2;// 1:0 Select input qualification type for GPIO16Uint16 GPIO17:2;// 3:2 Select input qualification type for GPIO17Uint16 GPIO18:2;// 5:4 Select input qualification type for GPIO18Uint16 GPIO19:2;// 7:6 Select input qualification type for GPIO19Uint16 GPIO20:2;// 9:8 Select input qualification type for GPIO20Uint16 GPIO21:2;// 11:10 Select input qualification type for GPIO21Uint16 GPIO22:2;// 13:12 Select input qualification type for GPIO22Uint16 GPIO23:2;// 15:14 Select input qualification type for GPIO23Uint16 GPIO24:2;// 17:16 Select input qualification type for GPIO24Uint16 GPIO25:2;// 19:18 Select input qualification type for GPIO25Uint16 GPIO26:2;// 21:20 Select input qualification type for GPIO26Uint16 GPIO27:2;// 23:22 Select input qualification type for GPIO27Uint16 GPIO28:2;// 25:24 Select input qualification type for GPIO28Uint16 GPIO29:2;// 27:26 Select input qualification type for GPIO29Uint16 GPIO30:2;// 29:28 Select input qualification type for GPIO30Uint16 GPIO31:2;// 31:30 Select input qualification type for GPIO31
};union GPAQSEL2_REG {Uint32all;structGPAQSEL2_BITSbit;
};struct GPAMUX1_BITS {// bits descriptionUint16 GPIO0:2;// 1:0 Defines pin-muxing selection for GPIO0Uint16 GPIO1:2;// 3:2 Defines pin-muxing selection for GPIO1Uint16 GPIO2:2;// 5:4 Defines pin-muxing selection for GPIO2Uint16 GPIO3:2;// 7:6 Defines pin-muxing selection for GPIO3Uint16 GPIO4:2;// 9:8 Defines pin-muxing selection for GPIO4Uint16 GPIO5:2;// 11:10 Defines pin-muxing selection for GPIO5Uint16 GPIO6:2;// 13:12 Defines pin-muxing selection for GPIO6Uint16 GPIO7:2;// 15:14 Defines pin-muxing selection for GPIO7Uint16 GPIO8:2;// 17:16 Defines pin-muxing selection for GPIO8Uint16 GPIO9:2;// 19:18 Defines pin-muxing selection for GPIO9Uint16 GPIO10:2;// 21:20 Defines pin-muxing selection for GPIO10Uint16 GPIO11:2;// 23:22 Defines pin-muxing selection for GPIO11Uint16 GPIO12:2;// 25:24 Defines pin-muxing selection for GPIO12Uint16 GPIO13:2;// 27:26 Defines pin-muxing selection for GPIO13Uint16 GPIO14:2;// 29:28 Defines pin-muxing selection for GPIO14Uint16 GPIO15:2;// 31:30 Defines pin-muxing selection for GPIO15
};union GPAMUX1_REG {Uint32all;structGPAMUX1_BITSbit;
};struct GPAMUX2_BITS {// bits descriptionUint16 GPIO16:2;// 1:0 Defines pin-muxing selection for GPIO16Uint16 GPIO17:2;// 3:2 Defines pin-muxing selection for GPIO17Uint16 GPIO18:2;// 5:4 Defines pin-muxing selection for GPIO18Uint16 GPIO19:2;// 7:6 Defines pin-muxing selection for GPIO19Uint16 GPIO20:2;// 9:8 Defines pin-muxing selection for GPIO20Uint16 GPIO21:2;// 11:10 Defines pin-muxing selection for GPIO21Uint16 GPIO22:2;// 13:12 Defines pin-muxing selection for GPIO22Uint16 GPIO23:2;// 15:14 Defines pin-muxing selection for GPIO23Uint16 GPIO24:2;// 17:16 Defines pin-muxing selection for GPIO24Uint16 GPIO25:2;// 19:18 Defines pin-muxing selection for GPIO25Uint16 GPIO26:2;// 21:20 Defines pin-muxing selection for GPIO26Uint16 GPIO27:2;// 23:22 Defines pin-muxing selection for GPIO27Uint16 GPIO28:2;// 25:24 Defines pin-muxing selection for GPIO28Uint16 GPIO29:2;// 27:26 Defines pin-muxing selection for GPIO29Uint16 GPIO30:2;// 29:28 Defines pin-muxing selection for GPIO30Uint16 GPIO31:2;// 31:30 Defines pin-muxing selection for GPIO31
};union GPAMUX2_REG {Uint32all;structGPAMUX2_BITSbit;
};struct GPADIR_BITS {// bits descriptionUint16 GPIO0:1;// 0 Defines direction for this pin in GPIO modeUint16 GPIO1:1;// 1 Defines direction for this pin in GPIO modeUint16 GPIO2:1;// 2 Defines direction for this pin in GPIO modeUint16 GPIO3:1;// 3 Defines direction for this pin in GPIO modeUint16 GPIO4:1;// 4 Defines direction for this pin in GPIO modeUint16 GPIO5:1;// 5 Defines direction for this pin in GPIO modeUint16 GPIO6:1;// 6 Defines direction for this pin in GPIO modeUint16 GPIO7:1;// 7 Defines direction for this pin in GPIO modeUint16 GPIO8:1;// 8 Defines direction for this pin in GPIO modeUint16 GPIO9:1;// 9 Defines direction for this pin in GPIO modeUint16 GPIO10:1;// 10 Defines direction for this pin in GPIO modeUint16 GPIO11:1;// 11 Defines direction for this pin in GPIO modeUint16 GPIO12:1;// 12 Defines direction for this pin in GPIO modeUint16 GPIO13:1;// 13 Defines direction for this pin in GPIO modeUint16 GPIO14:1;// 14 Defines direction for this pin in GPIO modeUint16 GPIO15:1;// 15 Defines direction for this pin in GPIO modeUint16 GPIO16:1;// 16 Defines direction for this pin in GPIO modeUint16 GPIO17:1;// 17 Defines direction for this pin in GPIO modeUint16 GPIO18:1;// 18 Defines direction for this pin in GPIO modeUint16 GPIO19:1;// 19 Defines direction for this pin in GPIO modeUint16 GPIO20:1;// 20 Defines direction for this pin in GPIO modeUint16 GPIO21:1;// 21 Defines direction for this pin in GPIO modeUint16 GPIO22:1;// 22 Defines direction for this pin in GPIO modeUint16 GPIO23:1;// 23 Defines direction for this pin in GPIO modeUint16 GPIO24:1;// 24 Defines direction for this pin in GPIO modeUint16 GPIO25:1;// 25 Defines direction for this pin in GPIO modeUint16 GPIO26:1;// 26 Defines direction for this pin in GPIO modeUint16 GPIO27:1;// 27 Defines direction for this pin in GPIO modeUint16 GPIO28:1;// 28 Defines direction for this pin in GPIO modeUint16 GPIO29:1;// 29 Defines direction for this pin in GPIO modeUint16 GPIO30:1;// 30 Defines direction for this pin in GPIO modeUint16 GPIO31:1;// 31 Defines direction for this pin in GPIO mode
};union GPADIR_REG {Uint32all;structGPADIR_BITSbit;
};struct GPAPUD_BITS {// bits descriptionUint16 GPIO0:1;// 0 Pull-Up Disable control for this pinUint16 GPIO1:1;// 1 Pull-Up Disable control for this pinUint16 GPIO2:1;// 2 Pull-Up Disable control for this pinUint16 GPIO3:1;// 3 Pull-Up Disable control for this pinUint16 GPIO4:1;// 4 Pull-Up Disable control for this pinUint16 GPIO5:1;// 5 Pull-Up Disable control for this pinUint16 GPIO6:1;// 6 Pull-Up Disable control for this pinUint16 GPIO7:1;// 7 Pull-Up Disable control for this pinUint16 GPIO8:1;// 8 Pull-Up Disable control for this pinUint16 GPIO9:1;// 9 Pull-Up Disable control for this pinUint16 GPIO10:1;// 10 Pull-Up Disable control for this pinUint16 GPIO11:1;// 11 Pull-Up Disable control for this pinUint16 GPIO12:1;// 12 Pull-Up Disable control for this pinUint16 GPIO13:1;// 13 Pull-Up Disable control for this pinUint16 GPIO14:1;// 14 Pull-Up Disable control for this pinUint16 GPIO15:1;// 15 Pull-Up Disable control for this pinUint16 GPIO16:1;// 16 Pull-Up Disable control for this pinUint16 GPIO17:1;// 17 Pull-Up Disable control for this pinUint16 GPIO18:1;// 18 Pull-Up Disable control for this pinUint16 GPIO19:1;// 19 Pull-Up Disable control for this pinUint16 GPIO20:1;// 20 Pull-Up Disable control for this pinUint16 GPIO21:1;// 21 Pull-Up Disable control for this pinUint16 GPIO22:1;// 22 Pull-Up Disable control for this pinUint16 GPIO23:1;// 23 Pull-Up Disable control for this pinUint16 GPIO24:1;// 24 Pull-Up Disable control for this pinUint16 GPIO25:1;// 25 Pull-Up Disable control for this pinUint16 GPIO26:1;// 26 Pull-Up Disable control for this pinUint16 GPIO27:1;// 27 Pull-Up Disable control for this pinUint16 GPIO28:1;// 28 Pull-Up Disable control for this pinUint16 GPIO29:1;// 29 Pull-Up Disable control for this pinUint16 GPIO30:1;// 30 Pull-Up Disable control for this pinUint16 GPIO31:1;// 31 Pull-Up Disable control for this pin
};union GPAPUD_REG {Uint32all;structGPAPUD_BITSbit;
};struct GPAINV_BITS {// bits descriptionUint16 GPIO0:1;// 0 Input inversion control for this pinUint16 GPIO1:1;// 1 Input inversion control for this pinUint16 GPIO2:1;// 2 Input inversion control for this pinUint16 GPIO3:1;// 3 Input inversion control for this pinUint16 GPIO4:1;// 4 Input inversion control for this pinUint16 GPIO5:1;// 5 Input inversion control for this pinUint16 GPIO6:1;// 6 Input inversion control for this pinUint16 GPIO7:1;// 7 Input inversion control for this pinUint16 GPIO8:1;// 8 Input inversion control for this pinUint16 GPIO9:1;// 9 Input inversion control for this pinUint16 GPIO10:1;// 10 Input inversion control for this pinUint16 GPIO11:1;// 11 Input inversion control for this pinUint16 GPIO12:1;// 12 Input inversion control for this pinUint16 GPIO13:1;// 13 Input inversion control for this pinUint16 GPIO14:1;// 14 Input inversion control for this pinUint16 GPIO15:1;// 15 Input inversion control for this pinUint16 GPIO16:1;// 16 Input inversion control for this pinUint16 GPIO17:1;// 17 Input inversion control for this pinUint16 GPIO18:1;// 18 Input inversion control for this pinUint16 GPIO19:1;// 19 Input inversion control for this pinUint16 GPIO20:1;// 20 Input inversion control for this pinUint16 GPIO21:1;// 21 Input inversion control for this pinUint16 GPIO22:1;// 22 Input inversion control for this pinUint16 GPIO23:1;// 23 Input inversion control for this pinUint16 GPIO24:1;// 24 Input inversion control for this pinUint16 GPIO25:1;// 25 Input inversion control for this pinUint16 GPIO26:1;// 26 Input inversion control for this pinUint16 GPIO27:1;// 27 Input inversion control for this pinUint16 GPIO28:1;// 28 Input inversion control for this pinUint16 GPIO29:1;// 29 Input inversion control for this pinUint16 GPIO30:1;// 30 Input inversion control for this pinUint16 GPIO31:1;// 31 Input inversion control for this pin
};union GPAINV_REG {Uint32all;structGPAINV_BITSbit;
};struct GPAODR_BITS {// bits descriptionUint16 GPIO0:1;// 0 Outpout Open-Drain control for this pinUint16 GPIO1:1;// 1 Outpout Open-Drain control for this pinUint16 GPIO2:1;// 2 Outpout Open-Drain control for this pinUint16 GPIO3:1;// 3 Outpout Open-Drain control for this pinUint16 GPIO4:1;// 4 Outpout Open-Drain control for this pinUint16 GPIO5:1;// 5 Outpout Open-Drain control for this pinUint16 GPIO6:1;// 6 Outpout Open-Drain control for this pinUint16 GPIO7:1;// 7 Outpout Open-Drain control for this pinUint16 GPIO8:1;// 8 Outpout Open-Drain control for this pinUint16 GPIO9:1;// 9 Outpout Open-Drain control for this pinUint16 GPIO10:1;// 10 Outpout Open-Drain control for this pinUint16 GPIO11:1;// 11 Outpout Open-Drain control for this pinUint16 GPIO12:1;// 12 Outpout Open-Drain control for this pinUint16 GPIO13:1;// 13 Outpout Open-Drain control for this pinUint16 GPIO14:1;// 14 Outpout Open-Drain control for this pinUint16 GPIO15:1;// 15 Outpout Open-Drain control for this pinUint16 GPIO16:1;// 16 Outpout Open-Drain control for this pinUint16 GPIO17:1;// 17 Outpout Open-Drain control for this pinUint16 GPIO18:1;// 18 Outpout Open-Drain control for this pinUint16 GPIO19:1;// 19 Outpout Open-Drain control for this pinUint16 GPIO20:1;// 20 Outpout Open-Drain control for this pinUint16 GPIO21:1;// 21 Outpout Open-Drain control for this pinUint16 GPIO22:1;// 22 Outpout Open-Drain control for this pinUint16 GPIO23:1;// 23 Outpout Open-Drain control for this pinUint16 GPIO24:1;// 24 Outpout Open-Drain control for this pinUint16 GPIO25:1;// 25 Outpout Open-Drain control for this pinUint16 GPIO26:1;// 26 Outpout Open-Drain control for this pinUint16 GPIO27:1;// 27 Outpout Open-Drain control for this pinUint16 GPIO28:1;// 28 Outpout Open-Drain control for this pinUint16 GPIO29:1;// 29 Outpout Open-Drain control for this pinUint16 GPIO30:1;// 30 Outpout Open-Drain control for this pinUint16 GPIO31:1;// 31 Outpout Open-Drain control for this pin
};union GPAODR_REG {Uint32all;structGPAODR_BITSbit;
};struct GPAGMUX1_BITS {// bits descriptionUint16 GPIO0:2;// 1:0 Defines pin-muxing selection for GPIO0Uint16 GPIO1:2;// 3:2 Defines pin-muxing selection for GPIO1Uint16 GPIO2:2;// 5:4 Defines pin-muxing selection for GPIO2Uint16 GPIO3:2;// 7:6 Defines pin-muxing selection for GPIO3Uint16 GPIO4:2;// 9:8 Defines pin-muxing selection for GPIO4Uint16 GPIO5:2;// 11:10 Defines pin-muxing selection for GPIO5Uint16 GPIO6:2;// 13:12 Defines pin-muxing selection for GPIO6Uint16 GPIO7:2;// 15:14 Defines pin-muxing selection for GPIO7Uint16 GPIO8:2;// 17:16 Defines pin-muxing selection for GPIO8Uint16 GPIO9:2;// 19:18 Defines pin-muxing selection for GPIO9Uint16 GPIO10:2;// 21:20 Defines pin-muxing selection for GPIO10Uint16 GPIO11:2;// 23:22 Defines pin-muxing selection for GPIO11Uint16 GPIO12:2;// 25:24 Defines pin-muxing selection for GPIO12Uint16 GPIO13:2;// 27:26 Defines pin-muxing selection for GPIO13Uint16 GPIO14:2;// 29:28 Defines pin-muxing selection for GPIO14Uint16 GPIO15:2;// 31:30 Defines pin-muxing selection for GPIO15
};union GPAGMUX1_REG {Uint32all;structGPAGMUX1_BITSbit;
};struct GPAGMUX2_BITS {// bits descriptionUint16 GPIO16:2;// 1:0 Defines pin-muxing selection for GPIO16Uint16 GPIO17:2;// 3:2 Defines pin-muxing selection for GPIO17Uint16 GPIO18:2;// 5:4 Defines pin-muxing selection for GPIO18Uint16 GPIO19:2;// 7:6 Defines pin-muxing selection for GPIO19Uint16 GPIO20:2;// 9:8 Defines pin-muxing selection for GPIO20Uint16 GPIO21:2;// 11:10 Defines pin-muxing selection for GPIO21Uint16 GPIO22:2;// 13:12 Defines pin-muxing selection for GPIO22Uint16 GPIO23:2;// 15:14 Defines pin-muxing selection for GPIO23Uint16 GPIO24:2;// 17:16 Defines pin-muxing selection for GPIO24Uint16 GPIO25:2;// 19:18 Defines pin-muxing selection for GPIO25Uint16 GPIO26:2;// 21:20 Defines pin-muxing selection for GPIO26Uint16 GPIO27:2;// 23:22 Defines pin-muxing selection for GPIO27Uint16 GPIO28:2;// 25:24 Defines pin-muxing selection for GPIO28Uint16 GPIO29:2;// 27:26 Defines pin-muxing selection for GPIO29Uint16 GPIO30:2;// 29:28 Defines pin-muxing selection for GPIO30Uint16 GPIO31:2;// 31:30 Defines pin-muxing selection for GPIO31
};union GPAGMUX2_REG {Uint32all;structGPAGMUX2_BITSbit;
};struct GPACSEL1_BITS {// bits descriptionUint16 GPIO0:4;// 3:0 GPIO0 Master CPU SelectUint16 GPIO1:4;// 7:4 GPIO1 Master CPU SelectUint16 GPIO2:4;// 11:8 GPIO2 Master CPU SelectUint16 GPIO3:4;// 15:12 GPIO3 Master CPU SelectUint16 GPIO4:4;// 19:16 GPIO4 Master CPU SelectUint16 GPIO5:4;// 23:20 GPIO5 Master CPU SelectUint16 GPIO6:4;// 27:24 GPIO6 Master CPU SelectUint16 GPIO7:4;// 31:28 GPIO7 Master CPU Select
};union GPACSEL1_REG {Uint32all;structGPACSEL1_BITSbit;
};struct GPACSEL2_BITS {// bits descriptionUint16 GPIO8:4;// 3:0 GPIO8 Master CPU SelectUint16 GPIO9:4;// 7:4 GPIO9 Master CPU SelectUint16 GPIO10:4;// 11:8 GPIO10 Master CPU SelectUint16 GPIO11:4;// 15:12 GPIO11 Master CPU SelectUint16 GPIO12:4;// 19:16 GPIO12 Master CPU SelectUint16 GPIO13:4;// 23:20 GPIO13 Master CPU SelectUint16 GPIO14:4;// 27:24 GPIO14 Master CPU SelectUint16 GPIO15:4;// 31:28 GPIO15 Master CPU Select
};union GPACSEL2_REG {Uint32all;structGPACSEL2_BITSbit;
};struct GPACSEL3_BITS {// bits descriptionUint16 GPIO16:4;// 3:0 GPIO16 Master CPU SelectUint16 GPIO17:4;// 7:4 GPIO17 Master CPU SelectUint16 GPIO18:4;// 11:8 GPIO18 Master CPU SelectUint16 GPIO19:4;// 15:12 GPIO19 Master CPU SelectUint16 GPIO20:4;// 19:16 GPIO20 Master CPU SelectUint16 GPIO21:4;// 23:20 GPIO21 Master CPU SelectUint16 GPIO22:4;// 27:24 GPIO22 Master CPU SelectUint16 GPIO23:4;// 31:28 GPIO23 Master CPU Select
};union GPACSEL3_REG {Uint32all;structGPACSEL3_BITSbit;
};struct GPACSEL4_BITS {// bits descriptionUint16 GPIO24:4;// 3:0 GPIO24 Master CPU SelectUint16 GPIO25:4;// 7:4 GPIO25 Master CPU SelectUint16 GPIO26:4;// 11:8 GPIO26 Master CPU SelectUint16 GPIO27:4;// 15:12 GPIO27 Master CPU SelectUint16 GPIO28:4;// 19:16 GPIO28 Master CPU SelectUint16 GPIO29:4;// 23:20 GPIO29 Master CPU SelectUint16 GPIO30:4;// 27:24 GPIO30 Master CPU SelectUint16 GPIO31:4;// 31:28 GPIO31 Master CPU Select
};union GPACSEL4_REG {Uint32all;structGPACSEL4_BITSbit;
};struct GPALOCK_BITS {// bits descriptionUint16 GPIO0:1;// 0 Configuration Lock bit for this pinUint16 GPIO1:1;// 1 Configuration Lock bit for this pinUint16 GPIO2:1;// 2 Configuration Lock bit for this pinUint16 GPIO3:1;// 3 Configuration Lock bit for this pinUint16 GPIO4:1;// 4 Configuration Lock bit for this pinUint16 GPIO5:1;// 5 Configuration Lock bit for this pinUint16 GPIO6:1;// 6 Configuration Lock bit for this pinUint16 GPIO7:1;// 7 Configuration Lock bit for this pinUint16 GPIO8:1;// 8 Configuration Lock bit for this pinUint16 GPIO9:1;// 9 Configuration Lock bit for this pinUint16 GPIO10:1;// 10 Configuration Lock bit for this pinUint16 GPIO11:1;// 11 Configuration Lock bit for this pinUint16 GPIO12:1;// 12 Configuration Lock bit for this pinUint16 GPIO13:1;// 13 Configuration Lock bit for this pinUint16 GPIO14:1;// 14 Configuration Lock bit for this pinUint16 GPIO15:1;// 15 Configuration Lock bit for this pinUint16 GPIO16:1;// 16 Configuration Lock bit for this pinUint16 GPIO17:1;// 17 Configuration Lock bit for this pinUint16 GPIO18:1;// 18 Configuration Lock bit for this pinUint16 GPIO19:1;// 19 Configuration Lock bit for this pinUint16 GPIO20:1;// 20 Configuration Lock bit for this pinUint16 GPIO21:1;// 21 Configuration Lock bit for this pinUint16 GPIO22:1;// 22 Configuration Lock bit for this pinUint16 GPIO23:1;// 23 Configuration Lock bit for this pinUint16 GPIO24:1;// 24 Configuration Lock bit for this pinUint16 GPIO25:1;// 25 Configuration Lock bit for this pinUint16 GPIO26:1;// 26 Configuration Lock bit for this pinUint16 GPIO27:1;// 27 Configuration Lock bit for this pinUint16 GPIO28:1;// 28 Configuration Lock bit for this pinUint16 GPIO29:1;// 29 Configuration Lock bit for this pinUint16 GPIO30:1;// 30 Configuration Lock bit for this pinUint16 GPIO31:1;// 31 Configuration Lock bit for this pin
};union GPALOCK_REG {Uint32all;structGPALOCK_BITSbit;
};struct GPACR_BITS {// bits descriptionUint16 GPIO0:1;// 0 Configuration lock commit bit for this pinUint16 GPIO1:1;// 1 Configuration lock commit bit for this pinUint16 GPIO2:1;// 2 Configuration lock commit bit for this pinUint16 GPIO3:1;// 3 Configuration lock commit bit for this pinUint16 GPIO4:1;// 4 Configuration lock commit bit for this pinUint16 GPIO5:1;// 5 Configuration lock commit bit for this pinUint16 GPIO6:1;// 6 Configuration lock commit bit for this pinUint16 GPIO7:1;// 7 Configuration lock commit bit for this pinUint16 GPIO8:1;// 8 Configuration lock commit bit for this pinUint16 GPIO9:1;// 9 Configuration lock commit bit for this pinUint16 GPIO10:1;// 10 Configuration lock commit bit for this pinUint16 GPIO11:1;// 11 Configuration lock commit bit for this pinUint16 GPIO12:1;// 12 Configuration lock commit bit for this pinUint16 GPIO13:1;// 13 Configuration lock commit bit for this pinUint16 GPIO14:1;// 14 Configuration lock commit bit for this pinUint16 GPIO15:1;// 15 Configuration lock commit bit for this pinUint16 GPIO16:1;// 16 Configuration lock commit bit for this pinUint16 GPIO17:1;// 17 Configuration lock commit bit for this pinUint16 GPIO18:1;// 18 Configuration lock commit bit for this pinUint16 GPIO19:1;// 19 Configuration lock commit bit for this pinUint16 GPIO20:1;// 20 Configuration lock commit bit for this pinUint16 GPIO21:1;// 21 Configuration lock commit bit for this pinUint16 GPIO22:1;// 22 Configuration lock commit bit for this pinUint16 GPIO23:1;// 23 Configuration lock commit bit for this pinUint16 GPIO24:1;// 24 Configuration lock commit bit for this pinUint16 GPIO25:1;// 25 Configuration lock commit bit for this pinUint16 GPIO26:1;// 26 Configuration lock commit bit for this pinUint16 GPIO27:1;// 27 Configuration lock commit bit for this pinUint16 GPIO28:1;// 28 Configuration lock commit bit for this pinUint16 GPIO29:1;// 29 Configuration lock commit bit for this pinUint16 GPIO30:1;// 30 Configuration lock commit bit for this pinUint16 GPIO31:1;// 31 Configuration lock commit bit for this pin
};union GPACR_REG {Uint32all;structGPACR_BITSbit;
};struct GPBCTRL_BITS {// bits descriptionUint16 QUALPRD0:8;// 7:0 Qualification sampling period for GPIO32 to GPIO39Uint16 QUALPRD1:8;// 15:8 Qualification sampling period for GPIO40 to GPIO47Uint16 QUALPRD2:8;// 23:16 Qualification sampling period for GPIO48 to GPIO55Uint16 QUALPRD3:8;// 31:24 Qualification sampling period for GPIO56 to GPIO63
};union GPBCTRL_REG {Uint32all;structGPBCTRL_BITSbit;
};struct GPBQSEL1_BITS {// bits descriptionUint16 GPIO32:2;// 1:0 Select input qualification type for GPIO32Uint16 GPIO33:2;// 3:2 Select input qualification type for GPIO33Uint16 GPIO34:2;// 5:4 Select input qualification type for GPIO34Uint16 GPIO35:2;// 7:6 Select input qualification type for GPIO35Uint16 GPIO36:2;// 9:8 Select input qualification type for GPIO36Uint16 GPIO37:2;// 11:10 Select input qualification type for GPIO37Uint16 GPIO38:2;// 13:12 Select input qualification type for GPIO38Uint16 GPIO39:2;// 15:14 Select input qualification type for GPIO39Uint16 GPIO40:2;// 17:16 Select input qualification type for GPIO40Uint16 GPIO41:2;// 19:18 Select input qualification type for GPIO41Uint16 GPIO42:2;// 21:20 Select input qualification type for GPIO42Uint16 GPIO43:2;// 23:22 Select input qualification type for GPIO43Uint16 GPIO44:2;// 25:24 Select input qualification type for GPIO44Uint16 GPIO45:2;// 27:26 Select input qualification type for GPIO45Uint16 GPIO46:2;// 29:28 Select input qualification type for GPIO46Uint16 GPIO47:2;// 31:30 Select input qualification type for GPIO47
};union GPBQSEL1_REG {Uint32all;structGPBQSEL1_BITSbit;
};struct GPBQSEL2_BITS {// bits descriptionUint16 GPIO48:2;// 1:0 Select input qualification type for GPIO48Uint16 GPIO49:2;// 3:2 Select input qualification type for GPIO49Uint16 GPIO50:2;// 5:4 Select input qualification type for GPIO50Uint16 GPIO51:2;// 7:6 Select input qualification type for GPIO51Uint16 GPIO52:2;// 9:8 Select input qualification type for GPIO52Uint16 GPIO53:2;// 11:10 Select input qualification type for GPIO53Uint16 GPIO54:2;// 13:12 Select input qualification type for GPIO54Uint16 GPIO55:2;// 15:14 Select input qualification type for GPIO55Uint16 GPIO56:2;// 17:16 Select input qualification type for GPIO56Uint16 GPIO57:2;// 19:18 Select input qualification type for GPIO57Uint16 GPIO58:2;// 21:20 Select input qualification type for GPIO58Uint16 GPIO59:2;// 23:22 Select input qualification type for GPIO59Uint16 GPIO60:2;// 25:24 Select input qualification type for GPIO60Uint16 GPIO61:2;// 27:26 Select input qualification type for GPIO61Uint16 GPIO62:2;// 29:28 Select input qualification type for GPIO62Uint16 GPIO63:2;// 31:30 Select input qualification type for GPIO63
};union GPBQSEL2_REG {Uint32all;structGPBQSEL2_BITSbit;
};struct GPBMUX1_BITS {// bits descriptionUint16 GPIO32:2;// 1:0 Defines pin-muxing selection for GPIO32Uint16 GPIO33:2;// 3:2 Defines pin-muxing selection for GPIO33Uint16 GPIO34:2;// 5:4 Defines pin-muxing selection for GPIO34Uint16 GPIO35:2;// 7:6 Defines pin-muxing selection for GPIO35Uint16 GPIO36:2;// 9:8 Defines pin-muxing selection for GPIO36Uint16 GPIO37:2;// 11:10 Defines pin-muxing selection for GPIO37Uint16 GPIO38:2;// 13:12 Defines pin-muxing selection for GPIO38Uint16 GPIO39:2;// 15:14 Defines pin-muxing selection for GPIO39Uint16 GPIO40:2;// 17:16 Defines pin-muxing selection for GPIO40Uint16 GPIO41:2;// 19:18 Defines pin-muxing selection for GPIO41Uint16 GPIO42:2;// 21:20 Defines pin-muxing selection for GPIO42Uint16 GPIO43:2;// 23:22 Defines pin-muxing selection for GPIO43Uint16 GPIO44:2;// 25:24 Defines pin-muxing selection for GPIO44Uint16 GPIO45:2;// 27:26 Defines pin-muxing selection for GPIO45Uint16 GPIO46:2;// 29:28 Defines pin-muxing selection for GPIO46Uint16 GPIO47:2;// 31:30 Defines pin-muxing selection for GPIO47
};union GPBMUX1_REG {Uint32all;structGPBMUX1_BITSbit;
};struct GPBMUX2_BITS {// bits descriptionUint16 GPIO48:2;// 1:0 Defines pin-muxing selection for GPIO48Uint16 GPIO49:2;// 3:2 Defines pin-muxing selection for GPIO49Uint16 GPIO50:2;// 5:4 Defines pin-muxing selection for GPIO50Uint16 GPIO51:2;// 7:6 Defines pin-muxing selection for GPIO51Uint16 GPIO52:2;// 9:8 Defines pin-muxing selection for GPIO52Uint16 GPIO53:2;// 11:10 Defines pin-muxing selection for GPIO53Uint16 GPIO54:2;// 13:12 Defines pin-muxing selection for GPIO54Uint16 GPIO55:2;// 15:14 Defines pin-muxing selection for GPIO55Uint16 GPIO56:2;// 17:16 Defines pin-muxing selection for GPIO56Uint16 GPIO57:2;// 19:18 Defines pin-muxing selection for GPIO57Uint16 GPIO58:2;// 21:20 Defines pin-muxing selection for GPIO58Uint16 GPIO59:2;// 23:22 Defines pin-muxing selection for GPIO59Uint16 GPIO60:2;// 25:24 Defines pin-muxing selection for GPIO60Uint16 GPIO61:2;// 27:26 Defines pin-muxing selection for GPIO61Uint16 GPIO62:2;// 29:28 Defines pin-muxing selection for GPIO62Uint16 GPIO63:2;// 31:30 Defines pin-muxing selection for GPIO63
};union GPBMUX2_REG {Uint32all;structGPBMUX2_BITSbit;
};struct GPBDIR_BITS {// bits descriptionUint16 GPIO32:1;// 0 Defines direction for this pin in GPIO modeUint16 GPIO33:1;// 1 Defines direction for this pin in GPIO modeUint16 GPIO34:1;// 2 Defines direction for this pin in GPIO modeUint16 GPIO35:1;// 3 Defines direction for this pin in GPIO modeUint16 GPIO36:1;// 4 Defines direction for this pin in GPIO modeUint16 GPIO37:1;// 5 Defines direction for this pin in GPIO modeUint16 GPIO38:1;// 6 Defines direction for this pin in GPIO modeUint16 GPIO39:1;// 7 Defines direction for this pin in GPIO modeUint16 GPIO40:1;// 8 Defines direction for this pin in GPIO modeUint16 GPIO41:1;// 9 Defines direction for this pin in GPIO modeUint16 GPIO42:1;// 10 Defines direction for this pin in GPIO modeUint16 GPIO43:1;// 11 Defines direction for this pin in GPIO modeUint16 GPIO44:1;// 12 Defines direction for this pin in GPIO modeUint16 GPIO45:1;// 13 Defines direction for this pin in GPIO modeUint16 GPIO46:1;// 14 Defines direction for this pin in GPIO modeUint16 GPIO47:1;// 15 Defines direction for this pin in GPIO modeUint16 GPIO48:1;// 16 Defines direction for this pin in GPIO modeUint16 GPIO49:1;// 17 Defines direction for this pin in GPIO modeUint16 GPIO50:1;// 18 Defines direction for this pin in GPIO modeUint16 GPIO51:1;// 19 Defines direction for this pin in GPIO modeUint16 GPIO52:1;// 20 Defines direction for this pin in GPIO modeUint16 GPIO53:1;// 21 Defines direction for this pin in GPIO modeUint16 GPIO54:1;// 22 Defines direction for this pin in GPIO modeUint16 GPIO55:1;// 23 Defines direction for this pin in GPIO modeUint16 GPIO56:1;// 24 Defines direction for this pin in GPIO modeUint16 GPIO57:1;// 25 Defines direction for this pin in GPIO modeUint16 GPIO58:1;// 26 Defines direction for this pin in GPIO modeUint16 GPIO59:1;// 27 Defines direction for this pin in GPIO modeUint16 GPIO60:1;// 28 Defines direction for this pin in GPIO modeUint16 GPIO61:1;// 29 Defines direction for this pin in GPIO modeUint16 GPIO62:1;// 30 Defines direction for this pin in GPIO modeUint16 GPIO63:1;// 31 Defines direction for this pin in GPIO mode
};union GPBDIR_REG {Uint32all;structGPBDIR_BITSbit;
};struct GPBPUD_BITS {// bits descriptionUint16 GPIO32:1;// 0 Pull-Up Disable control for this pinUint16 GPIO33:1;// 1 Pull-Up Disable control for this pinUint16 GPIO34:1;// 2 Pull-Up Disable control for this pinUint16 GPIO35:1;// 3 Pull-Up Disable control for this pinUint16 GPIO36:1;// 4 Pull-Up Disable control for this pinUint16 GPIO37:1;// 5 Pull-Up Disable control for this pinUint16 GPIO38:1;// 6 Pull-Up Disable control for this pinUint16 GPIO39:1;// 7 Pull-Up Disable control for this pinUint16 GPIO40:1;// 8 Pull-Up Disable control for this pinUint16 GPIO41:1;// 9 Pull-Up Disable control for this pinUint16 GPIO42:1;// 10 Pull-Up Disable control for this pinUint16 GPIO43:1;// 11 Pull-Up Disable control for this pinUint16 GPIO44:1;// 12 Pull-Up Disable control for this pinUint16 GPIO45:1;// 13 Pull-Up Disable control for this pinUint16 GPIO46:1;// 14 Pull-Up Disable control for this pinUint16 GPIO47:1;// 15 Pull-Up Disable control for this pinUint16 GPIO48:1;// 16 Pull-Up Disable control for this pinUint16 GPIO49:1;// 17 Pull-Up Disable control for this pinUint16 GPIO50:1;// 18 Pull-Up Disable control for this pinUint16 GPIO51:1;// 19 Pull-Up Disable control for this pinUint16 GPIO52:1;// 20 Pull-Up Disable control for this pinUint16 GPIO53:1;// 21 Pull-Up Disable control for this pinUint16 GPIO54:1;// 22 Pull-Up Disable control for this pinUint16 GPIO55:1;// 23 Pull-Up Disable control for this pinUint16 GPIO56:1;// 24 Pull-Up Disable control for this pinUint16 GPIO57:1;// 25 Pull-Up Disable control for this pinUint16 GPIO58:1;// 26 Pull-Up Disable control for this pinUint16 GPIO59:1;// 27 Pull-Up Disable control for this pinUint16 GPIO60:1;// 28 Pull-Up Disable control for this pinUint16 GPIO61:1;// 29 Pull-Up Disable control for this pinUint16 GPIO62:1;// 30 Pull-Up Disable control for this pinUint16 GPIO63:1;// 31 Pull-Up Disable control for this pin
};union GPBPUD_REG {Uint32all;structGPBPUD_BITSbit;
};struct GPBINV_BITS {// bits descriptionUint16 GPIO32:1;// 0 Input inversion control for this pinUint16 GPIO33:1;// 1 Input inversion control for this pinUint16 GPIO34:1;// 2 Input inversion control for this pinUint16 GPIO35:1;// 3 Input inversion control for this pinUint16 GPIO36:1;// 4 Input inversion control for this pinUint16 GPIO37:1;// 5 Input inversion control for this pinUint16 GPIO38:1;// 6 Input inversion control for this pinUint16 GPIO39:1;// 7 Input inversion control for this pinUint16 GPIO40:1;// 8 Input inversion control for this pinUint16 GPIO41:1;// 9 Input inversion control for this pinUint16 GPIO42:1;// 10 Input inversion control for this pinUint16 GPIO43:1;// 11 Input inversion control for this pinUint16 GPIO44:1;// 12 Input inversion control for this pinUint16 GPIO45:1;// 13 Input inversion control for this pinUint16 GPIO46:1;// 14 Input inversion control for this pinUint16 GPIO47:1;// 15 Input inversion control for this pinUint16 GPIO48:1;// 16 Input inversion control for this pinUint16 GPIO49:1;// 17 Input inversion control for this pinUint16 GPIO50:1;// 18 Input inversion control for this pinUint16 GPIO51:1;// 19 Input inversion control for this pinUint16 GPIO52:1;// 20 Input inversion control for this pinUint16 GPIO53:1;// 21 Input inversion control for this pinUint16 GPIO54:1;// 22 Input inversion control for this pinUint16 GPIO55:1;// 23 Input inversion control for this pinUint16 GPIO56:1;// 24 Input inversion control for this pinUint16 GPIO57:1;// 25 Input inversion control for this pinUint16 GPIO58:1;// 26 Input inversion control for this pinUint16 GPIO59:1;// 27 Input inversion control for this pinUint16 GPIO60:1;// 28 Input inversion control for this pinUint16 GPIO61:1;// 29 Input inversion control for this pinUint16 GPIO62:1;// 30 Input inversion control for this pinUint16 GPIO63:1;// 31 Input inversion control for this pin
};union GPBINV_REG {Uint32all;structGPBINV_BITSbit;
};struct GPBODR_BITS {// bits descriptionUint16 GPIO32:1;// 0 Outpout Open-Drain control for this pinUint16 GPIO33:1;// 1 Outpout Open-Drain control for this pinUint16 GPIO34:1;// 2 Outpout Open-Drain control for this pinUint16 GPIO35:1;// 3 Outpout Open-Drain control for this pinUint16 GPIO36:1;// 4 Outpout Open-Drain control for this pinUint16 GPIO37:1;// 5 Outpout Open-Drain control for this pinUint16 GPIO38:1;// 6 Outpout Open-Drain control for this pinUint16 GPIO39:1;// 7 Outpout Open-Drain control for this pinUint16 GPIO40:1;// 8 Outpout Open-Drain control for this pinUint16 GPIO41:1;// 9 Outpout Open-Drain control for this pinUint16 GPIO42:1;// 10 Outpout Open-Drain control for this pinUint16 GPIO43:1;// 11 Outpout Open-Drain control for this pinUint16 GPIO44:1;// 12 Outpout Open-Drain control for this pinUint16 GPIO45:1;// 13 Outpout Open-Drain control for this pinUint16 GPIO46:1;// 14 Outpout Open-Drain control for this pinUint16 GPIO47:1;// 15 Outpout Open-Drain control for this pinUint16 GPIO48:1;// 16 Outpout Open-Drain control for this pinUint16 GPIO49:1;// 17 Outpout Open-Drain control for this pinUint16 GPIO50:1;// 18 Outpout Open-Drain control for this pinUint16 GPIO51:1;// 19 Outpout Open-Drain control for this pinUint16 GPIO52:1;// 20 Outpout Open-Drain control for this pinUint16 GPIO53:1;// 21 Outpout Open-Drain control for this pinUint16 GPIO54:1;// 22 Outpout Open-Drain control for this pinUint16 GPIO55:1;// 23 Outpout Open-Drain control for this pinUint16 GPIO56:1;// 24 Outpout Open-Drain control for this pinUint16 GPIO57:1;// 25 Outpout Open-Drain control for this pinUint16 GPIO58:1;// 26 Outpout Open-Drain control for this pinUint16 GPIO59:1;// 27 Outpout Open-Drain control for this pinUint16 GPIO60:1;// 28 Outpout Open-Drain control for this pinUint16 GPIO61:1;// 29 Outpout Open-Drain control for this pinUint16 GPIO62:1;// 30 Outpout Open-Drain control for this pinUint16 GPIO63:1;// 31 Outpout Open-Drain control for this pin
};union GPBODR_REG {Uint32all;structGPBODR_BITSbit;
};struct GPBAMSEL_BITS {// bits descriptionUint16 rsvd1:1;// 0 ReservedUint16 rsvd2:1;// 1 ReservedUint16 rsvd3:1;// 2 ReservedUint16 rsvd4:1;// 3 ReservedUint16 rsvd5:1;// 4 ReservedUint16 rsvd6:1;// 5 ReservedUint16 rsvd7:1;// 6 ReservedUint16 rsvd8:1;// 7 ReservedUint16 rsvd9:1;// 8 ReservedUint16 rsvd10:1;// 9 ReservedUint16 GPIO42:1;// 10 Analog Mode select for this pinUint16 GPIO43:1;// 11 Analog Mode select for this pinUint16 rsvd11:1;// 12 ReservedUint16 rsvd12:1;// 13 ReservedUint16 rsvd13:1;// 14 ReservedUint16 rsvd14:1;// 15 ReservedUint16 rsvd15:1;// 16 ReservedUint16 rsvd16:1;// 17 ReservedUint16 rsvd17:1;// 18 ReservedUint16 rsvd18:1;// 19 ReservedUint16 rsvd19:1;// 20 ReservedUint16 rsvd20:1;// 21 ReservedUint16 rsvd21:1;// 22 ReservedUint16 rsvd22:1;// 23 ReservedUint16 rsvd23:1;// 24 ReservedUint16 rsvd24:1;// 25 ReservedUint16 rsvd25:1;// 26 ReservedUint16 rsvd26:1;// 27 ReservedUint16 rsvd27:1;// 28 ReservedUint16 rsvd28:1;// 29 ReservedUint16 rsvd29:1;// 30 ReservedUint16 rsvd30:1;// 31 Reserved
};union GPBAMSEL_REG {Uint32all;structGPBAMSEL_BITSbit;
};struct GPBGMUX1_BITS {// bits descriptionUint16 GPIO32:2;// 1:0 Defines pin-muxing selection for GPIO32Uint16 GPIO33:2;// 3:2 Defines pin-muxing selection for GPIO33Uint16 GPIO34:2;// 5:4 Defines pin-muxing selection for GPIO34Uint16 GPIO35:2;// 7:6 Defines pin-muxing selection for GPIO35Uint16 GPIO36:2;// 9:8 Defines pin-muxing selection for GPIO36Uint16 GPIO37:2;// 11:10 Defines pin-muxing selection for GPIO37Uint16 GPIO38:2;// 13:12 Defines pin-muxing selection for GPIO38Uint16 GPIO39:2;// 15:14 Defines pin-muxing selection for GPIO39Uint16 GPIO40:2;// 17:16 Defines pin-muxing selection for GPIO40Uint16 GPIO41:2;// 19:18 Defines pin-muxing selection for GPIO41Uint16 GPIO42:2;// 21:20 Defines pin-muxing selection for GPIO42Uint16 GPIO43:2;// 23:22 Defines pin-muxing selection for GPIO43Uint16 GPIO44:2;// 25:24 Defines pin-muxing selection for GPIO44Uint16 GPIO45:2;// 27:26 Defines pin-muxing selection for GPIO45Uint16 GPIO46:2;// 29:28 Defines pin-muxing selection for GPIO46Uint16 GPIO47:2;// 31:30 Defines pin-muxing selection for GPIO47
};union GPBGMUX1_REG {Uint32all;structGPBGMUX1_BITSbit;
};struct GPBGMUX2_BITS {// bits descriptionUint16 GPIO48:2;// 1:0 Defines pin-muxing selection for GPIO48Uint16 GPIO49:2;// 3:2 Defines pin-muxing selection for GPIO49Uint16 GPIO50:2;// 5:4 Defines pin-muxing selection for GPIO50Uint16 GPIO51:2;// 7:6 Defines pin-muxing selection for GPIO51Uint16 GPIO52:2;// 9:8 Defines pin-muxing selection for GPIO52Uint16 GPIO53:2;// 11:10 Defines pin-muxing selection for GPIO53Uint16 GPIO54:2;// 13:12 Defines pin-muxing selection for GPIO54Uint16 GPIO55:2;// 15:14 Defines pin-muxing selection for GPIO55Uint16 GPIO56:2;// 17:16 Defines pin-muxing selection for GPIO56Uint16 GPIO57:2;// 19:18 Defines pin-muxing selection for GPIO57Uint16 GPIO58:2;// 21:20 Defines pin-muxing selection for GPIO58Uint16 GPIO59:2;// 23:22 Defines pin-muxing selection for GPIO59Uint16 GPIO60:2;// 25:24 Defines pin-muxing selection for GPIO60Uint16 GPIO61:2;// 27:26 Defines pin-muxing selection for GPIO61Uint16 GPIO62:2;// 29:28 Defines pin-muxing selection for GPIO62Uint16 GPIO63:2;// 31:30 Defines pin-muxing selection for GPIO63
};union GPBGMUX2_REG {Uint32all;structGPBGMUX2_BITSbit;
};struct GPBCSEL1_BITS {// bits descriptionUint16 GPIO32:4;// 3:0 GPIO32 Master CPU SelectUint16 GPIO33:4;// 7:4 GPIO33 Master CPU SelectUint16 GPIO34:4;// 11:8 GPIO34 Master CPU SelectUint16 GPIO35:4;// 15:12 GPIO35 Master CPU SelectUint16 GPIO36:4;// 19:16 GPIO36 Master CPU SelectUint16 GPIO37:4;// 23:20 GPIO37 Master CPU SelectUint16 GPIO38:4;// 27:24 GPIO38 Master CPU SelectUint16 GPIO39:4;// 31:28 GPIO39 Master CPU Select
};union GPBCSEL1_REG {Uint32all;structGPBCSEL1_BITSbit;
};struct GPBCSEL2_BITS {// bits descriptionUint16 GPIO40:4;// 3:0 GPIO40 Master CPU SelectUint16 GPIO41:4;// 7:4 GPIO41 Master CPU SelectUint16 GPIO42:4;// 11:8 GPIO42 Master CPU SelectUint16 GPIO43:4;// 15:12 GPIO43 Master CPU SelectUint16 GPIO44:4;// 19:16 GPIO44 Master CPU SelectUint16 GPIO45:4;// 23:20 GPIO45 Master CPU SelectUint16 GPIO46:4;// 27:24 GPIO46 Master CPU SelectUint16 GPIO47:4;// 31:28 GPIO47 Master CPU Select
};union GPBCSEL2_REG {Uint32all;structGPBCSEL2_BITSbit;
};struct GPBCSEL3_BITS {// bits descriptionUint16 GPIO48:4;// 3:0 GPIO48 Master CPU SelectUint16 GPIO49:4;// 7:4 GPIO49 Master CPU SelectUint16 GPIO50:4;// 11:8 GPIO50 Master CPU SelectUint16 GPIO51:4;// 15:12 GPIO51 Master CPU SelectUint16 GPIO52:4;// 19:16 GPIO52 Master CPU SelectUint16 GPIO53:4;// 23:20 GPIO53 Master CPU SelectUint16 GPIO54:4;// 27:24 GPIO54 Master CPU SelectUint16 GPIO55:4;// 31:28 GPIO55 Master CPU Select
};union GPBCSEL3_REG {Uint32all;structGPBCSEL3_BITSbit;
};struct GPBCSEL4_BITS {// bits descriptionUint16 GPIO56:4;// 3:0 GPIO56 Master CPU SelectUint16 GPIO57:4;// 7:4 GPIO57 Master CPU SelectUint16 GPIO58:4;// 11:8 GPIO58 Master CPU SelectUint16 GPIO59:4;// 15:12 GPIO59 Master CPU SelectUint16 GPIO60:4;// 19:16 GPIO60 Master CPU SelectUint16 GPIO61:4;// 23:20 GPIO61 Master CPU SelectUint16 GPIO62:4;// 27:24 GPIO62 Master CPU SelectUint16 GPIO63:4;// 31:28 GPIO63 Master CPU Select
};union GPBCSEL4_REG {Uint32all;structGPBCSEL4_BITSbit;
};struct GPBLOCK_BITS {// bits descriptionUint16 GPIO32:1;// 0 Configuration Lock bit for this pinUint16 GPIO33:1;// 1 Configuration Lock bit for this pinUint16 GPIO34:1;// 2 Configuration Lock bit for this pinUint16 GPIO35:1;// 3 Configuration Lock bit for this pinUint16 GPIO36:1;// 4 Configuration Lock bit for this pinUint16 GPIO37:1;// 5 Configuration Lock bit for this pinUint16 GPIO38:1;// 6 Configuration Lock bit for this pinUint16 GPIO39:1;// 7 Configuration Lock bit for this pinUint16 GPIO40:1;// 8 Configuration Lock bit for this pinUint16 GPIO41:1;// 9 Configuration Lock bit for this pinUint16 GPIO42:1;// 10 Configuration Lock bit for this pinUint16 GPIO43:1;// 11 Configuration Lock bit for this pinUint16 GPIO44:1;// 12 Configuration Lock bit for this pinUint16 GPIO45:1;// 13 Configuration Lock bit for this pinUint16 GPIO46:1;// 14 Configuration Lock bit for this pinUint16 GPIO47:1;// 15 Configuration Lock bit for this pinUint16 GPIO48:1;// 16 Configuration Lock bit for this pinUint16 GPIO49:1;// 17 Configuration Lock bit for this pinUint16 GPIO50:1;// 18 Configuration Lock bit for this pinUint16 GPIO51:1;// 19 Configuration Lock bit for this pinUint16 GPIO52:1;// 20 Configuration Lock bit for this pinUint16 GPIO53:1;// 21 Configuration Lock bit for this pinUint16 GPIO54:1;// 22 Configuration Lock bit for this pinUint16 GPIO55:1;// 23 Configuration Lock bit for this pinUint16 GPIO56:1;// 24 Configuration Lock bit for this pinUint16 GPIO57:1;// 25 Configuration Lock bit for this pinUint16 GPIO58:1;// 26 Configuration Lock bit for this pinUint16 GPIO59:1;// 27 Configuration Lock bit for this pinUint16 GPIO60:1;// 28 Configuration Lock bit for this pinUint16 GPIO61:1;// 29 Configuration Lock bit for this pinUint16 GPIO62:1;// 30 Configuration Lock bit for this pinUint16 GPIO63:1;// 31 Configuration Lock bit for this pin
};union GPBLOCK_REG {Uint32all;structGPBLOCK_BITSbit;
};struct GPBCR_BITS {// bits descriptionUint16 GPIO32:1;// 0 Configuration lock commit bit for this pinUint16 GPIO33:1;// 1 Configuration lock commit bit for this pinUint16 GPIO34:1;// 2 Configuration lock commit bit for this pinUint16 GPIO35:1;// 3 Configuration lock commit bit for this pinUint16 GPIO36:1;// 4 Configuration lock commit bit for this pinUint16 GPIO37:1;// 5 Configuration lock commit bit for this pinUint16 GPIO38:1;// 6 Configuration lock commit bit for this pinUint16 GPIO39:1;// 7 Configuration lock commit bit for this pinUint16 GPIO40:1;// 8 Configuration lock commit bit for this pinUint16 GPIO41:1;// 9 Configuration lock commit bit for this pinUint16 GPIO42:1;// 10 Configuration lock commit bit for this pinUint16 GPIO43:1;// 11 Configuration lock commit bit for this pinUint16 GPIO44:1;// 12 Configuration lock commit bit for this pinUint16 GPIO45:1;// 13 Configuration lock commit bit for this pinUint16 GPIO46:1;// 14 Configuration lock commit bit for this pinUint16 GPIO47:1;// 15 Configuration lock commit bit for this pinUint16 GPIO48:1;// 16 Configuration lock commit bit for this pinUint16 GPIO49:1;// 17 Configuration lock commit bit for this pinUint16 GPIO50:1;// 18 Configuration lock commit bit for this pinUint16 GPIO51:1;// 19 Configuration lock commit bit for this pinUint16 GPIO52:1;// 20 Configuration lock commit bit for this pinUint16 GPIO53:1;// 21 Configuration lock commit bit for this pinUint16 GPIO54:1;// 22 Configuration lock commit bit for this pinUint16 GPIO55:1;// 23 Configuration lock commit bit for this pinUint16 GPIO56:1;// 24 Configuration lock commit bit for this pinUint16 GPIO57:1;// 25 Configuration lock commit bit for this pinUint16 GPIO58:1;// 26 Configuration lock commit bit for this pinUint16 GPIO59:1;// 27 Configuration lock commit bit for this pinUint16 GPIO60:1;// 28 Configuration lock commit bit for this pinUint16 GPIO61:1;// 29 Configuration lock commit bit for this pinUint16 GPIO62:1;// 30 Configuration lock commit bit for this pinUint16 GPIO63:1;// 31 Configuration lock commit bit for this pin
};union GPBCR_REG {Uint32all;structGPBCR_BITSbit;
};struct GPCCTRL_BITS {// bits descriptionUint16 QUALPRD0:8;// 7:0 Qualification sampling period for GPIO64 to GPIO71Uint16 QUALPRD1:8;// 15:8 Qualification sampling period for GPIO72 to GPIO79Uint16 QUALPRD2:8;// 23:16 Qualification sampling period for GPIO80 to GPIO87Uint16 QUALPRD3:8;// 31:24 Qualification sampling period for GPIO88 to GPIO95
};union GPCCTRL_REG {Uint32all;structGPCCTRL_BITSbit;
};struct GPCQSEL1_BITS {// bits descriptionUint16 GPIO64:2;// 1:0 Select input qualification type for GPIO64Uint16 GPIO65:2;// 3:2 Select input qualification type for GPIO65Uint16 GPIO66:2;// 5:4 Select input qualification type for GPIO66Uint16 GPIO67:2;// 7:6 Select input qualification type for GPIO67Uint16 GPIO68:2;// 9:8 Select input qualification type for GPIO68Uint16 GPIO69:2;// 11:10 Select input qualification type for GPIO69Uint16 GPIO70:2;// 13:12 Select input qualification type for GPIO70Uint16 GPIO71:2;// 15:14 Select input qualification type for GPIO71Uint16 GPIO72:2;// 17:16 Select input qualification type for GPIO72Uint16 GPIO73:2;// 19:18 Select input qualification type for GPIO73Uint16 GPIO74:2;// 21:20 Select input qualification type for GPIO74Uint16 GPIO75:2;// 23:22 Select input qualification type for GPIO75Uint16 GPIO76:2;// 25:24 Select input qualification type for GPIO76Uint16 GPIO77:2;// 27:26 Select input qualification type for GPIO77Uint16 GPIO78:2;// 29:28 Select input qualification type for GPIO78Uint16 GPIO79:2;// 31:30 Select input qualification type for GPIO79
};union GPCQSEL1_REG {Uint32all;structGPCQSEL1_BITSbit;
};struct GPCQSEL2_BITS {// bits descriptionUint16 GPIO80:2;// 1:0 Select input qualification type for GPIO80Uint16 GPIO81:2;// 3:2 Select input qualification type for GPIO81Uint16 GPIO82:2;// 5:4 Select input qualification type for GPIO82Uint16 GPIO83:2;// 7:6 Select input qualification type for GPIO83Uint16 GPIO84:2;// 9:8 Select input qualification type for GPIO84Uint16 GPIO85:2;// 11:10 Select input qualification type for GPIO85Uint16 GPIO86:2;// 13:12 Select input qualification type for GPIO86Uint16 GPIO87:2;// 15:14 Select input qualification type for GPIO87Uint16 GPIO88:2;// 17:16 Select input qualification type for GPIO88Uint16 GPIO89:2;// 19:18 Select input qualification type for GPIO89Uint16 GPIO90:2;// 21:20 Select input qualification type for GPIO90Uint16 GPIO91:2;// 23:22 Select input qualification type for GPIO91Uint16 GPIO92:2;// 25:24 Select input qualification type for GPIO92Uint16 GPIO93:2;// 27:26 Select input qualification type for GPIO93Uint16 GPIO94:2;// 29:28 Select input qualification type for GPIO94Uint16 GPIO95:2;// 31:30 Select input qualification type for GPIO95
};union GPCQSEL2_REG {Uint32all;structGPCQSEL2_BITSbit;
};struct GPCMUX1_BITS {// bits descriptionUint16 GPIO64:2;// 1:0 Defines pin-muxing selection for GPIO64Uint16 GPIO65:2;// 3:2 Defines pin-muxing selection for GPIO65Uint16 GPIO66:2;// 5:4 Defines pin-muxing selection for GPIO66Uint16 GPIO67:2;// 7:6 Defines pin-muxing selection for GPIO67Uint16 GPIO68:2;// 9:8 Defines pin-muxing selection for GPIO68Uint16 GPIO69:2;// 11:10 Defines pin-muxing selection for GPIO69Uint16 GPIO70:2;// 13:12 Defines pin-muxing selection for GPIO70Uint16 GPIO71:2;// 15:14 Defines pin-muxing selection for GPIO71Uint16 GPIO72:2;// 17:16 Defines pin-muxing selection for GPIO72Uint16 GPIO73:2;// 19:18 Defines pin-muxing selection for GPIO73Uint16 GPIO74:2;// 21:20 Defines pin-muxing selection for GPIO74Uint16 GPIO75:2;// 23:22 Defines pin-muxing selection for GPIO75Uint16 GPIO76:2;// 25:24 Defines pin-muxing selection for GPIO76Uint16 GPIO77:2;// 27:26 Defines pin-muxing selection for GPIO77Uint16 GPIO78:2;// 29:28 Defines pin-muxing selection for GPIO78Uint16 GPIO79:2;// 31:30 Defines pin-muxing selection for GPIO79
};union GPCMUX1_REG {Uint32all;structGPCMUX1_BITSbit;
};struct GPCMUX2_BITS {// bits descriptionUint16 GPIO80:2;// 1:0 Defines pin-muxing selection for GPIO80Uint16 GPIO81:2;// 3:2 Defines pin-muxing selection for GPIO81Uint16 GPIO82:2;// 5:4 Defines pin-muxing selection for GPIO82Uint16 GPIO83:2;// 7:6 Defines pin-muxing selection for GPIO83Uint16 GPIO84:2;// 9:8 Defines pin-muxing selection for GPIO84Uint16 GPIO85:2;// 11:10 Defines pin-muxing selection for GPIO85Uint16 GPIO86:2;// 13:12 Defines pin-muxing selection for GPIO86Uint16 GPIO87:2;// 15:14 Defines pin-muxing selection for GPIO87Uint16 GPIO88:2;// 17:16 Defines pin-muxing selection for GPIO88Uint16 GPIO89:2;// 19:18 Defines pin-muxing selection for GPIO89Uint16 GPIO90:2;// 21:20 Defines pin-muxing selection for GPIO90Uint16 GPIO91:2;// 23:22 Defines pin-muxing selection for GPIO91Uint16 GPIO92:2;// 25:24 Defines pin-muxing selection for GPIO92Uint16 GPIO93:2;// 27:26 Defines pin-muxing selection for GPIO93Uint16 GPIO94:2;// 29:28 Defines pin-muxing selection for GPIO94Uint16 GPIO95:2;// 31:30 Defines pin-muxing selection for GPIO95
};union GPCMUX2_REG {Uint32all;structGPCMUX2_BITSbit;
};struct GPCDIR_BITS {// bits descriptionUint16 GPIO64:1;// 0 Defines direction for this pin in GPIO modeUint16 GPIO65:1;// 1 Defines direction for this pin in GPIO modeUint16 GPIO66:1;// 2 Defines direction for this pin in GPIO modeUint16 GPIO67:1;// 3 Defines direction for this pin in GPIO modeUint16 GPIO68:1;// 4 Defines direction for this pin in GPIO modeUint16 GPIO69:1;// 5 Defines direction for this pin in GPIO modeUint16 GPIO70:1;// 6 Defines direction for this pin in GPIO modeUint16 GPIO71:1;// 7 Defines direction for this pin in GPIO modeUint16 GPIO72:1;// 8 Defines direction for this pin in GPIO modeUint16 GPIO73:1;// 9 Defines direction for this pin in GPIO modeUint16 GPIO74:1;// 10 Defines direction for this pin in GPIO modeUint16 GPIO75:1;// 11 Defines direction for this pin in GPIO modeUint16 GPIO76:1;// 12 Defines direction for this pin in GPIO modeUint16 GPIO77:1;// 13 Defines direction for this pin in GPIO modeUint16 GPIO78:1;// 14 Defines direction for this pin in GPIO modeUint16 GPIO79:1;// 15 Defines direction for this pin in GPIO modeUint16 GPIO80:1;// 16 Defines direction for this pin in GPIO modeUint16 GPIO81:1;// 17 Defines direction for this pin in GPIO modeUint16 GPIO82:1;// 18 Defines direction for this pin in GPIO modeUint16 GPIO83:1;// 19 Defines direction for this pin in GPIO modeUint16 GPIO84:1;// 20 Defines direction for this pin in GPIO modeUint16 GPIO85:1;// 21 Defines direction for this pin in GPIO modeUint16 GPIO86:1;// 22 Defines direction for this pin in GPIO modeUint16 GPIO87:1;// 23 Defines direction for this pin in GPIO modeUint16 GPIO88:1;// 24 Defines direction for this pin in GPIO modeUint16 GPIO89:1;// 25 Defines direction for this pin in GPIO modeUint16 GPIO90:1;// 26 Defines direction for this pin in GPIO modeUint16 GPIO91:1;// 27 Defines direction for this pin in GPIO modeUint16 GPIO92:1;// 28 Defines direction for this pin in GPIO modeUint16 GPIO93:1;// 29 Defines direction for this pin in GPIO modeUint16 GPIO94:1;// 30 Defines direction for this pin in GPIO modeUint16 GPIO95:1;// 31 Defines direction for this pin in GPIO mode
};union GPCDIR_REG {Uint32all;structGPCDIR_BITSbit;
};struct GPCPUD_BITS {// bits descriptionUint16 GPIO64:1;// 0 Pull-Up Disable control for this pinUint16 GPIO65:1;// 1 Pull-Up Disable control for this pinUint16 GPIO66:1;// 2 Pull-Up Disable control for this pinUint16 GPIO67:1;// 3 Pull-Up Disable control for this pinUint16 GPIO68:1;// 4 Pull-Up Disable control for this pinUint16 GPIO69:1;// 5 Pull-Up Disable control for this pinUint16 GPIO70:1;// 6 Pull-Up Disable control for this pinUint16 GPIO71:1;// 7 Pull-Up Disable control for this pinUint16 GPIO72:1;// 8 Pull-Up Disable control for this pinUint16 GPIO73:1;// 9 Pull-Up Disable control for this pinUint16 GPIO74:1;// 10 Pull-Up Disable control for this pinUint16 GPIO75:1;// 11 Pull-Up Disable control for this pinUint16 GPIO76:1;// 12 Pull-Up Disable control for this pinUint16 GPIO77:1;// 13 Pull-Up Disable control for this pinUint16 GPIO78:1;// 14 Pull-Up Disable control for this pinUint16 GPIO79:1;// 15 Pull-Up Disable control for this pinUint16 GPIO80:1;// 16 Pull-Up Disable control for this pinUint16 GPIO81:1;// 17 Pull-Up Disable control for this pinUint16 GPIO82:1;// 18 Pull-Up Disable control for this pinUint16 GPIO83:1;// 19 Pull-Up Disable control for this pinUint16 GPIO84:1;// 20 Pull-Up Disable control for this pinUint16 GPIO85:1;// 21 Pull-Up Disable control for this pinUint16 GPIO86:1;// 22 Pull-Up Disable control for this pinUint16 GPIO87:1;// 23 Pull-Up Disable control for this pinUint16 GPIO88:1;// 24 Pull-Up Disable control for this pinUint16 GPIO89:1;// 25 Pull-Up Disable control for this pinUint16 GPIO90:1;// 26 Pull-Up Disable control for this pinUint16 GPIO91:1;// 27 Pull-Up Disable control for this pinUint16 GPIO92:1;// 28 Pull-Up Disable control for this pinUint16 GPIO93:1;// 29 Pull-Up Disable control for this pinUint16 GPIO94:1;// 30 Pull-Up Disable control for this pinUint16 GPIO95:1;// 31 Pull-Up Disable control for this pin
};union GPCPUD_REG {Uint32all;structGPCPUD_BITSbit;
};struct GPCINV_BITS {// bits descriptionUint16 GPIO64:1;// 0 Input inversion control for this pinUint16 GPIO65:1;// 1 Input inversion control for this pinUint16 GPIO66:1;// 2 Input inversion control for this pinUint16 GPIO67:1;// 3 Input inversion control for this pinUint16 GPIO68:1;// 4 Input inversion control for this pinUint16 GPIO69:1;// 5 Input inversion control for this pinUint16 GPIO70:1;// 6 Input inversion control for this pinUint16 GPIO71:1;// 7 Input inversion control for this pinUint16 GPIO72:1;// 8 Input inversion control for this pinUint16 GPIO73:1;// 9 Input inversion control for this pinUint16 GPIO74:1;// 10 Input inversion control for this pinUint16 GPIO75:1;// 11 Input inversion control for this pinUint16 GPIO76:1;// 12 Input inversion control for this pinUint16 GPIO77:1;// 13 Input inversion control for this pinUint16 GPIO78:1;// 14 Input inversion control for this pinUint16 GPIO79:1;// 15 Input inversion control for this pinUint16 GPIO80:1;// 16 Input inversion control for this pinUint16 GPIO81:1;// 17 Input inversion control for this pinUint16 GPIO82:1;// 18 Input inversion control for this pinUint16 GPIO83:1;// 19 Input inversion control for this pinUint16 GPIO84:1;// 20 Input inversion control for this pinUint16 GPIO85:1;// 21 Input inversion control for this pinUint16 GPIO86:1;// 22 Input inversion control for this pinUint16 GPIO87:1;// 23 Input inversion control for this pinUint16 GPIO88:1;// 24 Input inversion control for this pinUint16 GPIO89:1;// 25 Input inversion control for this pinUint16 GPIO90:1;// 26 Input inversion control for this pinUint16 GPIO91:1;// 27 Input inversion control for this pinUint16 GPIO92:1;// 28 Input inversion control for this pinUint16 GPIO93:1;// 29 Input inversion control for this pinUint16 GPIO94:1;// 30 Input inversion control for this pinUint16 GPIO95:1;// 31 Input inversion control for this pin
};union GPCINV_REG {Uint32all;structGPCINV_BITSbit;
};struct GPCODR_BITS {// bits descriptionUint16 GPIO64:1;// 0 Outpout Open-Drain control for this pinUint16 GPIO65:1;// 1 Outpout Open-Drain control for this pinUint16 GPIO66:1;// 2 Outpout Open-Drain control for this pinUint16 GPIO67:1;// 3 Outpout Open-Drain control for this pinUint16 GPIO68:1;// 4 Outpout Open-Drain control for this pinUint16 GPIO69:1;// 5 Outpout Open-Drain control for this pinUint16 GPIO70:1;// 6 Outpout Open-Drain control for this pinUint16 GPIO71:1;// 7 Outpout Open-Drain control for this pinUint16 GPIO72:1;// 8 Outpout Open-Drain control for this pinUint16 GPIO73:1;// 9 Outpout Open-Drain control for this pinUint16 GPIO74:1;// 10 Outpout Open-Drain control for this pinUint16 GPIO75:1;// 11 Outpout Open-Drain control for this pinUint16 GPIO76:1;// 12 Outpout Open-Drain control for this pinUint16 GPIO77:1;// 13 Outpout Open-Drain control for this pinUint16 GPIO78:1;// 14 Outpout Open-Drain control for this pinUint16 GPIO79:1;// 15 Outpout Open-Drain control for this pinUint16 GPIO80:1;// 16 Outpout Open-Drain control for this pinUint16 GPIO81:1;// 17 Outpout Open-Drain control for this pinUint16 GPIO82:1;// 18 Outpout Open-Drain control for this pinUint16 GPIO83:1;// 19 Outpout Open-Drain control for this pinUint16 GPIO84:1;// 20 Outpout Open-Drain control for this pinUint16 GPIO85:1;// 21 Outpout Open-Drain control for this pinUint16 GPIO86:1;// 22 Outpout Open-Drain control for this pinUint16 GPIO87:1;// 23 Outpout Open-Drain control for this pinUint16 GPIO88:1;// 24 Outpout Open-Drain control for this pinUint16 GPIO89:1;// 25 Outpout Open-Drain control for this pinUint16 GPIO90:1;// 26 Outpout Open-Drain control for this pinUint16 GPIO91:1;// 27 Outpout Open-Drain control for this pinUint16 GPIO92:1;// 28 Outpout Open-Drain control for this pinUint16 GPIO93:1;// 29 Outpout Open-Drain control for this pinUint16 GPIO94:1;// 30 Outpout Open-Drain control for this pinUint16 GPIO95:1;// 31 Outpout Open-Drain control for this pin
};union GPCODR_REG {Uint32all;structGPCODR_BITSbit;
};struct GPCGMUX1_BITS {// bits descriptionUint16 GPIO64:2;// 1:0 Defines pin-muxing selection for GPIO64Uint16 GPIO65:2;// 3:2 Defines pin-muxing selection for GPIO65Uint16 GPIO66:2;// 5:4 Defines pin-muxing selection for GPIO66Uint16 GPIO67:2;// 7:6 Defines pin-muxing selection for GPIO67Uint16 GPIO68:2;// 9:8 Defines pin-muxing selection for GPIO68Uint16 GPIO69:2;// 11:10 Defines pin-muxing selection for GPIO69Uint16 GPIO70:2;// 13:12 Defines pin-muxing selection for GPIO70Uint16 GPIO71:2;// 15:14 Defines pin-muxing selection for GPIO71Uint16 GPIO72:2;// 17:16 Defines pin-muxing selection for GPIO72Uint16 GPIO73:2;// 19:18 Defines pin-muxing selection for GPIO73Uint16 GPIO74:2;// 21:20 Defines pin-muxing selection for GPIO74Uint16 GPIO75:2;// 23:22 Defines pin-muxing selection for GPIO75Uint16 GPIO76:2;// 25:24 Defines pin-muxing selection for GPIO76Uint16 GPIO77:2;// 27:26 Defines pin-muxing selection for GPIO77Uint16 GPIO78:2;// 29:28 Defines pin-muxing selection for GPIO78Uint16 GPIO79:2;// 31:30 Defines pin-muxing selection for GPIO79
};union GPCGMUX1_REG {Uint32all;structGPCGMUX1_BITSbit;
};struct GPCGMUX2_BITS {// bits descriptionUint16 GPIO80:2;// 1:0 Defines pin-muxing selection for GPIO80Uint16 GPIO81:2;// 3:2 Defines pin-muxing selection for GPIO81Uint16 GPIO82:2;// 5:4 Defines pin-muxing selection for GPIO82Uint16 GPIO83:2;// 7:6 Defines pin-muxing selection for GPIO83Uint16 GPIO84:2;// 9:8 Defines pin-muxing selection for GPIO84Uint16 GPIO85:2;// 11:10 Defines pin-muxing selection for GPIO85Uint16 GPIO86:2;// 13:12 Defines pin-muxing selection for GPIO86Uint16 GPIO87:2;// 15:14 Defines pin-muxing selection for GPIO87Uint16 GPIO88:2;// 17:16 Defines pin-muxing selection for GPIO88Uint16 GPIO89:2;// 19:18 Defines pin-muxing selection for GPIO89Uint16 GPIO90:2;// 21:20 Defines pin-muxing selection for GPIO90Uint16 GPIO91:2;// 23:22 Defines pin-muxing selection for GPIO91Uint16 GPIO92:2;// 25:24 Defines pin-muxing selection for GPIO92Uint16 GPIO93:2;// 27:26 Defines pin-muxing selection for GPIO93Uint16 GPIO94:2;// 29:28 Defines pin-muxing selection for GPIO94Uint16 GPIO95:2;// 31:30 Defines pin-muxing selection for GPIO95
};union GPCGMUX2_REG {Uint32all;structGPCGMUX2_BITSbit;
};struct GPCCSEL1_BITS {// bits descriptionUint16 GPIO64:4;// 3:0 GPIO64 Master CPU SelectUint16 GPIO65:4;// 7:4 GPIO65 Master CPU SelectUint16 GPIO66:4;// 11:8 GPIO66 Master CPU SelectUint16 GPIO67:4;// 15:12 GPIO67 Master CPU SelectUint16 GPIO68:4;// 19:16 GPIO68 Master CPU SelectUint16 GPIO69:4;// 23:20 GPIO69 Master CPU SelectUint16 GPIO70:4;// 27:24 GPIO70 Master CPU SelectUint16 GPIO71:4;// 31:28 GPIO71 Master CPU Select
};union GPCCSEL1_REG {Uint32all;structGPCCSEL1_BITSbit;
};struct GPCCSEL2_BITS {// bits descriptionUint16 GPIO72:4;// 3:0 GPIO72 Master CPU SelectUint16 GPIO73:4;// 7:4 GPIO73 Master CPU SelectUint16 GPIO74:4;// 11:8 GPIO74 Master CPU SelectUint16 GPIO75:4;// 15:12 GPIO75 Master CPU SelectUint16 GPIO76:4;// 19:16 GPIO76 Master CPU SelectUint16 GPIO77:4;// 23:20 GPIO77 Master CPU SelectUint16 GPIO78:4;// 27:24 GPIO78 Master CPU SelectUint16 GPIO79:4;// 31:28 GPIO79 Master CPU Select
};union GPCCSEL2_REG {Uint32all;structGPCCSEL2_BITSbit;
};struct GPCCSEL3_BITS {// bits descriptionUint16 GPIO80:4;// 3:0 GPIO80 Master CPU SelectUint16 GPIO81:4;// 7:4 GPIO81 Master CPU SelectUint16 GPIO82:4;// 11:8 GPIO82 Master CPU SelectUint16 GPIO83:4;// 15:12 GPIO83 Master CPU SelectUint16 GPIO84:4;// 19:16 GPIO84 Master CPU SelectUint16 GPIO85:4;// 23:20 GPIO85 Master CPU SelectUint16 GPIO86:4;// 27:24 GPIO86 Master CPU SelectUint16 GPIO87:4;// 31:28 GPIO87 Master CPU Select
};union GPCCSEL3_REG {Uint32all;structGPCCSEL3_BITSbit;
};struct GPCCSEL4_BITS {// bits descriptionUint16 GPIO88:4;// 3:0 GPIO88 Master CPU SelectUint16 GPIO89:4;// 7:4 GPIO89 Master CPU SelectUint16 GPIO90:4;// 11:8 GPIO90 Master CPU SelectUint16 GPIO91:4;// 15:12 GPIO91 Master CPU SelectUint16 GPIO92:4;// 19:16 GPIO92 Master CPU SelectUint16 GPIO93:4;// 23:20 GPIO93 Master CPU SelectUint16 GPIO94:4;// 27:24 GPIO94 Master CPU SelectUint16 GPIO95:4;// 31:28 GPIO95 Master CPU Select
};union GPCCSEL4_REG {Uint32all;structGPCCSEL4_BITSbit;
};struct GPCLOCK_BITS {// bits descriptionUint16 GPIO64:1;// 0 Configuration Lock bit for this pinUint16 GPIO65:1;// 1 Configuration Lock bit for this pinUint16 GPIO66:1;// 2 Configuration Lock bit for this pinUint16 GPIO67:1;// 3 Configuration Lock bit for this pinUint16 GPIO68:1;// 4 Configuration Lock bit for this pinUint16 GPIO69:1;// 5 Configuration Lock bit for this pinUint16 GPIO70:1;// 6 Configuration Lock bit for this pinUint16 GPIO71:1;// 7 Configuration Lock bit for this pinUint16 GPIO72:1;// 8 Configuration Lock bit for this pinUint16 GPIO73:1;// 9 Configuration Lock bit for this pinUint16 GPIO74:1;// 10 Configuration Lock bit for this pinUint16 GPIO75:1;// 11 Configuration Lock bit for this pinUint16 GPIO76:1;// 12 Configuration Lock bit for this pinUint16 GPIO77:1;// 13 Configuration Lock bit for this pinUint16 GPIO78:1;// 14 Configuration Lock bit for this pinUint16 GPIO79:1;// 15 Configuration Lock bit for this pinUint16 GPIO80:1;// 16 Configuration Lock bit for this pinUint16 GPIO81:1;// 17 Configuration Lock bit for this pinUint16 GPIO82:1;// 18 Configuration Lock bit for this pinUint16 GPIO83:1;// 19 Configuration Lock bit for this pinUint16 GPIO84:1;// 20 Configuration Lock bit for this pinUint16 GPIO85:1;// 21 Configuration Lock bit for this pinUint16 GPIO86:1;// 22 Configuration Lock bit for this pinUint16 GPIO87:1;// 23 Configuration Lock bit for this pinUint16 GPIO88:1;// 24 Configuration Lock bit for this pinUint16 GPIO89:1;// 25 Configuration Lock bit for this pinUint16 GPIO90:1;// 26 Configuration Lock bit for this pinUint16 GPIO91:1;// 27 Configuration Lock bit for this pinUint16 GPIO92:1;// 28 Configuration Lock bit for this pinUint16 GPIO93:1;// 29 Configuration Lock bit for this pinUint16 GPIO94:1;// 30 Configuration Lock bit for this pinUint16 GPIO95:1;// 31 Configuration Lock bit for this pin
};union GPCLOCK_REG {Uint32all;structGPCLOCK_BITSbit;
};struct GPCCR_BITS {// bits descriptionUint16 GPIO64:1;// 0 Configuration lock commit bit for this pinUint16 GPIO65:1;// 1 Configuration lock commit bit for this pinUint16 GPIO66:1;// 2 Configuration lock commit bit for this pinUint16 GPIO67:1;// 3 Configuration lock commit bit for this pinUint16 GPIO68:1;// 4 Configuration lock commit bit for this pinUint16 GPIO69:1;// 5 Configuration lock commit bit for this pinUint16 GPIO70:1;// 6 Configuration lock commit bit for this pinUint16 GPIO71:1;// 7 Configuration lock commit bit for this pinUint16 GPIO72:1;// 8 Configuration lock commit bit for this pinUint16 GPIO73:1;// 9 Configuration lock commit bit for this pinUint16 GPIO74:1;// 10 Configuration lock commit bit for this pinUint16 GPIO75:1;// 11 Configuration lock commit bit for this pinUint16 GPIO76:1;// 12 Configuration lock commit bit for this pinUint16 GPIO77:1;// 13 Configuration lock commit bit for this pinUint16 GPIO78:1;// 14 Configuration lock commit bit for this pinUint16 GPIO79:1;// 15 Configuration lock commit bit for this pinUint16 GPIO80:1;// 16 Configuration lock commit bit for this pinUint16 GPIO81:1;// 17 Configuration lock commit bit for this pinUint16 GPIO82:1;// 18 Configuration lock commit bit for this pinUint16 GPIO83:1;// 19 Configuration lock commit bit for this pinUint16 GPIO84:1;// 20 Configuration lock commit bit for this pinUint16 GPIO85:1;// 21 Configuration lock commit bit for this pinUint16 GPIO86:1;// 22 Configuration lock commit bit for this pinUint16 GPIO87:1;// 23 Configuration lock commit bit for this pinUint16 GPIO88:1;// 24 Configuration lock commit bit for this pinUint16 GPIO89:1;// 25 Configuration lock commit bit for this pinUint16 GPIO90:1;// 26 Configuration lock commit bit for this pinUint16 GPIO91:1;// 27 Configuration lock commit bit for this pinUint16 GPIO92:1;// 28 Configuration lock commit bit for this pinUint16 GPIO93:1;// 29 Configuration lock commit bit for this pinUint16 GPIO94:1;// 30 Configuration lock commit bit for this pinUint16 GPIO95:1;// 31 Configuration lock commit bit for this pin
};union GPCCR_REG {Uint32all;structGPCCR_BITSbit;
};struct GPDCTRL_BITS {// bits descriptionUint16 QUALPRD0:8;// 7:0 Qualification sampling period for GPIO96 to GPIO103Uint16 QUALPRD1:8;// 15:8 Qualification sampling period for GPIO104 to GPIO111Uint16 QUALPRD2:8;// 23:16 Qualification sampling period for GPIO112 to GPIO119Uint16 QUALPRD3:8;// 31:24 Qualification sampling period for GPIO120 to GPIO127
};union GPDCTRL_REG {Uint32all;structGPDCTRL_BITSbit;
};struct GPDQSEL1_BITS {// bits descriptionUint16 GPIO96:2;// 1:0 Select input qualification type for GPIO96Uint16 GPIO97:2;// 3:2 Select input qualification type for GPIO97Uint16 GPIO98:2;// 5:4 Select input qualification type for GPIO98Uint16 GPIO99:2;// 7:6 Select input qualification type for GPIO99Uint16 GPIO100:2;// 9:8 Select input qualification type for GPIO100Uint16 GPIO101:2;// 11:10 Select input qualification type for GPIO101Uint16 GPIO102:2;// 13:12 Select input qualification type for GPIO102Uint16 GPIO103:2;// 15:14 Select input qualification type for GPIO103Uint16 GPIO104:2;// 17:16 Select input qualification type for GPIO104Uint16 GPIO105:2;// 19:18 Select input qualification type for GPIO105Uint16 GPIO106:2;// 21:20 Select input qualification type for GPIO106Uint16 GPIO107:2;// 23:22 Select input qualification type for GPIO107Uint16 GPIO108:2;// 25:24 Select input qualification type for GPIO108Uint16 GPIO109:2;// 27:26 Select input qualification type for GPIO109Uint16 GPIO110:2;// 29:28 Select input qualification type for GPIO110Uint16 GPIO111:2;// 31:30 Select input qualification type for GPIO111
};union GPDQSEL1_REG {Uint32all;structGPDQSEL1_BITSbit;
};struct GPDQSEL2_BITS {// bits descriptionUint16 GPIO112:2;// 1:0 Select input qualification type for GPIO112Uint16 GPIO113:2;// 3:2 Select input qualification type for GPIO113Uint16 GPIO114:2;// 5:4 Select input qualification type for GPIO114Uint16 GPIO115:2;// 7:6 Select input qualification type for GPIO115Uint16 GPIO116:2;// 9:8 Select input qualification type for GPIO116Uint16 GPIO117:2;// 11:10 Select input qualification type for GPIO117Uint16 GPIO118:2;// 13:12 Select input qualification type for GPIO118Uint16 GPIO119:2;// 15:14 Select input qualification type for GPIO119Uint16 GPIO120:2;// 17:16 Select input qualification type for GPIO120Uint16 GPIO121:2;// 19:18 Select input qualification type for GPIO121Uint16 GPIO122:2;// 21:20 Select input qualification type for GPIO122Uint16 GPIO123:2;// 23:22 Select input qualification type for GPIO123Uint16 GPIO124:2;// 25:24 Select input qualification type for GPIO124Uint16 GPIO125:2;// 27:26 Select input qualification type for GPIO125Uint16 GPIO126:2;// 29:28 Select input qualification type for GPIO126Uint16 GPIO127:2;// 31:30 Select input qualification type for GPIO127
};union GPDQSEL2_REG {Uint32all;structGPDQSEL2_BITSbit;
};struct GPDMUX1_BITS {// bits descriptionUint16 GPIO96:2;// 1:0 Defines pin-muxing selection for GPIO96Uint16 GPIO97:2;// 3:2 Defines pin-muxing selection for GPIO97Uint16 GPIO98:2;// 5:4 Defines pin-muxing selection for GPIO98Uint16 GPIO99:2;// 7:6 Defines pin-muxing selection for GPIO99Uint16 GPIO100:2;// 9:8 Defines pin-muxing selection for GPIO100Uint16 GPIO101:2;// 11:10 Defines pin-muxing selection for GPIO101Uint16 GPIO102:2;// 13:12 Defines pin-muxing selection for GPIO102Uint16 GPIO103:2;// 15:14 Defines pin-muxing selection for GPIO103Uint16 GPIO104:2;// 17:16 Defines pin-muxing selection for GPIO104Uint16 GPIO105:2;// 19:18 Defines pin-muxing selection for GPIO105Uint16 GPIO106:2;// 21:20 Defines pin-muxing selection for GPIO106Uint16 GPIO107:2;// 23:22 Defines pin-muxing selection for GPIO107Uint16 GPIO108:2;// 25:24 Defines pin-muxing selection for GPIO108Uint16 GPIO109:2;// 27:26 Defines pin-muxing selection for GPIO109Uint16 GPIO110:2;// 29:28 Defines pin-muxing selection for GPIO110Uint16 GPIO111:2;// 31:30 Defines pin-muxing selection for GPIO111
};union GPDMUX1_REG {Uint32all;structGPDMUX1_BITSbit;
};struct GPDMUX2_BITS {// bits descriptionUint16 GPIO112:2;// 1:0 Defines pin-muxing selection for GPIO112Uint16 GPIO113:2;// 3:2 Defines pin-muxing selection for GPIO113Uint16 GPIO114:2;// 5:4 Defines pin-muxing selection for GPIO114Uint16 GPIO115:2;// 7:6 Defines pin-muxing selection for GPIO115Uint16 GPIO116:2;// 9:8 Defines pin-muxing selection for GPIO116Uint16 GPIO117:2;// 11:10 Defines pin-muxing selection for GPIO117Uint16 GPIO118:2;// 13:12 Defines pin-muxing selection for GPIO118Uint16 GPIO119:2;// 15:14 Defines pin-muxing selection for GPIO119Uint16 GPIO120:2;// 17:16 Defines pin-muxing selection for GPIO120Uint16 GPIO121:2;// 19:18 Defines pin-muxing selection for GPIO121Uint16 GPIO122:2;// 21:20 Defines pin-muxing selection for GPIO122Uint16 GPIO123:2;// 23:22 Defines pin-muxing selection for GPIO123Uint16 GPIO124:2;// 25:24 Defines pin-muxing selection for GPIO124Uint16 GPIO125:2;// 27:26 Defines pin-muxing selection for GPIO125Uint16 GPIO126:2;// 29:28 Defines pin-muxing selection for GPIO126Uint16 GPIO127:2;// 31:30 Defines pin-muxing selection for GPIO127
};union GPDMUX2_REG {Uint32all;structGPDMUX2_BITSbit;
};struct GPDDIR_BITS {// bits descriptionUint16 GPIO96:1;// 0 Defines direction for this pin in GPIO modeUint16 GPIO97:1;// 1 Defines direction for this pin in GPIO modeUint16 GPIO98:1;// 2 Defines direction for this pin in GPIO modeUint16 GPIO99:1;// 3 Defines direction for this pin in GPIO modeUint16 GPIO100:1;// 4 Defines direction for this pin in GPIO modeUint16 GPIO101:1;// 5 Defines direction for this pin in GPIO modeUint16 GPIO102:1;// 6 Defines direction for this pin in GPIO modeUint16 GPIO103:1;// 7 Defines direction for this pin in GPIO modeUint16 GPIO104:1;// 8 Defines direction for this pin in GPIO modeUint16 GPIO105:1;// 9 Defines direction for this pin in GPIO modeUint16 GPIO106:1;// 10 Defines direction for this pin in GPIO modeUint16 GPIO107:1;// 11 Defines direction for this pin in GPIO modeUint16 GPIO108:1;// 12 Defines direction for this pin in GPIO modeUint16 GPIO109:1;// 13 Defines direction for this pin in GPIO modeUint16 GPIO110:1;// 14 Defines direction for this pin in GPIO modeUint16 GPIO111:1;// 15 Defines direction for this pin in GPIO modeUint16 GPIO112:1;// 16 Defines direction for this pin in GPIO modeUint16 GPIO113:1;// 17 Defines direction for this pin in GPIO modeUint16 GPIO114:1;// 18 Defines direction for this pin in GPIO modeUint16 GPIO115:1;// 19 Defines direction for this pin in GPIO modeUint16 GPIO116:1;// 20 Defines direction for this pin in GPIO modeUint16 GPIO117:1;// 21 Defines direction for this pin in GPIO modeUint16 GPIO118:1;// 22 Defines direction for this pin in GPIO modeUint16 GPIO119:1;// 23 Defines direction for this pin in GPIO modeUint16 GPIO120:1;// 24 Defines direction for this pin in GPIO modeUint16 GPIO121:1;// 25 Defines direction for this pin in GPIO modeUint16 GPIO122:1;// 26 Defines direction for this pin in GPIO modeUint16 GPIO123:1;// 27 Defines direction for this pin in GPIO modeUint16 GPIO124:1;// 28 Defines direction for this pin in GPIO modeUint16 GPIO125:1;// 29 Defines direction for this pin in GPIO modeUint16 GPIO126:1;// 30 Defines direction for this pin in GPIO modeUint16 GPIO127:1;// 31 Defines direction for this pin in GPIO mode
};union GPDDIR_REG {Uint32all;structGPDDIR_BITSbit;
};struct GPDPUD_BITS {// bits descriptionUint16 GPIO96:1;// 0 Pull-Up Disable control for this pinUint16 GPIO97:1;// 1 Pull-Up Disable control for this pinUint16 GPIO98:1;// 2 Pull-Up Disable control for this pinUint16 GPIO99:1;// 3 Pull-Up Disable control for this pinUint16 GPIO100:1;// 4 Pull-Up Disable control for this pinUint16 GPIO101:1;// 5 Pull-Up Disable control for this pinUint16 GPIO102:1;// 6 Pull-Up Disable control for this pinUint16 GPIO103:1;// 7 Pull-Up Disable control for this pinUint16 GPIO104:1;// 8 Pull-Up Disable control for this pinUint16 GPIO105:1;// 9 Pull-Up Disable control for this pinUint16 GPIO106:1;// 10 Pull-Up Disable control for this pinUint16 GPIO107:1;// 11 Pull-Up Disable control for this pinUint16 GPIO108:1;// 12 Pull-Up Disable control for this pinUint16 GPIO109:1;// 13 Pull-Up Disable control for this pinUint16 GPIO110:1;// 14 Pull-Up Disable control for this pinUint16 GPIO111:1;// 15 Pull-Up Disable control for this pinUint16 GPIO112:1;// 16 Pull-Up Disable control for this pinUint16 GPIO113:1;// 17 Pull-Up Disable control for this pinUint16 GPIO114:1;// 18 Pull-Up Disable control for this pinUint16 GPIO115:1;// 19 Pull-Up Disable control for this pinUint16 GPIO116:1;// 20 Pull-Up Disable control for this pinUint16 GPIO117:1;// 21 Pull-Up Disable control for this pinUint16 GPIO118:1;// 22 Pull-Up Disable control for this pinUint16 GPIO119:1;// 23 Pull-Up Disable control for this pinUint16 GPIO120:1;// 24 Pull-Up Disable control for this pinUint16 GPIO121:1;// 25 Pull-Up Disable control for this pinUint16 GPIO122:1;// 26 Pull-Up Disable control for this pinUint16 GPIO123:1;// 27 Pull-Up Disable control for this pinUint16 GPIO124:1;// 28 Pull-Up Disable control for this pinUint16 GPIO125:1;// 29 Pull-Up Disable control for this pinUint16 GPIO126:1;// 30 Pull-Up Disable control for this pinUint16 GPIO127:1;// 31 Pull-Up Disable control for this pin
};union GPDPUD_REG {Uint32all;structGPDPUD_BITSbit;
};struct GPDINV_BITS {// bits descriptionUint16 GPIO96:1;// 0 Input inversion control for this pinUint16 GPIO97:1;// 1 Input inversion control for this pinUint16 GPIO98:1;// 2 Input inversion control for this pinUint16 GPIO99:1;// 3 Input inversion control for this pinUint16 GPIO100:1;// 4 Input inversion control for this pinUint16 GPIO101:1;// 5 Input inversion control for this pinUint16 GPIO102:1;// 6 Input inversion control for this pinUint16 GPIO103:1;// 7 Input inversion control for this pinUint16 GPIO104:1;// 8 Input inversion control for this pinUint16 GPIO105:1;// 9 Input inversion control for this pinUint16 GPIO106:1;// 10 Input inversion control for this pinUint16 GPIO107:1;// 11 Input inversion control for this pinUint16 GPIO108:1;// 12 Input inversion control for this pinUint16 GPIO109:1;// 13 Input inversion control for this pinUint16 GPIO110:1;// 14 Input inversion control for this pinUint16 GPIO111:1;// 15 Input inversion control for this pinUint16 GPIO112:1;// 16 Input inversion control for this pinUint16 GPIO113:1;// 17 Input inversion control for this pinUint16 GPIO114:1;// 18 Input inversion control for this pinUint16 GPIO115:1;// 19 Input inversion control for this pinUint16 GPIO116:1;// 20 Input inversion control for this pinUint16 GPIO117:1;// 21 Input inversion control for this pinUint16 GPIO118:1;// 22 Input inversion control for this pinUint16 GPIO119:1;// 23 Input inversion control for this pinUint16 GPIO120:1;// 24 Input inversion control for this pinUint16 GPIO121:1;// 25 Input inversion control for this pinUint16 GPIO122:1;// 26 Input inversion control for this pinUint16 GPIO123:1;// 27 Input inversion control for this pinUint16 GPIO124:1;// 28 Input inversion control for this pinUint16 GPIO125:1;// 29 Input inversion control for this pinUint16 GPIO126:1;// 30 Input inversion control for this pinUint16 GPIO127:1;// 31 Input inversion control for this pin
};union GPDINV_REG {Uint32all;structGPDINV_BITSbit;
};struct GPDODR_BITS {// bits descriptionUint16 GPIO96:1;// 0 Outpout Open-Drain control for this pinUint16 GPIO97:1;// 1 Outpout Open-Drain control for this pinUint16 GPIO98:1;// 2 Outpout Open-Drain control for this pinUint16 GPIO99:1;// 3 Outpout Open-Drain control for this pinUint16 GPIO100:1;// 4 Outpout Open-Drain control for this pinUint16 GPIO101:1;// 5 Outpout Open-Drain control for this pinUint16 GPIO102:1;// 6 Outpout Open-Drain control for this pinUint16 GPIO103:1;// 7 Outpout Open-Drain control for this pinUint16 GPIO104:1;// 8 Outpout Open-Drain control for this pinUint16 GPIO105:1;// 9 Outpout Open-Drain control for this pinUint16 GPIO106:1;// 10 Outpout Open-Drain control for this pinUint16 GPIO107:1;// 11 Outpout Open-Drain control for this pinUint16 GPIO108:1;// 12 Outpout Open-Drain control for this pinUint16 GPIO109:1;// 13 Outpout Open-Drain control for this pinUint16 GPIO110:1;// 14 Outpout Open-Drain control for this pinUint16 GPIO111:1;// 15 Outpout Open-Drain control for this pinUint16 GPIO112:1;// 16 Outpout Open-Drain control for this pinUint16 GPIO113:1;// 17 Outpout Open-Drain control for this pinUint16 GPIO114:1;// 18 Outpout Open-Drain control for this pinUint16 GPIO115:1;// 19 Outpout Open-Drain control for this pinUint16 GPIO116:1;// 20 Outpout Open-Drain control for this pinUint16 GPIO117:1;// 21 Outpout Open-Drain control for this pinUint16 GPIO118:1;// 22 Outpout Open-Drain control for this pinUint16 GPIO119:1;// 23 Outpout Open-Drain control for this pinUint16 GPIO120:1;// 24 Outpout Open-Drain control for this pinUint16 GPIO121:1;// 25 Outpout Open-Drain control for this pinUint16 GPIO122:1;// 26 Outpout Open-Drain control for this pinUint16 GPIO123:1;// 27 Outpout Open-Drain control for this pinUint16 GPIO124:1;// 28 Outpout Open-Drain control for this pinUint16 GPIO125:1;// 29 Outpout Open-Drain control for this pinUint16 GPIO126:1;// 30 Outpout Open-Drain control for this pinUint16 GPIO127:1;// 31 Outpout Open-Drain control for this pin
};union GPDODR_REG {Uint32all;structGPDODR_BITSbit;
};struct GPDGMUX1_BITS {// bits descriptionUint16 GPIO96:2;// 1:0 Defines pin-muxing selection for GPIO96Uint16 GPIO97:2;// 3:2 Defines pin-muxing selection for GPIO97Uint16 GPIO98:2;// 5:4 Defines pin-muxing selection for GPIO98Uint16 GPIO99:2;// 7:6 Defines pin-muxing selection for GPIO99Uint16 GPIO100:2;// 9:8 Defines pin-muxing selection for GPIO100Uint16 GPIO101:2;// 11:10 Defines pin-muxing selection for GPIO101Uint16 GPIO102:2;// 13:12 Defines pin-muxing selection for GPIO102Uint16 GPIO103:2;// 15:14 Defines pin-muxing selection for GPIO103Uint16 GPIO104:2;// 17:16 Defines pin-muxing selection for GPIO104Uint16 GPIO105:2;// 19:18 Defines pin-muxing selection for GPIO105Uint16 GPIO106:2;// 21:20 Defines pin-muxing selection for GPIO106Uint16 GPIO107:2;// 23:22 Defines pin-muxing selection for GPIO107Uint16 GPIO108:2;// 25:24 Defines pin-muxing selection for GPIO108Uint16 GPIO109:2;// 27:26 Defines pin-muxing selection for GPIO109Uint16 GPIO110:2;// 29:28 Defines pin-muxing selection for GPIO110Uint16 GPIO111:2;// 31:30 Defines pin-muxing selection for GPIO111
};union GPDGMUX1_REG {Uint32all;structGPDGMUX1_BITSbit;
};struct GPDGMUX2_BITS {// bits descriptionUint16 GPIO112:2;// 1:0 Defines pin-muxing selection for GPIO112Uint16 GPIO113:2;// 3:2 Defines pin-muxing selection for GPIO113Uint16 GPIO114:2;// 5:4 Defines pin-muxing selection for GPIO114Uint16 GPIO115:2;// 7:6 Defines pin-muxing selection for GPIO115Uint16 GPIO116:2;// 9:8 Defines pin-muxing selection for GPIO116Uint16 GPIO117:2;// 11:10 Defines pin-muxing selection for GPIO117Uint16 GPIO118:2;// 13:12 Defines pin-muxing selection for GPIO118Uint16 GPIO119:2;// 15:14 Defines pin-muxing selection for GPIO119Uint16 GPIO120:2;// 17:16 Defines pin-muxing selection for GPIO120Uint16 GPIO121:2;// 19:18 Defines pin-muxing selection for GPIO121Uint16 GPIO122:2;// 21:20 Defines pin-muxing selection for GPIO122Uint16 GPIO123:2;// 23:22 Defines pin-muxing selection for GPIO123Uint16 GPIO124:2;// 25:24 Defines pin-muxing selection for GPIO124Uint16 GPIO125:2;// 27:26 Defines pin-muxing selection for GPIO125Uint16 GPIO126:2;// 29:28 Defines pin-muxing selection for GPIO126Uint16 GPIO127:2;// 31:30 Defines pin-muxing selection for GPIO127
};union GPDGMUX2_REG {Uint32all;structGPDGMUX2_BITSbit;
};struct GPDCSEL1_BITS {// bits descriptionUint16 GPIO96:4;// 3:0 GPIO96 Master CPU SelectUint16 GPIO97:4;// 7:4 GPIO97 Master CPU SelectUint16 GPIO98:4;// 11:8 GPIO98 Master CPU SelectUint16 GPIO99:4;// 15:12 GPIO99 Master CPU SelectUint16 GPIO100:4;// 19:16 GPIO100 Master CPU SelectUint16 GPIO101:4;// 23:20 GPIO101 Master CPU SelectUint16 GPIO102:4;// 27:24 GPIO102 Master CPU SelectUint16 GPIO103:4;// 31:28 GPIO103 Master CPU Select
};union GPDCSEL1_REG {Uint32all;structGPDCSEL1_BITSbit;
};struct GPDCSEL2_BITS {// bits descriptionUint16 GPIO104:4;// 3:0 GPIO104 Master CPU SelectUint16 GPIO105:4;// 7:4 GPIO105 Master CPU SelectUint16 GPIO106:4;// 11:8 GPIO106 Master CPU SelectUint16 GPIO107:4;// 15:12 GPIO107 Master CPU SelectUint16 GPIO108:4;// 19:16 GPIO108 Master CPU SelectUint16 GPIO109:4;// 23:20 GPIO109 Master CPU SelectUint16 GPIO110:4;// 27:24 GPIO110 Master CPU SelectUint16 GPIO111:4;// 31:28 GPIO111 Master CPU Select
};union GPDCSEL2_REG {Uint32all;structGPDCSEL2_BITSbit;
};struct GPDCSEL3_BITS {// bits descriptionUint16 GPIO112:4;// 3:0 GPIO112 Master CPU SelectUint16 GPIO113:4;// 7:4 GPIO113 Master CPU SelectUint16 GPIO114:4;// 11:8 GPIO114 Master CPU SelectUint16 GPIO115:4;// 15:12 GPIO115 Master CPU SelectUint16 GPIO116:4;// 19:16 GPIO116 Master CPU SelectUint16 GPIO117:4;// 23:20 GPIO117 Master CPU SelectUint16 GPIO118:4;// 27:24 GPIO118 Master CPU SelectUint16 GPIO119:4;// 31:28 GPIO119 Master CPU Select
};union GPDCSEL3_REG {Uint32all;structGPDCSEL3_BITSbit;
};struct GPDCSEL4_BITS {// bits descriptionUint16 GPIO120:4;// 3:0 GPIO120 Master CPU SelectUint16 GPIO121:4;// 7:4 GPIO121 Master CPU SelectUint16 GPIO122:4;// 11:8 GPIO122 Master CPU SelectUint16 GPIO123:4;// 15:12 GPIO123 Master CPU SelectUint16 GPIO124:4;// 19:16 GPIO124 Master CPU SelectUint16 GPIO125:4;// 23:20 GPIO125 Master CPU SelectUint16 GPIO126:4;// 27:24 GPIO126 Master CPU SelectUint16 GPIO127:4;// 31:28 GPIO127 Master CPU Select
};union GPDCSEL4_REG {Uint32all;structGPDCSEL4_BITSbit;
};struct GPDLOCK_BITS {// bits descriptionUint16 GPIO96:1;// 0 Configuration Lock bit for this pinUint16 GPIO97:1;// 1 Configuration Lock bit for this pinUint16 GPIO98:1;// 2 Configuration Lock bit for this pinUint16 GPIO99:1;// 3 Configuration Lock bit for this pinUint16 GPIO100:1;// 4 Configuration Lock bit for this pinUint16 GPIO101:1;// 5 Configuration Lock bit for this pinUint16 GPIO102:1;// 6 Configuration Lock bit for this pinUint16 GPIO103:1;// 7 Configuration Lock bit for this pinUint16 GPIO104:1;// 8 Configuration Lock bit for this pinUint16 GPIO105:1;// 9 Configuration Lock bit for this pinUint16 GPIO106:1;// 10 Configuration Lock bit for this pinUint16 GPIO107:1;// 11 Configuration Lock bit for this pinUint16 GPIO108:1;// 12 Configuration Lock bit for this pinUint16 GPIO109:1;// 13 Configuration Lock bit for this pinUint16 GPIO110:1;// 14 Configuration Lock bit for this pinUint16 GPIO111:1;// 15 Configuration Lock bit for this pinUint16 GPIO112:1;// 16 Configuration Lock bit for this pinUint16 GPIO113:1;// 17 Configuration Lock bit for this pinUint16 GPIO114:1;// 18 Configuration Lock bit for this pinUint16 GPIO115:1;// 19 Configuration Lock bit for this pinUint16 GPIO116:1;// 20 Configuration Lock bit for this pinUint16 GPIO117:1;// 21 Configuration Lock bit for this pinUint16 GPIO118:1;// 22 Configuration Lock bit for this pinUint16 GPIO119:1;// 23 Configuration Lock bit for this pinUint16 GPIO120:1;// 24 Configuration Lock bit for this pinUint16 GPIO121:1;// 25 Configuration Lock bit for this pinUint16 GPIO122:1;// 26 Configuration Lock bit for this pinUint16 GPIO123:1;// 27 Configuration Lock bit for this pinUint16 GPIO124:1;// 28 Configuration Lock bit for this pinUint16 GPIO125:1;// 29 Configuration Lock bit for this pinUint16 GPIO126:1;// 30 Configuration Lock bit for this pinUint16 GPIO127:1;// 31 Configuration Lock bit for this pin
};union GPDLOCK_REG {Uint32all;structGPDLOCK_BITSbit;
};struct GPDCR_BITS {// bits descriptionUint16 GPIO96:1;// 0 Configuration lock commit bit for this pinUint16 GPIO97:1;// 1 Configuration lock commit bit for this pinUint16 GPIO98:1;// 2 Configuration lock commit bit for this pinUint16 GPIO99:1;// 3 Configuration lock commit bit for this pinUint16 GPIO100:1;// 4 Configuration lock commit bit for this pinUint16 GPIO101:1;// 5 Configuration lock commit bit for this pinUint16 GPIO102:1;// 6 Configuration lock commit bit for this pinUint16 GPIO103:1;// 7 Configuration lock commit bit for this pinUint16 GPIO104:1;// 8 Configuration lock commit bit for this pinUint16 GPIO105:1;// 9 Configuration lock commit bit for this pinUint16 GPIO106:1;// 10 Configuration lock commit bit for this pinUint16 GPIO107:1;// 11 Configuration lock commit bit for this pinUint16 GPIO108:1;// 12 Configuration lock commit bit for this pinUint16 GPIO109:1;// 13 Configuration lock commit bit for this pinUint16 GPIO110:1;// 14 Configuration lock commit bit for this pinUint16 GPIO111:1;// 15 Configuration lock commit bit for this pinUint16 GPIO112:1;// 16 Configuration lock commit bit for this pinUint16 GPIO113:1;// 17 Configuration lock commit bit for this pinUint16 GPIO114:1;// 18 Configuration lock commit bit for this pinUint16 GPIO115:1;// 19 Configuration lock commit bit for this pinUint16 GPIO116:1;// 20 Configuration lock commit bit for this pinUint16 GPIO117:1;// 21 Configuration lock commit bit for this pinUint16 GPIO118:1;// 22 Configuration lock commit bit for this pinUint16 GPIO119:1;// 23 Configuration lock commit bit for this pinUint16 GPIO120:1;// 24 Configuration lock commit bit for this pinUint16 GPIO121:1;// 25 Configuration lock commit bit for this pinUint16 GPIO122:1;// 26 Configuration lock commit bit for this pinUint16 GPIO123:1;// 27 Configuration lock commit bit for this pinUint16 GPIO124:1;// 28 Configuration lock commit bit for this pinUint16 GPIO125:1;// 29 Configuration lock commit bit for this pinUint16 GPIO126:1;// 30 Configuration lock commit bit for this pinUint16 GPIO127:1;// 31 Configuration lock commit bit for this pin
};union GPDCR_REG {Uint32all;structGPDCR_BITSbit;
};struct GPECTRL_BITS {// bits descriptionUint16 QUALPRD0:8;// 7:0 Qualification sampling period for GPIO128 to GPIO135Uint16 QUALPRD1:8;// 15:8 Qualification sampling period for GPIO136 to GPIO143Uint16 QUALPRD2:8;// 23:16 Qualification sampling period for GPIO144 to GPIO151Uint16 QUALPRD3:8;// 31:24 Qualification sampling period for GPIO152 to GPIO159
};union GPECTRL_REG {Uint32all;structGPECTRL_BITSbit;
};struct GPEQSEL1_BITS {// bits descriptionUint16 GPIO128:2;// 1:0 Select input qualification type for GPIO128Uint16 GPIO129:2;// 3:2 Select input qualification type for GPIO129Uint16 GPIO130:2;// 5:4 Select input qualification type for GPIO130Uint16 GPIO131:2;// 7:6 Select input qualification type for GPIO131Uint16 GPIO132:2;// 9:8 Select input qualification type for GPIO132Uint16 GPIO133:2;// 11:10 Select input qualification type for GPIO133Uint16 GPIO134:2;// 13:12 Select input qualification type for GPIO134Uint16 GPIO135:2;// 15:14 Select input qualification type for GPIO135Uint16 GPIO136:2;// 17:16 Select input qualification type for GPIO136Uint16 GPIO137:2;// 19:18 Select input qualification type for GPIO137Uint16 GPIO138:2;// 21:20 Select input qualification type for GPIO138Uint16 GPIO139:2;// 23:22 Select input qualification type for GPIO139Uint16 GPIO140:2;// 25:24 Select input qualification type for GPIO140Uint16 GPIO141:2;// 27:26 Select input qualification type for GPIO141Uint16 GPIO142:2;// 29:28 Select input qualification type for GPIO142Uint16 GPIO143:2;// 31:30 Select input qualification type for GPIO143
};union GPEQSEL1_REG {Uint32all;structGPEQSEL1_BITSbit;
};struct GPEQSEL2_BITS {// bits descriptionUint16 GPIO144:2;// 1:0 Select input qualification type for GPIO144Uint16 GPIO145:2;// 3:2 Select input qualification type for GPIO145Uint16 GPIO146:2;// 5:4 Select input qualification type for GPIO146Uint16 GPIO147:2;// 7:6 Select input qualification type for GPIO147Uint16 GPIO148:2;// 9:8 Select input qualification type for GPIO148Uint16 GPIO149:2;// 11:10 Select input qualification type for GPIO149Uint16 GPIO150:2;// 13:12 Select input qualification type for GPIO150Uint16 GPIO151:2;// 15:14 Select input qualification type for GPIO151Uint16 GPIO152:2;// 17:16 Select input qualification type for GPIO152Uint16 GPIO153:2;// 19:18 Select input qualification type for GPIO153Uint16 GPIO154:2;// 21:20 Select input qualification type for GPIO154Uint16 GPIO155:2;// 23:22 Select input qualification type for GPIO155Uint16 GPIO156:2;// 25:24 Select input qualification type for GPIO156Uint16 GPIO157:2;// 27:26 Select input qualification type for GPIO157Uint16 GPIO158:2;// 29:28 Select input qualification type for GPIO158Uint16 GPIO159:2;// 31:30 Select input qualification type for GPIO159
};union GPEQSEL2_REG {Uint32all;structGPEQSEL2_BITSbit;
};struct GPEMUX1_BITS {// bits descriptionUint16 GPIO128:2;// 1:0 Defines pin-muxing selection for GPIO128Uint16 GPIO129:2;// 3:2 Defines pin-muxing selection for GPIO129Uint16 GPIO130:2;// 5:4 Defines pin-muxing selection for GPIO130Uint16 GPIO131:2;// 7:6 Defines pin-muxing selection for GPIO131Uint16 GPIO132:2;// 9:8 Defines pin-muxing selection for GPIO132Uint16 GPIO133:2;// 11:10 Defines pin-muxing selection for GPIO133Uint16 GPIO134:2;// 13:12 Defines pin-muxing selection for GPIO134Uint16 GPIO135:2;// 15:14 Defines pin-muxing selection for GPIO135Uint16 GPIO136:2;// 17:16 Defines pin-muxing selection for GPIO136Uint16 GPIO137:2;// 19:18 Defines pin-muxing selection for GPIO137Uint16 GPIO138:2;// 21:20 Defines pin-muxing selection for GPIO138Uint16 GPIO139:2;// 23:22 Defines pin-muxing selection for GPIO139Uint16 GPIO140:2;// 25:24 Defines pin-muxing selection for GPIO140Uint16 GPIO141:2;// 27:26 Defines pin-muxing selection for GPIO141Uint16 GPIO142:2;// 29:28 Defines pin-muxing selection for GPIO142Uint16 GPIO143:2;// 31:30 Defines pin-muxing selection for GPIO143
};union GPEMUX1_REG {Uint32all;structGPEMUX1_BITSbit;
};struct GPEMUX2_BITS {// bits descriptionUint16 GPIO144:2;// 1:0 Defines pin-muxing selection for GPIO144Uint16 GPIO145:2;// 3:2 Defines pin-muxing selection for GPIO145Uint16 GPIO146:2;// 5:4 Defines pin-muxing selection for GPIO146Uint16 GPIO147:2;// 7:6 Defines pin-muxing selection for GPIO147Uint16 GPIO148:2;// 9:8 Defines pin-muxing selection for GPIO148Uint16 GPIO149:2;// 11:10 Defines pin-muxing selection for GPIO149Uint16 GPIO150:2;// 13:12 Defines pin-muxing selection for GPIO150Uint16 GPIO151:2;// 15:14 Defines pin-muxing selection for GPIO151Uint16 GPIO152:2;// 17:16 Defines pin-muxing selection for GPIO152Uint16 GPIO153:2;// 19:18 Defines pin-muxing selection for GPIO153Uint16 GPIO154:2;// 21:20 Defines pin-muxing selection for GPIO154Uint16 GPIO155:2;// 23:22 Defines pin-muxing selection for GPIO155Uint16 GPIO156:2;// 25:24 Defines pin-muxing selection for GPIO156Uint16 GPIO157:2;// 27:26 Defines pin-muxing selection for GPIO157Uint16 GPIO158:2;// 29:28 Defines pin-muxing selection for GPIO158Uint16 GPIO159:2;// 31:30 Defines pin-muxing selection for GPIO159
};union GPEMUX2_REG {Uint32all;structGPEMUX2_BITSbit;
};struct GPEDIR_BITS {// bits descriptionUint16 GPIO128:1;// 0 Defines direction for this pin in GPIO modeUint16 GPIO129:1;// 1 Defines direction for this pin in GPIO modeUint16 GPIO130:1;// 2 Defines direction for this pin in GPIO modeUint16 GPIO131:1;// 3 Defines direction for this pin in GPIO modeUint16 GPIO132:1;// 4 Defines direction for this pin in GPIO modeUint16 GPIO133:1;// 5 Defines direction for this pin in GPIO modeUint16 GPIO134:1;// 6 Defines direction for this pin in GPIO modeUint16 GPIO135:1;// 7 Defines direction for this pin in GPIO modeUint16 GPIO136:1;// 8 Defines direction for this pin in GPIO modeUint16 GPIO137:1;// 9 Defines direction for this pin in GPIO modeUint16 GPIO138:1;// 10 Defines direction for this pin in GPIO modeUint16 GPIO139:1;// 11 Defines direction for this pin in GPIO modeUint16 GPIO140:1;// 12 Defines direction for this pin in GPIO modeUint16 GPIO141:1;// 13 Defines direction for this pin in GPIO modeUint16 GPIO142:1;// 14 Defines direction for this pin in GPIO modeUint16 GPIO143:1;// 15 Defines direction for this pin in GPIO modeUint16 GPIO144:1;// 16 Defines direction for this pin in GPIO modeUint16 GPIO145:1;// 17 Defines direction for this pin in GPIO modeUint16 GPIO146:1;// 18 Defines direction for this pin in GPIO modeUint16 GPIO147:1;// 19 Defines direction for this pin in GPIO modeUint16 GPIO148:1;// 20 Defines direction for this pin in GPIO modeUint16 GPIO149:1;// 21 Defines direction for this pin in GPIO modeUint16 GPIO150:1;// 22 Defines direction for this pin in GPIO modeUint16 GPIO151:1;// 23 Defines direction for this pin in GPIO modeUint16 GPIO152:1;// 24 Defines direction for this pin in GPIO modeUint16 GPIO153:1;// 25 Defines direction for this pin in GPIO modeUint16 GPIO154:1;// 26 Defines direction for this pin in GPIO modeUint16 GPIO155:1;// 27 Defines direction for this pin in GPIO modeUint16 GPIO156:1;// 28 Defines direction for this pin in GPIO modeUint16 GPIO157:1;// 29 Defines direction for this pin in GPIO modeUint16 GPIO158:1;// 30 Defines direction for this pin in GPIO modeUint16 GPIO159:1;// 31 Defines direction for this pin in GPIO mode
};union GPEDIR_REG {Uint32all;structGPEDIR_BITSbit;
};struct GPEPUD_BITS {// bits descriptionUint16 GPIO128:1;// 0 Pull-Up Disable control for this pinUint16 GPIO129:1;// 1 Pull-Up Disable control for this pinUint16 GPIO130:1;// 2 Pull-Up Disable control for this pinUint16 GPIO131:1;// 3 Pull-Up Disable control for this pinUint16 GPIO132:1;// 4 Pull-Up Disable control for this pinUint16 GPIO133:1;// 5 Pull-Up Disable control for this pinUint16 GPIO134:1;// 6 Pull-Up Disable control for this pinUint16 GPIO135:1;// 7 Pull-Up Disable control for this pinUint16 GPIO136:1;// 8 Pull-Up Disable control for this pinUint16 GPIO137:1;// 9 Pull-Up Disable control for this pinUint16 GPIO138:1;// 10 Pull-Up Disable control for this pinUint16 GPIO139:1;// 11 Pull-Up Disable control for this pinUint16 GPIO140:1;// 12 Pull-Up Disable control for this pinUint16 GPIO141:1;// 13 Pull-Up Disable control for this pinUint16 GPIO142:1;// 14 Pull-Up Disable control for this pinUint16 GPIO143:1;// 15 Pull-Up Disable control for this pinUint16 GPIO144:1;// 16 Pull-Up Disable control for this pinUint16 GPIO145:1;// 17 Pull-Up Disable control for this pinUint16 GPIO146:1;// 18 Pull-Up Disable control for this pinUint16 GPIO147:1;// 19 Pull-Up Disable control for this pinUint16 GPIO148:1;// 20 Pull-Up Disable control for this pinUint16 GPIO149:1;// 21 Pull-Up Disable control for this pinUint16 GPIO150:1;// 22 Pull-Up Disable control for this pinUint16 GPIO151:1;// 23 Pull-Up Disable control for this pinUint16 GPIO152:1;// 24 Pull-Up Disable control for this pinUint16 GPIO153:1;// 25 Pull-Up Disable control for this pinUint16 GPIO154:1;// 26 Pull-Up Disable control for this pinUint16 GPIO155:1;// 27 Pull-Up Disable control for this pinUint16 GPIO156:1;// 28 Pull-Up Disable control for this pinUint16 GPIO157:1;// 29 Pull-Up Disable control for this pinUint16 GPIO158:1;// 30 Pull-Up Disable control for this pinUint16 GPIO159:1;// 31 Pull-Up Disable control for this pin
};union GPEPUD_REG {Uint32all;structGPEPUD_BITSbit;
};struct GPEINV_BITS {// bits descriptionUint16 GPIO128:1;// 0 Input inversion control for this pinUint16 GPIO129:1;// 1 Input inversion control for this pinUint16 GPIO130:1;// 2 Input inversion control for this pinUint16 GPIO131:1;// 3 Input inversion control for this pinUint16 GPIO132:1;// 4 Input inversion control for this pinUint16 GPIO133:1;// 5 Input inversion control for this pinUint16 GPIO134:1;// 6 Input inversion control for this pinUint16 GPIO135:1;// 7 Input inversion control for this pinUint16 GPIO136:1;// 8 Input inversion control for this pinUint16 GPIO137:1;// 9 Input inversion control for this pinUint16 GPIO138:1;// 10 Input inversion control for this pinUint16 GPIO139:1;// 11 Input inversion control for this pinUint16 GPIO140:1;// 12 Input inversion control for this pinUint16 GPIO141:1;// 13 Input inversion control for this pinUint16 GPIO142:1;// 14 Input inversion control for this pinUint16 GPIO143:1;// 15 Input inversion control for this pinUint16 GPIO144:1;// 16 Input inversion control for this pinUint16 GPIO145:1;// 17 Input inversion control for this pinUint16 GPIO146:1;// 18 Input inversion control for this pinUint16 GPIO147:1;// 19 Input inversion control for this pinUint16 GPIO148:1;// 20 Input inversion control for this pinUint16 GPIO149:1;// 21 Input inversion control for this pinUint16 GPIO150:1;// 22 Input inversion control for this pinUint16 GPIO151:1;// 23 Input inversion control for this pinUint16 GPIO152:1;// 24 Input inversion control for this pinUint16 GPIO153:1;// 25 Input inversion control for this pinUint16 GPIO154:1;// 26 Input inversion control for this pinUint16 GPIO155:1;// 27 Input inversion control for this pinUint16 GPIO156:1;// 28 Input inversion control for this pinUint16 GPIO157:1;// 29 Input inversion control for this pinUint16 GPIO158:1;// 30 Input inversion control for this pinUint16 GPIO159:1;// 31 Input inversion control for this pin
};union GPEINV_REG {Uint32all;structGPEINV_BITSbit;
};struct GPEODR_BITS {// bits descriptionUint16 GPIO128:1;// 0 Outpout Open-Drain control for this pinUint16 GPIO129:1;// 1 Outpout Open-Drain control for this pinUint16 GPIO130:1;// 2 Outpout Open-Drain control for this pinUint16 GPIO131:1;// 3 Outpout Open-Drain control for this pinUint16 GPIO132:1;// 4 Outpout Open-Drain control for this pinUint16 GPIO133:1;// 5 Outpout Open-Drain control for this pinUint16 GPIO134:1;// 6 Outpout Open-Drain control for this pinUint16 GPIO135:1;// 7 Outpout Open-Drain control for this pinUint16 GPIO136:1;// 8 Outpout Open-Drain control for this pinUint16 GPIO137:1;// 9 Outpout Open-Drain control for this pinUint16 GPIO138:1;// 10 Outpout Open-Drain control for this pinUint16 GPIO139:1;// 11 Outpout Open-Drain control for this pinUint16 GPIO140:1;// 12 Outpout Open-Drain control for this pinUint16 GPIO141:1;// 13 Outpout Open-Drain control for this pinUint16 GPIO142:1;// 14 Outpout Open-Drain control for this pinUint16 GPIO143:1;// 15 Outpout Open-Drain control for this pinUint16 GPIO144:1;// 16 Outpout Open-Drain control for this pinUint16 GPIO145:1;// 17 Outpout Open-Drain control for this pinUint16 GPIO146:1;// 18 Outpout Open-Drain control for this pinUint16 GPIO147:1;// 19 Outpout Open-Drain control for this pinUint16 GPIO148:1;// 20 Outpout Open-Drain control for this pinUint16 GPIO149:1;// 21 Outpout Open-Drain control for this pinUint16 GPIO150:1;// 22 Outpout Open-Drain control for this pinUint16 GPIO151:1;// 23 Outpout Open-Drain control for this pinUint16 GPIO152:1;// 24 Outpout Open-Drain control for this pinUint16 GPIO153:1;// 25 Outpout Open-Drain control for this pinUint16 GPIO154:1;// 26 Outpout Open-Drain control for this pinUint16 GPIO155:1;// 27 Outpout Open-Drain control for this pinUint16 GPIO156:1;// 28 Outpout Open-Drain control for this pinUint16 GPIO157:1;// 29 Outpout Open-Drain control for this pinUint16 GPIO158:1;// 30 Outpout Open-Drain control for this pinUint16 GPIO159:1;// 31 Outpout Open-Drain control for this pin
};union GPEODR_REG {Uint32all;structGPEODR_BITSbit;
};struct GPEGMUX1_BITS {// bits descriptionUint16 GPIO128:2;// 1:0 Defines pin-muxing selection for GPIO128Uint16 GPIO129:2;// 3:2 Defines pin-muxing selection for GPIO129Uint16 GPIO130:2;// 5:4 Defines pin-muxing selection for GPIO130Uint16 GPIO131:2;// 7:6 Defines pin-muxing selection for GPIO131Uint16 GPIO132:2;// 9:8 Defines pin-muxing selection for GPIO132Uint16 GPIO133:2;// 11:10 Defines pin-muxing selection for GPIO133Uint16 GPIO134:2;// 13:12 Defines pin-muxing selection for GPIO134Uint16 GPIO135:2;// 15:14 Defines pin-muxing selection for GPIO135Uint16 GPIO136:2;// 17:16 Defines pin-muxing selection for GPIO136Uint16 GPIO137:2;// 19:18 Defines pin-muxing selection for GPIO137Uint16 GPIO138:2;// 21:20 Defines pin-muxing selection for GPIO138Uint16 GPIO139:2;// 23:22 Defines pin-muxing selection for GPIO139Uint16 GPIO140:2;// 25:24 Defines pin-muxing selection for GPIO140Uint16 GPIO141:2;// 27:26 Defines pin-muxing selection for GPIO141Uint16 GPIO142:2;// 29:28 Defines pin-muxing selection for GPIO142Uint16 GPIO143:2;// 31:30 Defines pin-muxing selection for GPIO143
};union GPEGMUX1_REG {Uint32all;structGPEGMUX1_BITSbit;
};struct GPEGMUX2_BITS {// bits descriptionUint16 GPIO144:2;// 1:0 Defines pin-muxing selection for GPIO144Uint16 GPIO145:2;// 3:2 Defines pin-muxing selection for GPIO145Uint16 GPIO146:2;// 5:4 Defines pin-muxing selection for GPIO146Uint16 GPIO147:2;// 7:6 Defines pin-muxing selection for GPIO147Uint16 GPIO148:2;// 9:8 Defines pin-muxing selection for GPIO148Uint16 GPIO149:2;// 11:10 Defines pin-muxing selection for GPIO149Uint16 GPIO150:2;// 13:12 Defines pin-muxing selection for GPIO150Uint16 GPIO151:2;// 15:14 Defines pin-muxing selection for GPIO151Uint16 GPIO152:2;// 17:16 Defines pin-muxing selection for GPIO152Uint16 GPIO153:2;// 19:18 Defines pin-muxing selection for GPIO153Uint16 GPIO154:2;// 21:20 Defines pin-muxing selection for GPIO154Uint16 GPIO155:2;// 23:22 Defines pin-muxing selection for GPIO155Uint16 GPIO156:2;// 25:24 Defines pin-muxing selection for GPIO156Uint16 GPIO157:2;// 27:26 Defines pin-muxing selection for GPIO157Uint16 GPIO158:2;// 29:28 Defines pin-muxing selection for GPIO158Uint16 GPIO159:2;// 31:30 Defines pin-muxing selection for GPIO159
};union GPEGMUX2_REG {Uint32all;structGPEGMUX2_BITSbit;
};struct GPECSEL1_BITS {// bits descriptionUint16 GPIO128:4;// 3:0 GPIO128 Master CPU SelectUint16 GPIO129:4;// 7:4 GPIO129 Master CPU SelectUint16 GPIO130:4;// 11:8 GPIO130 Master CPU SelectUint16 GPIO131:4;// 15:12 GPIO131 Master CPU SelectUint16 GPIO132:4;// 19:16 GPIO132 Master CPU SelectUint16 GPIO133:4;// 23:20 GPIO133 Master CPU SelectUint16 GPIO134:4;// 27:24 GPIO134 Master CPU SelectUint16 GPIO135:4;// 31:28 GPIO135 Master CPU Select
};union GPECSEL1_REG {Uint32all;structGPECSEL1_BITSbit;
};struct GPECSEL2_BITS {// bits descriptionUint16 GPIO136:4;// 3:0 GPIO136 Master CPU SelectUint16 GPIO137:4;// 7:4 GPIO137 Master CPU SelectUint16 GPIO138:4;// 11:8 GPIO138 Master CPU SelectUint16 GPIO139:4;// 15:12 GPIO139 Master CPU SelectUint16 GPIO140:4;// 19:16 GPIO140 Master CPU SelectUint16 GPIO141:4;// 23:20 GPIO141 Master CPU SelectUint16 GPIO142:4;// 27:24 GPIO142 Master CPU SelectUint16 GPIO143:4;// 31:28 GPIO143 Master CPU Select
};union GPECSEL2_REG {Uint32all;structGPECSEL2_BITSbit;
};struct GPECSEL3_BITS {// bits descriptionUint16 GPIO144:4;// 3:0 GPIO144 Master CPU SelectUint16 GPIO145:4;// 7:4 GPIO145 Master CPU SelectUint16 GPIO146:4;// 11:8 GPIO146 Master CPU SelectUint16 GPIO147:4;// 15:12 GPIO147 Master CPU SelectUint16 GPIO148:4;// 19:16 GPIO148 Master CPU SelectUint16 GPIO149:4;// 23:20 GPIO149 Master CPU SelectUint16 GPIO150:4;// 27:24 GPIO150 Master CPU SelectUint16 GPIO151:4;// 31:28 GPIO151 Master CPU Select
};union GPECSEL3_REG {Uint32all;structGPECSEL3_BITSbit;
};struct GPECSEL4_BITS {// bits descriptionUint16 GPIO152:4;// 3:0 GPIO152 Master CPU SelectUint16 GPIO153:4;// 7:4 GPIO153 Master CPU SelectUint16 GPIO154:4;// 11:8 GPIO154 Master CPU SelectUint16 GPIO155:4;// 15:12 GPIO155 Master CPU SelectUint16 GPIO156:4;// 19:16 GPIO156 Master CPU SelectUint16 GPIO157:4;// 23:20 GPIO157 Master CPU SelectUint16 GPIO158:4;// 27:24 GPIO158 Master CPU SelectUint16 GPIO159:4;// 31:28 GPIO159 Master CPU Select
};union GPECSEL4_REG {Uint32all;structGPECSEL4_BITSbit;
};struct GPELOCK_BITS {// bits descriptionUint16 GPIO128:1;// 0 Configuration Lock bit for this pinUint16 GPIO129:1;// 1 Configuration Lock bit for this pinUint16 GPIO130:1;// 2 Configuration Lock bit for this pinUint16 GPIO131:1;// 3 Configuration Lock bit for this pinUint16 GPIO132:1;// 4 Configuration Lock bit for this pinUint16 GPIO133:1;// 5 Configuration Lock bit for this pinUint16 GPIO134:1;// 6 Configuration Lock bit for this pinUint16 GPIO135:1;// 7 Configuration Lock bit for this pinUint16 GPIO136:1;// 8 Configuration Lock bit for this pinUint16 GPIO137:1;// 9 Configuration Lock bit for this pinUint16 GPIO138:1;// 10 Configuration Lock bit for this pinUint16 GPIO139:1;// 11 Configuration Lock bit for this pinUint16 GPIO140:1;// 12 Configuration Lock bit for this pinUint16 GPIO141:1;// 13 Configuration Lock bit for this pinUint16 GPIO142:1;// 14 Configuration Lock bit for this pinUint16 GPIO143:1;// 15 Configuration Lock bit for this pinUint16 GPIO144:1;// 16 Configuration Lock bit for this pinUint16 GPIO145:1;// 17 Configuration Lock bit for this pinUint16 GPIO146:1;// 18 Configuration Lock bit for this pinUint16 GPIO147:1;// 19 Configuration Lock bit for this pinUint16 GPIO148:1;// 20 Configuration Lock bit for this pinUint16 GPIO149:1;// 21 Configuration Lock bit for this pinUint16 GPIO150:1;// 22 Configuration Lock bit for this pinUint16 GPIO151:1;// 23 Configuration Lock bit for this pinUint16 GPIO152:1;// 24 Configuration Lock bit for this pinUint16 GPIO153:1;// 25 Configuration Lock bit for this pinUint16 GPIO154:1;// 26 Configuration Lock bit for this pinUint16 GPIO155:1;// 27 Configuration Lock bit for this pinUint16 GPIO156:1;// 28 Configuration Lock bit for this pinUint16 GPIO157:1;// 29 Configuration Lock bit for this pinUint16 GPIO158:1;// 30 Configuration Lock bit for this pinUint16 GPIO159:1;// 31 Configuration Lock bit for this pin
};union GPELOCK_REG {Uint32all;structGPELOCK_BITSbit;
};struct GPECR_BITS {// bits descriptionUint16 GPIO128:1;// 0 Configuration lock commit bit for this pinUint16 GPIO129:1;// 1 Configuration lock commit bit for this pinUint16 GPIO130:1;// 2 Configuration lock commit bit for this pinUint16 GPIO131:1;// 3 Configuration lock commit bit for this pinUint16 GPIO132:1;// 4 Configuration lock commit bit for this pinUint16 GPIO133:1;// 5 Configuration lock commit bit for this pinUint16 GPIO134:1;// 6 Configuration lock commit bit for this pinUint16 GPIO135:1;// 7 Configuration lock commit bit for this pinUint16 GPIO136:1;// 8 Configuration lock commit bit for this pinUint16 GPIO137:1;// 9 Configuration lock commit bit for this pinUint16 GPIO138:1;// 10 Configuration lock commit bit for this pinUint16 GPIO139:1;// 11 Configuration lock commit bit for this pinUint16 GPIO140:1;// 12 Configuration lock commit bit for this pinUint16 GPIO141:1;// 13 Configuration lock commit bit for this pinUint16 GPIO142:1;// 14 Configuration lock commit bit for this pinUint16 GPIO143:1;// 15 Configuration lock commit bit for this pinUint16 GPIO144:1;// 16 Configuration lock commit bit for this pinUint16 GPIO145:1;// 17 Configuration lock commit bit for this pinUint16 GPIO146:1;// 18 Configuration lock commit bit for this pinUint16 GPIO147:1;// 19 Configuration lock commit bit for this pinUint16 GPIO148:1;// 20 Configuration lock commit bit for this pinUint16 GPIO149:1;// 21 Configuration lock commit bit for this pinUint16 GPIO150:1;// 22 Configuration lock commit bit for this pinUint16 GPIO151:1;// 23 Configuration lock commit bit for this pinUint16 GPIO152:1;// 24 Configuration lock commit bit for this pinUint16 GPIO153:1;// 25 Configuration lock commit bit for this pinUint16 GPIO154:1;// 26 Configuration lock commit bit for this pinUint16 GPIO155:1;// 27 Configuration lock commit bit for this pinUint16 GPIO156:1;// 28 Configuration lock commit bit for this pinUint16 GPIO157:1;// 29 Configuration lock commit bit for this pinUint16 GPIO158:1;// 30 Configuration lock commit bit for this pinUint16 GPIO159:1;// 31 Configuration lock commit bit for this pin
};union GPECR_REG {Uint32all;structGPECR_BITSbit;
};struct GPFCTRL_BITS {// bits descriptionUint16 QUALPRD0:8;// 7:0 Qualification sampling period for GPIO160 to GPIO167Uint16 QUALPRD1:8;// 15:8 Qualification sampling period for GPIO168Uint16 rsvd1:8;// 23:16 ReservedUint16 rsvd2:8;// 31:24 Reserved
};union GPFCTRL_REG {Uint32all;structGPFCTRL_BITSbit;
};struct GPFQSEL1_BITS {// bits descriptionUint16 GPIO160:2;// 1:0 Select input qualification type for GPIO160Uint16 GPIO161:2;// 3:2 Select input qualification type for GPIO161Uint16 GPIO162:2;// 5:4 Select input qualification type for GPIO162Uint16 GPIO163:2;// 7:6 Select input qualification type for GPIO163Uint16 GPIO164:2;// 9:8 Select input qualification type for GPIO164Uint16 GPIO165:2;// 11:10 Select input qualification type for GPIO165Uint16 GPIO166:2;// 13:12 Select input qualification type for GPIO166Uint16 GPIO167:2;// 15:14 Select input qualification type for GPIO167Uint16 GPIO168:2;// 17:16 Select input qualification type for GPIO168Uint16 rsvd1:2;// 19:18 ReservedUint16 rsvd2:2;// 21:20 ReservedUint16 rsvd3:2;// 23:22 ReservedUint16 rsvd4:2;// 25:24 ReservedUint16 rsvd5:2;// 27:26 ReservedUint16 rsvd6:2;// 29:28 ReservedUint16 rsvd7:2;// 31:30 Reserved
};union GPFQSEL1_REG {Uint32all;structGPFQSEL1_BITSbit;
};struct GPFMUX1_BITS {// bits descriptionUint16 GPIO160:2;// 1:0 Defines pin-muxing selection for GPIO160Uint16 GPIO161:2;// 3:2 Defines pin-muxing selection for GPIO161Uint16 GPIO162:2;// 5:4 Defines pin-muxing selection for GPIO162Uint16 GPIO163:2;// 7:6 Defines pin-muxing selection for GPIO163Uint16 GPIO164:2;// 9:8 Defines pin-muxing selection for GPIO164Uint16 GPIO165:2;// 11:10 Defines pin-muxing selection for GPIO165Uint16 GPIO166:2;// 13:12 Defines pin-muxing selection for GPIO166Uint16 GPIO167:2;// 15:14 Defines pin-muxing selection for GPIO167Uint16 GPIO168:2;// 17:16 Defines pin-muxing selection for GPIO168Uint16 rsvd1:2;// 19:18 ReservedUint16 rsvd2:2;// 21:20 ReservedUint16 rsvd3:2;// 23:22 ReservedUint16 rsvd4:2;// 25:24 ReservedUint16 rsvd5:2;// 27:26 ReservedUint16 rsvd6:2;// 29:28 ReservedUint16 rsvd7:2;// 31:30 Reserved
};union GPFMUX1_REG {Uint32all;structGPFMUX1_BITSbit;
};struct GPFDIR_BITS {// bits descriptionUint16 GPIO160:1;// 0 Defines direction for this pin in GPIO modeUint16 GPIO161:1;// 1 Defines direction for this pin in GPIO modeUint16 GPIO162:1;// 2 Defines direction for this pin in GPIO modeUint16 GPIO163:1;// 3 Defines direction for this pin in GPIO modeUint16 GPIO164:1;// 4 Defines direction for this pin in GPIO modeUint16 GPIO165:1;// 5 Defines direction for this pin in GPIO modeUint16 GPIO166:1;// 6 Defines direction for this pin in GPIO modeUint16 GPIO167:1;// 7 Defines direction for this pin in GPIO modeUint16 GPIO168:1;// 8 Defines direction for this pin in GPIO modeUint16 rsvd1:1;// 9 ReservedUint16 rsvd2:1;// 10 ReservedUint16 rsvd3:1;// 11 ReservedUint16 rsvd4:1;// 12 ReservedUint16 rsvd5:1;// 13 ReservedUint16 rsvd6:1;// 14 ReservedUint16 rsvd7:1;// 15 ReservedUint16 rsvd8:1;// 16 ReservedUint16 rsvd9:1;// 17 ReservedUint16 rsvd10:1;// 18 ReservedUint16 rsvd11:1;// 19 ReservedUint16 rsvd12:1;// 20 ReservedUint16 rsvd13:1;// 21 ReservedUint16 rsvd14:1;// 22 ReservedUint16 rsvd15:1;// 23 ReservedUint16 rsvd16:1;// 24 ReservedUint16 rsvd17:1;// 25 ReservedUint16 rsvd18:1;// 26 ReservedUint16 rsvd19:1;// 27 ReservedUint16 rsvd20:1;// 28 ReservedUint16 rsvd21:1;// 29 ReservedUint16 rsvd22:1;// 30 ReservedUint16 rsvd23:1;// 31 Reserved
};union GPFDIR_REG {Uint32all;structGPFDIR_BITSbit;
};struct GPFPUD_BITS {// bits descriptionUint16 GPIO160:1;// 0 Pull-Up Disable control for this pinUint16 GPIO161:1;// 1 Pull-Up Disable control for this pinUint16 GPIO162:1;// 2 Pull-Up Disable control for this pinUint16 GPIO163:1;// 3 Pull-Up Disable control for this pinUint16 GPIO164:1;// 4 Pull-Up Disable control for this pinUint16 GPIO165:1;// 5 Pull-Up Disable control for this pinUint16 GPIO166:1;// 6 Pull-Up Disable control for this pinUint16 GPIO167:1;// 7 Pull-Up Disable control for this pinUint16 GPIO168:1;// 8 Pull-Up Disable control for this pinUint16 rsvd1:1;// 9 ReservedUint16 rsvd2:1;// 10 ReservedUint16 rsvd3:1;// 11 ReservedUint16 rsvd4:1;// 12 ReservedUint16 rsvd5:1;// 13 ReservedUint16 rsvd6:1;// 14 ReservedUint16 rsvd7:1;// 15 ReservedUint16 rsvd8:1;// 16 ReservedUint16 rsvd9:1;// 17 ReservedUint16 rsvd10:1;// 18 ReservedUint16 rsvd11:1;// 19 ReservedUint16 rsvd12:1;// 20 ReservedUint16 rsvd13:1;// 21 ReservedUint16 rsvd14:1;// 22 ReservedUint16 rsvd15:1;// 23 ReservedUint16 rsvd16:1;// 24 ReservedUint16 rsvd17:1;// 25 ReservedUint16 rsvd18:1;// 26 ReservedUint16 rsvd19:1;// 27 ReservedUint16 rsvd20:1;// 28 ReservedUint16 rsvd21:1;// 29 ReservedUint16 rsvd22:1;// 30 ReservedUint16 rsvd23:1;// 31 Reserved
};union GPFPUD_REG {Uint32all;structGPFPUD_BITSbit;
};struct GPFINV_BITS {// bits descriptionUint16 GPIO160:1;// 0 Input inversion control for this pinUint16 GPIO161:1;// 1 Input inversion control for this pinUint16 GPIO162:1;// 2 Input inversion control for this pinUint16 GPIO163:1;// 3 Input inversion control for this pinUint16 GPIO164:1;// 4 Input inversion control for this pinUint16 GPIO165:1;// 5 Input inversion control for this pinUint16 GPIO166:1;// 6 Input inversion control for this pinUint16 GPIO167:1;// 7 Input inversion control for this pinUint16 GPIO168:1;// 8 Input inversion control for this pinUint16 rsvd1:1;// 9 ReservedUint16 rsvd2:1;// 10 ReservedUint16 rsvd3:1;// 11 ReservedUint16 rsvd4:1;// 12 ReservedUint16 rsvd5:1;// 13 ReservedUint16 rsvd6:1;// 14 ReservedUint16 rsvd7:1;// 15 ReservedUint16 rsvd8:1;// 16 ReservedUint16 rsvd9:1;// 17 ReservedUint16 rsvd10:1;// 18 ReservedUint16 rsvd11:1;// 19 ReservedUint16 rsvd12:1;// 20 ReservedUint16 rsvd13:1;// 21 ReservedUint16 rsvd14:1;// 22 ReservedUint16 rsvd15:1;// 23 ReservedUint16 rsvd16:1;// 24 ReservedUint16 rsvd17:1;// 25 ReservedUint16 rsvd18:1;// 26 ReservedUint16 rsvd19:1;// 27 ReservedUint16 rsvd20:1;// 28 ReservedUint16 rsvd21:1;// 29 ReservedUint16 rsvd22:1;// 30 ReservedUint16 rsvd23:1;// 31 Reserved
};union GPFINV_REG {Uint32all;structGPFINV_BITSbit;
};struct GPFODR_BITS {// bits descriptionUint16 GPIO160:1;// 0 Outpout Open-Drain control for this pinUint16 GPIO161:1;// 1 Outpout Open-Drain control for this pinUint16 GPIO162:1;// 2 Outpout Open-Drain control for this pinUint16 GPIO163:1;// 3 Outpout Open-Drain control for this pinUint16 GPIO164:1;// 4 Outpout Open-Drain control for this pinUint16 GPIO165:1;// 5 Outpout Open-Drain control for this pinUint16 GPIO166:1;// 6 Outpout Open-Drain control for this pinUint16 GPIO167:1;// 7 Outpout Open-Drain control for this pinUint16 GPIO168:1;// 8 Outpout Open-Drain control for this pinUint16 rsvd1:1;// 9 ReservedUint16 rsvd2:1;// 10 ReservedUint16 rsvd3:1;// 11 ReservedUint16 rsvd4:1;// 12 ReservedUint16 rsvd5:1;// 13 ReservedUint16 rsvd6:1;// 14 ReservedUint16 rsvd7:1;// 15 ReservedUint16 rsvd8:1;// 16 ReservedUint16 rsvd9:1;// 17 ReservedUint16 rsvd10:1;// 18 ReservedUint16 rsvd11:1;// 19 ReservedUint16 rsvd12:1;// 20 ReservedUint16 rsvd13:1;// 21 ReservedUint16 rsvd14:1;// 22 ReservedUint16 rsvd15:1;// 23 ReservedUint16 rsvd16:1;// 24 ReservedUint16 rsvd17:1;// 25 ReservedUint16 rsvd18:1;// 26 ReservedUint16 rsvd19:1;// 27 ReservedUint16 rsvd20:1;// 28 ReservedUint16 rsvd21:1;// 29 ReservedUint16 rsvd22:1;// 30 ReservedUint16 rsvd23:1;// 31 Reserved
};union GPFODR_REG {Uint32all;structGPFODR_BITSbit;
};struct GPFGMUX1_BITS {// bits descriptionUint16 GPIO160:2;// 1:0 Defines pin-muxing selection for GPIO160Uint16 GPIO161:2;// 3:2 Defines pin-muxing selection for GPIO161Uint16 GPIO162:2;// 5:4 Defines pin-muxing selection for GPIO162Uint16 GPIO163:2;// 7:6 Defines pin-muxing selection for GPIO163Uint16 GPIO164:2;// 9:8 Defines pin-muxing selection for GPIO164Uint16 GPIO165:2;// 11:10 Defines pin-muxing selection for GPIO165Uint16 GPIO166:2;// 13:12 Defines pin-muxing selection for GPIO166Uint16 GPIO167:2;// 15:14 Defines pin-muxing selection for GPIO167Uint16 GPIO168:2;// 17:16 Defines pin-muxing selection for GPIO168Uint16 rsvd1:2;// 19:18 ReservedUint16 rsvd2:2;// 21:20 ReservedUint16 rsvd3:2;// 23:22 ReservedUint16 rsvd4:2;// 25:24 ReservedUint16 rsvd5:2;// 27:26 ReservedUint16 rsvd6:2;// 29:28 ReservedUint16 rsvd7:2;// 31:30 Reserved
};union GPFGMUX1_REG {Uint32all;structGPFGMUX1_BITSbit;
};struct GPFCSEL1_BITS {// bits descriptionUint16 GPIO160:4;// 3:0 GPIO160 Master CPU SelectUint16 GPIO161:4;// 7:4 GPIO161 Master CPU SelectUint16 GPIO162:4;// 11:8 GPIO162 Master CPU SelectUint16 GPIO163:4;// 15:12 GPIO163 Master CPU SelectUint16 GPIO164:4;// 19:16 GPIO164 Master CPU SelectUint16 GPIO165:4;// 23:20 GPIO165 Master CPU SelectUint16 GPIO166:4;// 27:24 GPIO166 Master CPU SelectUint16 GPIO167:4;// 31:28 GPIO167 Master CPU Select
};union GPFCSEL1_REG {Uint32all;structGPFCSEL1_BITSbit;
};struct GPFCSEL2_BITS {// bits descriptionUint16 GPIO168:4;// 3:0 GPIO168 Master CPU SelectUint16 rsvd1:4;// 7:4 ReservedUint16 rsvd2:4;// 11:8 ReservedUint16 rsvd3:4;// 15:12 ReservedUint16 rsvd4:4;// 19:16 ReservedUint16 rsvd5:4;// 23:20 ReservedUint16 rsvd6:4;// 27:24 ReservedUint16 rsvd7:4;// 31:28 Reserved
};union GPFCSEL2_REG {Uint32all;structGPFCSEL2_BITSbit;
};struct GPFLOCK_BITS {// bits descriptionUint16 GPIO160:1;// 0 Configuration Lock bit for this pinUint16 GPIO161:1;// 1 Configuration Lock bit for this pinUint16 GPIO162:1;// 2 Configuration Lock bit for this pinUint16 GPIO163:1;// 3 Configuration Lock bit for this pinUint16 GPIO164:1;// 4 Configuration Lock bit for this pinUint16 GPIO165:1;// 5 Configuration Lock bit for this pinUint16 GPIO166:1;// 6 Configuration Lock bit for this pinUint16 GPIO167:1;// 7 Configuration Lock bit for this pinUint16 GPIO168:1;// 8 Configuration Lock bit for this pinUint16 rsvd1:1;// 9 ReservedUint16 rsvd2:1;// 10 ReservedUint16 rsvd3:1;// 11 ReservedUint16 rsvd4:1;// 12 ReservedUint16 rsvd5:1;// 13 ReservedUint16 rsvd6:1;// 14 ReservedUint16 rsvd7:1;// 15 ReservedUint16 rsvd8:1;// 16 ReservedUint16 rsvd9:1;// 17 ReservedUint16 rsvd10:1;// 18 ReservedUint16 rsvd11:1;// 19 ReservedUint16 rsvd12:1;// 20 ReservedUint16 rsvd13:1;// 21 ReservedUint16 rsvd14:1;// 22 ReservedUint16 rsvd15:1;// 23 ReservedUint16 rsvd16:1;// 24 ReservedUint16 rsvd17:1;// 25 ReservedUint16 rsvd18:1;// 26 ReservedUint16 rsvd19:1;// 27 ReservedUint16 rsvd20:1;// 28 ReservedUint16 rsvd21:1;// 29 ReservedUint16 rsvd22:1;// 30 ReservedUint16 rsvd23:1;// 31 Reserved
};union GPFLOCK_REG {Uint32all;structGPFLOCK_BITSbit;
};struct GPFCR_BITS {// bits descriptionUint16 GPIO160:1;// 0 Configuration lock commit bit for this pinUint16 GPIO161:1;// 1 Configuration lock commit bit for this pinUint16 GPIO162:1;// 2 Configuration lock commit bit for this pinUint16 GPIO163:1;// 3 Configuration lock commit bit for this pinUint16 GPIO164:1;// 4 Configuration lock commit bit for this pinUint16 GPIO165:1;// 5 Configuration lock commit bit for this pinUint16 GPIO166:1;// 6 Configuration lock commit bit for this pinUint16 GPIO167:1;// 7 Configuration lock commit bit for this pinUint16 GPIO168:1;// 8 Configuration lock commit bit for this pinUint16 rsvd1:1;// 9 ReservedUint16 rsvd2:1;// 10 ReservedUint16 rsvd3:1;// 11 ReservedUint16 rsvd4:1;// 12 ReservedUint16 rsvd5:1;// 13 ReservedUint16 rsvd6:1;// 14 ReservedUint16 rsvd7:1;// 15 ReservedUint16 rsvd8:1;// 16 ReservedUint16 rsvd9:1;// 17 ReservedUint16 rsvd10:1;// 18 ReservedUint16 rsvd11:1;// 19 ReservedUint16 rsvd12:1;// 20 ReservedUint16 rsvd13:1;// 21 ReservedUint16 rsvd14:1;// 22 ReservedUint16 rsvd15:1;// 23 ReservedUint16 rsvd16:1;// 24 ReservedUint16 rsvd17:1;// 25 ReservedUint16 rsvd18:1;// 26 ReservedUint16 rsvd19:1;// 27 ReservedUint16 rsvd20:1;// 28 ReservedUint16 rsvd21:1;// 29 ReservedUint16 rsvd22:1;// 30 ReservedUint16 rsvd23:1;// 31 Reserved
};union GPFCR_REG {Uint32all;structGPFCR_BITSbit;
};struct GPIO_CTRL_REGS {unionGPACTRL_REGGPACTRL;// GPIO A Qualification Sampling Period Control (GPIO0 to 31)unionGPAQSEL1_REGGPAQSEL1;// GPIO A Qualifier Select 1 Register (GPIO0 to 15)unionGPAQSEL2_REGGPAQSEL2;// GPIO A Qualifier Select 2 Register (GPIO16 to 31)unionGPAMUX1_REGGPAMUX1;// GPIO A Mux 1 Register (GPIO0 to 15)unionGPAMUX2_REGGPAMUX2;// GPIO A Mux 2 Register (GPIO16 to 31)unionGPADIR_REGGPADIR;// GPIO A Direction Register (GPIO0 to 31)unionGPAPUD_REGGPAPUD;// GPIO A Pull Up Disable Register (GPIO0 to 31)Uint16rsvd1[2];// ReservedunionGPAINV_REGGPAINV;// GPIO A Input Polarity Invert Registers (GPIO0 to 31)unionGPAODR_REGGPAODR;// GPIO A Open Drain Output Register (GPIO0 to GPIO31)Uint16rsvd2[12];// ReservedunionGPAGMUX1_REGGPAGMUX1;// GPIO A Peripheral Group Mux (GPIO0 to 15)unionGPAGMUX2_REGGPAGMUX2;// GPIO A Peripheral Group Mux (GPIO16 to 31)Uint16rsvd3[4];// ReservedunionGPACSEL1_REGGPACSEL1;// GPIO A Core Select Register (GPIO0 to 7)unionGPACSEL2_REGGPACSEL2;// GPIO A Core Select Register (GPIO8 to 15)unionGPACSEL3_REGGPACSEL3;// GPIO A Core Select Register (GPIO16 to 23)unionGPACSEL4_REGGPACSEL4;// GPIO A Core Select Register (GPIO24 to 31)Uint16rsvd4[12];// ReservedunionGPALOCK_REGGPALOCK;// GPIO A Lock Configuration Register (GPIO0 to 31)unionGPACR_REGGPACR;// GPIO A Lock Commit Register (GPIO0 to 31)unionGPBCTRL_REGGPBCTRL;// GPIO B Qualification Sampling Period Control (GPIO32 to 63)unionGPBQSEL1_REGGPBQSEL1;// GPIO B Qualifier Select 1 Register (GPIO32 to 47)unionGPBQSEL2_REGGPBQSEL2;// GPIO B Qualifier Select 2 Register (GPIO48 to 63)unionGPBMUX1_REGGPBMUX1;// GPIO B Mux 1 Register (GPIO32 to 47)unionGPBMUX2_REGGPBMUX2;// GPIO B Mux 2 Register (GPIO48 to 63)unionGPBDIR_REGGPBDIR;// GPIO B Direction Register (GPIO32 to 63)unionGPBPUD_REGGPBPUD;// GPIO B Pull Up Disable Register (GPIO32 to 63)Uint16rsvd5[2];// ReservedunionGPBINV_REGGPBINV;// GPIO B Input Polarity Invert Registers (GPIO32 to 63)unionGPBODR_REGGPBODR;// GPIO B Open Drain Output Register (GPIO32 to GPIO63)unionGPBAMSEL_REGGPBAMSEL;// GPIO B Analog Mode Select register (GPIO32 to GPIO63)Uint16rsvd6[10];// ReservedunionGPBGMUX1_REGGPBGMUX1;// GPIO B Peripheral Group Mux (GPIO32 to 47)unionGPBGMUX2_REGGPBGMUX2;// GPIO B Peripheral Group Mux (GPIO48 to 63)Uint16rsvd7[4];// ReservedunionGPBCSEL1_REGGPBCSEL1;// GPIO B Core Select Register (GPIO32 to 39)unionGPBCSEL2_REGGPBCSEL2;// GPIO B Core Select Register (GPIO40 to 47)unionGPBCSEL3_REGGPBCSEL3;// GPIO B Core Select Register (GPIO48 to 55)unionGPBCSEL4_REGGPBCSEL4;// GPIO B Core Select Register (GPIO56 to 63)Uint16rsvd8[12];// ReservedunionGPBLOCK_REGGPBLOCK;// GPIO B Lock Configuration Register (GPIO32 to 63)unionGPBCR_REGGPBCR;// GPIO B Lock Commit Register (GPIO32 to 63)unionGPCCTRL_REGGPCCTRL;// GPIO C Qualification Sampling Period Control (GPIO64 to 95)unionGPCQSEL1_REGGPCQSEL1;// GPIO C Qualifier Select 1 Register (GPIO64 to 79)unionGPCQSEL2_REGGPCQSEL2;// GPIO C Qualifier Select 2 Register (GPIO80to 95)unionGPCMUX1_REGGPCMUX1;// GPIO C Mux 1 Register (GPIO64 to 79)unionGPCMUX2_REGGPCMUX2;// GPIO C Mux 2 Register (GPIO80to 95)unionGPCDIR_REGGPCDIR;// GPIO C Direction Register (GPIO64 to 95)unionGPCPUD_REGGPCPUD;// GPIO C Pull Up Disable Register (GPIO64 to 95)Uint16rsvd9[2];// ReservedunionGPCINV_REGGPCINV;// GPIO C Input Polarity Invert Registers (GPIO64 to 95)unionGPCODR_REGGPCODR;// GPIO C Open Drain Output Register (GPIO64 to GPIO95)Uint16rsvd10[12];// ReservedunionGPCGMUX1_REGGPCGMUX1;// GPIO C Peripheral Group Mux (GPIO64 to 79)unionGPCGMUX2_REGGPCGMUX2;// GPIO C Peripheral Group Mux (GPIO80to 95)Uint16rsvd11[4];// ReservedunionGPCCSEL1_REGGPCCSEL1;// GPIO C Core Select Register (GPIO64 to 71)unionGPCCSEL2_REGGPCCSEL2;// GPIO C Core Select Register (GPIO72 to 79)unionGPCCSEL3_REGGPCCSEL3;// GPIO C Core Select Register (GPIO80to 87)unionGPCCSEL4_REGGPCCSEL4;// GPIO C Core Select Register (GPIO88 to 95)Uint16rsvd12[12];// ReservedunionGPCLOCK_REGGPCLOCK;// GPIO C Lock Configuration Register (GPIO64 to 95)unionGPCCR_REGGPCCR;// GPIO C Lock Commit Register (GPIO64 to 95)unionGPDCTRL_REGGPDCTRL;// GPIO D Qualification Sampling Period Control (GPIO96 to 127)unionGPDQSEL1_REGGPDQSEL1;// GPIO D Qualifier Select 1 Register (GPIO96 to 111)unionGPDQSEL2_REGGPDQSEL2;// GPIO D Qualifier Select 2 Register (GPIO112 to 127)unionGPDMUX1_REGGPDMUX1;// GPIO D Mux 1 Register (GPIO96 to 111)unionGPDMUX2_REGGPDMUX2;// GPIO D Mux 2 Register (GPIO112 to 127)unionGPDDIR_REGGPDDIR;// GPIO D Direction Register (GPIO96 to 127)unionGPDPUD_REGGPDPUD;// GPIO D Pull Up Disable Register (GPIO96 to 127)Uint16rsvd13[2];// ReservedunionGPDINV_REGGPDINV;// GPIO D Input Polarity Invert Registers (GPIO96 to 127)unionGPDODR_REGGPDODR;// GPIO D Open Drain Output Register (GPIO96 to GPIO127)Uint16rsvd14[12];// ReservedunionGPDGMUX1_REGGPDGMUX1;// GPIO D Peripheral Group Mux (GPIO96 to 111)unionGPDGMUX2_REGGPDGMUX2;// GPIO D Peripheral Group Mux (GPIO112 to 127)Uint16rsvd15[4];// ReservedunionGPDCSEL1_REGGPDCSEL1;// GPIO D Core Select Register (GPIO96 to 103)unionGPDCSEL2_REGGPDCSEL2;// GPIO D Core Select Register (GPIO104 to 111)unionGPDCSEL3_REGGPDCSEL3;// GPIO D Core Select Register (GPIO112 to 119)unionGPDCSEL4_REGGPDCSEL4;// GPIO D Core Select Register (GPIO120 to 127)Uint16rsvd16[12];// ReservedunionGPDLOCK_REGGPDLOCK;// GPIO D Lock Configuration Register (GPIO96 to 127)unionGPDCR_REGGPDCR;// GPIO D Lock Commit Register (GPIO96 to 127)unionGPECTRL_REGGPECTRL;// GPIO E Qualification Sampling Period Control (GPIO128 to 159)unionGPEQSEL1_REGGPEQSEL1;// GPIO E Qualifier Select 1 Register (GPIO128 to 143)unionGPEQSEL2_REGGPEQSEL2;// GPIO E Qualifier Select 2 Register (GPIO144to 159)unionGPEMUX1_REGGPEMUX1;// GPIO E Mux 1 Register (GPIO128 to 143)unionGPEMUX2_REGGPEMUX2;// GPIO E Mux 2 Register (GPIO144to 159)unionGPEDIR_REGGPEDIR;// GPIO E Direction Register (GPIO128 to 159)unionGPEPUD_REGGPEPUD;// GPIO E Pull Up Disable Register (GPIO128 to 159)Uint16rsvd17[2];// ReservedunionGPEINV_REGGPEINV;// GPIO E Input Polarity Invert Registers (GPIO128 to 159)unionGPEODR_REGGPEODR;// GPIO E Open Drain Output Register (GPIO128 to GPIO159)Uint16rsvd18[12];// ReservedunionGPEGMUX1_REGGPEGMUX1;// GPIO E Peripheral Group Mux (GPIO128 to 143)unionGPEGMUX2_REGGPEGMUX2;// GPIO E Peripheral Group Mux (GPIO144to 159)Uint16rsvd19[4];// ReservedunionGPECSEL1_REGGPECSEL1;// GPIO E Core Select Register (GPIO128 to 135)unionGPECSEL2_REGGPECSEL2;// GPIO E Core Select Register (GPIO136 to 143)unionGPECSEL3_REGGPECSEL3;// GPIO E Core Select Register (GPIO144to 151)unionGPECSEL4_REGGPECSEL4;// GPIO E Core Select Register (GPIO152 to 159)Uint16rsvd20[12];// ReservedunionGPELOCK_REGGPELOCK;// GPIO E Lock Configuration Register (GPIO128 to 159)unionGPECR_REGGPECR;// GPIO E Lock Commit Register (GPIO128 to 159)unionGPFCTRL_REGGPFCTRL;// GPIO F Qualification Sampling Period Control (GPIO160 to 168)unionGPFQSEL1_REGGPFQSEL1;// GPIO F Qualifier Select 1 Register (GPIO160 to 168)Uint16rsvd21[2];// ReservedunionGPFMUX1_REGGPFMUX1;// GPIO F Mux 1 Register (GPIO160 to 168)Uint16rsvd22[2];// ReservedunionGPFDIR_REGGPFDIR;// GPIO F Direction Register (GPIO160 to 168)unionGPFPUD_REGGPFPUD;// GPIO F Pull Up Disable Register (GPIO160 to 168)Uint16rsvd23[2];// ReservedunionGPFINV_REGGPFINV;// GPIO F Input Polarity Invert Registers (GPIO160 to 168)unionGPFODR_REGGPFODR;// GPIO F Open Drain Output Register (GPIO160 to GPIO168)Uint16rsvd24[12];// ReservedunionGPFGMUX1_REGGPFGMUX1;// GPIO F Peripheral Group Mux (GPIO160 to 168)Uint16rsvd25[6];// ReservedunionGPFCSEL1_REGGPFCSEL1;// GPIO F Core Select Register (GPIO160 to 167)unionGPFCSEL2_REGGPFCSEL2;// GPIO F Core Select Register (GPIO168)Uint16rsvd26[16];// ReservedunionGPFLOCK_REGGPFLOCK;// GPIO F Lock Configuration Register (GPIO160 to 168)unionGPFCR_REGGPFCR;// GPIO F Lock Commit Register (GPIO160 to 168)
};struct GPADAT_BITS {// bits descriptionUint16 GPIO0:1;// 0 Data Register for this pinUint16 GPIO1:1;// 1 Data Register for this pinUint16 GPIO2:1;// 2 Data Register for this pinUint16 GPIO3:1;// 3 Data Register for this pinUint16 GPIO4:1;// 4 Data Register for this pinUint16 GPIO5:1;// 5 Data Register for this pinUint16 GPIO6:1;// 6 Data Register for this pinUint16 GPIO7:1;// 7 Data Register for this pinUint16 GPIO8:1;// 8 Data Register for this pinUint16 GPIO9:1;// 9 Data Register for this pinUint16 GPIO10:1;// 10 Data Register for this pinUint16 GPIO11:1;// 11 Data Register for this pinUint16 GPIO12:1;// 12 Data Register for this pinUint16 GPIO13:1;// 13 Data Register for this pinUint16 GPIO14:1;// 14 Data Register for this pinUint16 GPIO15:1;// 15 Data Register for this pinUint16 GPIO16:1;// 16 Data Register for this pinUint16 GPIO17:1;// 17 Data Register for this pinUint16 GPIO18:1;// 18 Data Register for this pinUint16 GPIO19:1;// 19 Data Register for this pinUint16 GPIO20:1;// 20 Data Register for this pinUint16 GPIO21:1;// 21 Data Register for this pinUint16 GPIO22:1;// 22 Data Register for this pinUint16 GPIO23:1;// 23 Data Register for this pinUint16 GPIO24:1;// 24 Data Register for this pinUint16 GPIO25:1;// 25 Data Register for this pinUint16 GPIO26:1;// 26 Data Register for this pinUint16 GPIO27:1;// 27 Data Register for this pinUint16 GPIO28:1;// 28 Data Register for this pinUint16 GPIO29:1;// 29 Data Register for this pinUint16 GPIO30:1;// 30 Data Register for this pinUint16 GPIO31:1;// 31 Data Register for this pin
};union GPADAT_REG {Uint32all;structGPADAT_BITSbit;
};struct GPASET_BITS {// bits descriptionUint16 GPIO0:1;// 0 Output Set bit for this pinUint16 GPIO1:1;// 1 Output Set bit for this pinUint16 GPIO2:1;// 2 Output Set bit for this pinUint16 GPIO3:1;// 3 Output Set bit for this pinUint16 GPIO4:1;// 4 Output Set bit for this pinUint16 GPIO5:1;// 5 Output Set bit for this pinUint16 GPIO6:1;// 6 Output Set bit for this pinUint16 GPIO7:1;// 7 Output Set bit for this pinUint16 GPIO8:1;// 8 Output Set bit for this pinUint16 GPIO9:1;// 9 Output Set bit for this pinUint16 GPIO10:1;// 10 Output Set bit for this pinUint16 GPIO11:1;// 11 Output Set bit for this pinUint16 GPIO12:1;// 12 Output Set bit for this pinUint16 GPIO13:1;// 13 Output Set bit for this pinUint16 GPIO14:1;// 14 Output Set bit for this pinUint16 GPIO15:1;// 15 Output Set bit for this pinUint16 GPIO16:1;// 16 Output Set bit for this pinUint16 GPIO17:1;// 17 Output Set bit for this pinUint16 GPIO18:1;// 18 Output Set bit for this pinUint16 GPIO19:1;// 19 Output Set bit for this pinUint16 GPIO20:1;// 20 Output Set bit for this pinUint16 GPIO21:1;// 21 Output Set bit for this pinUint16 GPIO22:1;// 22 Output Set bit for this pinUint16 GPIO23:1;// 23 Output Set bit for this pinUint16 GPIO24:1;// 24 Output Set bit for this pinUint16 GPIO25:1;// 25 Output Set bit for this pinUint16 GPIO26:1;// 26 Output Set bit for this pinUint16 GPIO27:1;// 27 Output Set bit for this pinUint16 GPIO28:1;// 28 Output Set bit for this pinUint16 GPIO29:1;// 29 Output Set bit for this pinUint16 GPIO30:1;// 30 Output Set bit for this pinUint16 GPIO31:1;// 31 Output Set bit for this pin
};union GPASET_REG {Uint32all;structGPASET_BITSbit;
};struct GPACLEAR_BITS {// bits descriptionUint16 GPIO0:1;// 0 Output Clear bit for this pinUint16 GPIO1:1;// 1 Output Clear bit for this pinUint16 GPIO2:1;// 2 Output Clear bit for this pinUint16 GPIO3:1;// 3 Output Clear bit for this pinUint16 GPIO4:1;// 4 Output Clear bit for this pinUint16 GPIO5:1;// 5 Output Clear bit for this pinUint16 GPIO6:1;// 6 Output Clear bit for this pinUint16 GPIO7:1;// 7 Output Clear bit for this pinUint16 GPIO8:1;// 8 Output Clear bit for this pinUint16 GPIO9:1;// 9 Output Clear bit for this pinUint16 GPIO10:1;// 10 Output Clear bit for this pinUint16 GPIO11:1;// 11 Output Clear bit for this pinUint16 GPIO12:1;// 12 Output Clear bit for this pinUint16 GPIO13:1;// 13 Output Clear bit for this pinUint16 GPIO14:1;// 14 Output Clear bit for this pinUint16 GPIO15:1;// 15 Output Clear bit for this pinUint16 GPIO16:1;// 16 Output Clear bit for this pinUint16 GPIO17:1;// 17 Output Clear bit for this pinUint16 GPIO18:1;// 18 Output Clear bit for this pinUint16 GPIO19:1;// 19 Output Clear bit for this pinUint16 GPIO20:1;// 20 Output Clear bit for this pinUint16 GPIO21:1;// 21 Output Clear bit for this pinUint16 GPIO22:1;// 22 Output Clear bit for this pinUint16 GPIO23:1;// 23 Output Clear bit for this pinUint16 GPIO24:1;// 24 Output Clear bit for this pinUint16 GPIO25:1;// 25 Output Clear bit for this pinUint16 GPIO26:1;// 26 Output Clear bit for this pinUint16 GPIO27:1;// 27 Output Clear bit for this pinUint16 GPIO28:1;// 28 Output Clear bit for this pinUint16 GPIO29:1;// 29 Output Clear bit for this pinUint16 GPIO30:1;// 30 Output Clear bit for this pinUint16 GPIO31:1;// 31 Output Clear bit for this pin
};union GPACLEAR_REG {Uint32all;structGPACLEAR_BITSbit;
};struct GPATOGGLE_BITS {// bits descriptionUint16 GPIO0:1;// 0 Output Toggle bit for this pinUint16 GPIO1:1;// 1 Output Toggle bit for this pinUint16 GPIO2:1;// 2 Output Toggle bit for this pinUint16 GPIO3:1;// 3 Output Toggle bit for this pinUint16 GPIO4:1;// 4 Output Toggle bit for this pinUint16 GPIO5:1;// 5 Output Toggle bit for this pinUint16 GPIO6:1;// 6 Output Toggle bit for this pinUint16 GPIO7:1;// 7 Output Toggle bit for this pinUint16 GPIO8:1;// 8 Output Toggle bit for this pinUint16 GPIO9:1;// 9 Output Toggle bit for this pinUint16 GPIO10:1;// 10 Output Toggle bit for this pinUint16 GPIO11:1;// 11 Output Toggle bit for this pinUint16 GPIO12:1;// 12 Output Toggle bit for this pinUint16 GPIO13:1;// 13 Output Toggle bit for this pinUint16 GPIO14:1;// 14 Output Toggle bit for this pinUint16 GPIO15:1;// 15 Output Toggle bit for this pinUint16 GPIO16:1;// 16 Output Toggle bit for this pinUint16 GPIO17:1;// 17 Output Toggle bit for this pinUint16 GPIO18:1;// 18 Output Toggle bit for this pinUint16 GPIO19:1;// 19 Output Toggle bit for this pinUint16 GPIO20:1;// 20 Output Toggle bit for this pinUint16 GPIO21:1;// 21 Output Toggle bit for this pinUint16 GPIO22:1;// 22 Output Toggle bit for this pinUint16 GPIO23:1;// 23 Output Toggle bit for this pinUint16 GPIO24:1;// 24 Output Toggle bit for this pinUint16 GPIO25:1;// 25 Output Toggle bit for this pinUint16 GPIO26:1;// 26 Output Toggle bit for this pinUint16 GPIO27:1;// 27 Output Toggle bit for this pinUint16 GPIO28:1;// 28 Output Toggle bit for this pinUint16 GPIO29:1;// 29 Output Toggle bit for this pinUint16 GPIO30:1;// 30 Output Toggle bit for this pinUint16 GPIO31:1;// 31 Output Toggle bit for this pin
};union GPATOGGLE_REG {Uint32all;structGPATOGGLE_BITSbit;
};struct GPBDAT_BITS {// bits descriptionUint16 GPIO32:1;// 0 Data Register for this pinUint16 GPIO33:1;// 1 Data Register for this pinUint16 GPIO34:1;// 2 Data Register for this pinUint16 GPIO35:1;// 3 Data Register for this pinUint16 GPIO36:1;// 4 Data Register for this pinUint16 GPIO37:1;// 5 Data Register for this pinUint16 GPIO38:1;// 6 Data Register for this pinUint16 GPIO39:1;// 7 Data Register for this pinUint16 GPIO40:1;// 8 Data Register for this pinUint16 GPIO41:1;// 9 Data Register for this pinUint16 GPIO42:1;// 10 Data Register for this pinUint16 GPIO43:1;// 11 Data Register for this pinUint16 GPIO44:1;// 12 Data Register for this pinUint16 GPIO45:1;// 13 Data Register for this pinUint16 GPIO46:1;// 14 Data Register for this pinUint16 GPIO47:1;// 15 Data Register for this pinUint16 GPIO48:1;// 16 Data Register for this pinUint16 GPIO49:1;// 17 Data Register for this pinUint16 GPIO50:1;// 18 Data Register for this pinUint16 GPIO51:1;// 19 Data Register for this pinUint16 GPIO52:1;// 20 Data Register for this pinUint16 GPIO53:1;// 21 Data Register for this pinUint16 GPIO54:1;// 22 Data Register for this pinUint16 GPIO55:1;// 23 Data Register for this pinUint16 GPIO56:1;// 24 Data Register for this pinUint16 GPIO57:1;// 25 Data Register for this pinUint16 GPIO58:1;// 26 Data Register for this pinUint16 GPIO59:1;// 27 Data Register for this pinUint16 GPIO60:1;// 28 Data Register for this pinUint16 GPIO61:1;// 29 Data Register for this pinUint16 GPIO62:1;// 30 Data Register for this pinUint16 GPIO63:1;// 31 Data Register for this pin
};union GPBDAT_REG {Uint32all;structGPBDAT_BITSbit;
};struct GPBSET_BITS {// bits descriptionUint16 GPIO32:1;// 0 Output Set bit for this pinUint16 GPIO33:1;// 1 Output Set bit for this pinUint16 GPIO34:1;// 2 Output Set bit for this pinUint16 GPIO35:1;// 3 Output Set bit for this pinUint16 GPIO36:1;// 4 Output Set bit for this pinUint16 GPIO37:1;// 5 Output Set bit for this pinUint16 GPIO38:1;// 6 Output Set bit for this pinUint16 GPIO39:1;// 7 Output Set bit for this pinUint16 GPIO40:1;// 8 Output Set bit for this pinUint16 GPIO41:1;// 9 Output Set bit for this pinUint16 GPIO42:1;// 10 Output Set bit for this pinUint16 GPIO43:1;// 11 Output Set bit for this pinUint16 GPIO44:1;// 12 Output Set bit for this pinUint16 GPIO45:1;// 13 Output Set bit for this pinUint16 GPIO46:1;// 14 Output Set bit for this pinUint16 GPIO47:1;// 15 Output Set bit for this pinUint16 GPIO48:1;// 16 Output Set bit for this pinUint16 GPIO49:1;// 17 Output Set bit for this pinUint16 GPIO50:1;// 18 Output Set bit for this pinUint16 GPIO51:1;// 19 Output Set bit for this pinUint16 GPIO52:1;// 20 Output Set bit for this pinUint16 GPIO53:1;// 21 Output Set bit for this pinUint16 GPIO54:1;// 22 Output Set bit for this pinUint16 GPIO55:1;// 23 Output Set bit for this pinUint16 GPIO56:1;// 24 Output Set bit for this pinUint16 GPIO57:1;// 25 Output Set bit for this pinUint16 GPIO58:1;// 26 Output Set bit for this pinUint16 GPIO59:1;// 27 Output Set bit for this pinUint16 GPIO60:1;// 28 Output Set bit for this pinUint16 GPIO61:1;// 29 Output Set bit for this pinUint16 GPIO62:1;// 30 Output Set bit for this pinUint16 GPIO63:1;// 31 Output Set bit for this pin
};union GPBSET_REG {Uint32all;structGPBSET_BITSbit;
};struct GPBCLEAR_BITS {// bits descriptionUint16 GPIO32:1;// 0 Output Clear bit for this pinUint16 GPIO33:1;// 1 Output Clear bit for this pinUint16 GPIO34:1;// 2 Output Clear bit for this pinUint16 GPIO35:1;// 3 Output Clear bit for this pinUint16 GPIO36:1;// 4 Output Clear bit for this pinUint16 GPIO37:1;// 5 Output Clear bit for this pinUint16 GPIO38:1;// 6 Output Clear bit for this pinUint16 GPIO39:1;// 7 Output Clear bit for this pinUint16 GPIO40:1;// 8 Output Clear bit for this pinUint16 GPIO41:1;// 9 Output Clear bit for this pinUint16 GPIO42:1;// 10 Output Clear bit for this pinUint16 GPIO43:1;// 11 Output Clear bit for this pinUint16 GPIO44:1;// 12 Output Clear bit for this pinUint16 GPIO45:1;// 13 Output Clear bit for this pinUint16 GPIO46:1;// 14 Output Clear bit for this pinUint16 GPIO47:1;// 15 Output Clear bit for this pinUint16 GPIO48:1;// 16 Output Clear bit for this pinUint16 GPIO49:1;// 17 Output Clear bit for this pinUint16 GPIO50:1;// 18 Output Clear bit for this pinUint16 GPIO51:1;// 19 Output Clear bit for this pinUint16 GPIO52:1;// 20 Output Clear bit for this pinUint16 GPIO53:1;// 21 Output Clear bit for this pinUint16 GPIO54:1;// 22 Output Clear bit for this pinUint16 GPIO55:1;// 23 Output Clear bit for this pinUint16 GPIO56:1;// 24 Output Clear bit for this pinUint16 GPIO57:1;// 25 Output Clear bit for this pinUint16 GPIO58:1;// 26 Output Clear bit for this pinUint16 GPIO59:1;// 27 Output Clear bit for this pinUint16 GPIO60:1;// 28 Output Clear bit for this pinUint16 GPIO61:1;// 29 Output Clear bit for this pinUint16 GPIO62:1;// 30 Output Clear bit for this pinUint16 GPIO63:1;// 31 Output Clear bit for this pin
};union GPBCLEAR_REG {Uint32all;structGPBCLEAR_BITSbit;
};struct GPBTOGGLE_BITS {// bits descriptionUint16 GPIO32:1;// 0 Output Toggle bit for this pinUint16 GPIO33:1;// 1 Output Toggle bit for this pinUint16 GPIO34:1;// 2 Output Toggle bit for this pinUint16 GPIO35:1;// 3 Output Toggle bit for this pinUint16 GPIO36:1;// 4 Output Toggle bit for this pinUint16 GPIO37:1;// 5 Output Toggle bit for this pinUint16 GPIO38:1;// 6 Output Toggle bit for this pinUint16 GPIO39:1;// 7 Output Toggle bit for this pinUint16 GPIO40:1;// 8 Output Toggle bit for this pinUint16 GPIO41:1;// 9 Output Toggle bit for this pinUint16 GPIO42:1;// 10 Output Toggle bit for this pinUint16 GPIO43:1;// 11 Output Toggle bit for this pinUint16 GPIO44:1;// 12 Output Toggle bit for this pinUint16 GPIO45:1;// 13 Output Toggle bit for this pinUint16 GPIO46:1;// 14 Output Toggle bit for this pinUint16 GPIO47:1;// 15 Output Toggle bit for this pinUint16 GPIO48:1;// 16 Output Toggle bit for this pinUint16 GPIO49:1;// 17 Output Toggle bit for this pinUint16 GPIO50:1;// 18 Output Toggle bit for this pinUint16 GPIO51:1;// 19 Output Toggle bit for this pinUint16 GPIO52:1;// 20 Output Toggle bit for this pinUint16 GPIO53:1;// 21 Output Toggle bit for this pinUint16 GPIO54:1;// 22 Output Toggle bit for this pinUint16 GPIO55:1;// 23 Output Toggle bit for this pinUint16 GPIO56:1;// 24 Output Toggle bit for this pinUint16 GPIO57:1;// 25 Output Toggle bit for this pinUint16 GPIO58:1;// 26 Output Toggle bit for this pinUint16 GPIO59:1;// 27 Output Toggle bit for this pinUint16 GPIO60:1;// 28 Output Toggle bit for this pinUint16 GPIO61:1;// 29 Output Toggle bit for this pinUint16 GPIO62:1;// 30 Output Toggle bit for this pinUint16 GPIO63:1;// 31 Output Toggle bit for this pin
};union GPBTOGGLE_REG {Uint32all;structGPBTOGGLE_BITSbit;
};struct GPCDAT_BITS {// bits descriptionUint16 GPIO64:1;// 0 Data Register for this pinUint16 GPIO65:1;// 1 Data Register for this pinUint16 GPIO66:1;// 2 Data Register for this pinUint16 GPIO67:1;// 3 Data Register for this pinUint16 GPIO68:1;// 4 Data Register for this pinUint16 GPIO69:1;// 5 Data Register for this pinUint16 GPIO70:1;// 6 Data Register for this pinUint16 GPIO71:1;// 7 Data Register for this pinUint16 GPIO72:1;// 8 Data Register for this pinUint16 GPIO73:1;// 9 Data Register for this pinUint16 GPIO74:1;// 10 Data Register for this pinUint16 GPIO75:1;// 11 Data Register for this pinUint16 GPIO76:1;// 12 Data Register for this pinUint16 GPIO77:1;// 13 Data Register for this pinUint16 GPIO78:1;// 14 Data Register for this pinUint16 GPIO79:1;// 15 Data Register for this pinUint16 GPIO80:1;// 16 Data Register for this pinUint16 GPIO81:1;// 17 Data Register for this pinUint16 GPIO82:1;// 18 Data Register for this pinUint16 GPIO83:1;// 19 Data Register for this pinUint16 GPIO84:1;// 20 Data Register for this pinUint16 GPIO85:1;// 21 Data Register for this pinUint16 GPIO86:1;// 22 Data Register for this pinUint16 GPIO87:1;// 23 Data Register for this pinUint16 GPIO88:1;// 24 Data Register for this pinUint16 GPIO89:1;// 25 Data Register for this pinUint16 GPIO90:1;// 26 Data Register for this pinUint16 GPIO91:1;// 27 Data Register for this pinUint16 GPIO92:1;// 28 Data Register for this pinUint16 GPIO93:1;// 29 Data Register for this pinUint16 GPIO94:1;// 30 Data Register for this pinUint16 GPIO95:1;// 31 Data Register for this pin
};union GPCDAT_REG {Uint32all;structGPCDAT_BITSbit;
};struct GPCSET_BITS {// bits descriptionUint16 GPIO64:1;// 0 Output Set bit for this pinUint16 GPIO65:1;// 1 Output Set bit for this pinUint16 GPIO66:1;// 2 Output Set bit for this pinUint16 GPIO67:1;// 3 Output Set bit for this pinUint16 GPIO68:1;// 4 Output Set bit for this pinUint16 GPIO69:1;// 5 Output Set bit for this pinUint16 GPIO70:1;// 6 Output Set bit for this pinUint16 GPIO71:1;// 7 Output Set bit for this pinUint16 GPIO72:1;// 8 Output Set bit for this pinUint16 GPIO73:1;// 9 Output Set bit for this pinUint16 GPIO74:1;// 10 Output Set bit for this pinUint16 GPIO75:1;// 11 Output Set bit for this pinUint16 GPIO76:1;// 12 Output Set bit for this pinUint16 GPIO77:1;// 13 Output Set bit for this pinUint16 GPIO78:1;// 14 Output Set bit for this pinUint16 GPIO79:1;// 15 Output Set bit for this pinUint16 GPIO80:1;// 16 Output Set bit for this pinUint16 GPIO81:1;// 17 Output Set bit for this pinUint16 GPIO82:1;// 18 Output Set bit for this pinUint16 GPIO83:1;// 19 Output Set bit for this pinUint16 GPIO84:1;// 20 Output Set bit for this pinUint16 GPIO85:1;// 21 Output Set bit for this pinUint16 GPIO86:1;// 22 Output Set bit for this pinUint16 GPIO87:1;// 23 Output Set bit for this pinUint16 GPIO88:1;// 24 Output Set bit for this pinUint16 GPIO89:1;// 25 Output Set bit for this pinUint16 GPIO90:1;// 26 Output Set bit for this pinUint16 GPIO91:1;// 27 Output Set bit for this pinUint16 GPIO92:1;// 28 Output Set bit for this pinUint16 GPIO93:1;// 29 Output Set bit for this pinUint16 GPIO94:1;// 30 Output Set bit for this pinUint16 GPIO95:1;// 31 Output Set bit for this pin
};union GPCSET_REG {Uint32all;structGPCSET_BITSbit;
};struct GPCCLEAR_BITS {// bits descriptionUint16 GPIO64:1;// 0 Output Clear bit for this pinUint16 GPIO65:1;// 1 Output Clear bit for this pinUint16 GPIO66:1;// 2 Output Clear bit for this pinUint16 GPIO67:1;// 3 Output Clear bit for this pinUint16 GPIO68:1;// 4 Output Clear bit for this pinUint16 GPIO69:1;// 5 Output Clear bit for this pinUint16 GPIO70:1;// 6 Output Clear bit for this pinUint16 GPIO71:1;// 7 Output Clear bit for this pinUint16 GPIO72:1;// 8 Output Clear bit for this pinUint16 GPIO73:1;// 9 Output Clear bit for this pinUint16 GPIO74:1;// 10 Output Clear bit for this pinUint16 GPIO75:1;// 11 Output Clear bit for this pinUint16 GPIO76:1;// 12 Output Clear bit for this pinUint16 GPIO77:1;// 13 Output Clear bit for this pinUint16 GPIO78:1;// 14 Output Clear bit for this pinUint16 GPIO79:1;// 15 Output Clear bit for this pinUint16 GPIO80:1;// 16 Output Clear bit for this pinUint16 GPIO81:1;// 17 Output Clear bit for this pinUint16 GPIO82:1;// 18 Output Clear bit for this pinUint16 GPIO83:1;// 19 Output Clear bit for this pinUint16 GPIO84:1;// 20 Output Clear bit for this pinUint16 GPIO85:1;// 21 Output Clear bit for this pinUint16 GPIO86:1;// 22 Output Clear bit for this pinUint16 GPIO87:1;// 23 Output Clear bit for this pinUint16 GPIO88:1;// 24 Output Clear bit for this pinUint16 GPIO89:1;// 25 Output Clear bit for this pinUint16 GPIO90:1;// 26 Output Clear bit for this pinUint16 GPIO91:1;// 27 Output Clear bit for this pinUint16 GPIO92:1;// 28 Output Clear bit for this pinUint16 GPIO93:1;// 29 Output Clear bit for this pinUint16 GPIO94:1;// 30 Output Clear bit for this pinUint16 GPIO95:1;// 31 Output Clear bit for this pin
};union GPCCLEAR_REG {Uint32all;structGPCCLEAR_BITSbit;
};struct GPCTOGGLE_BITS {// bits descriptionUint16 GPIO64:1;// 0 Output Toggle bit for this pinUint16 GPIO65:1;// 1 Output Toggle bit for this pinUint16 GPIO66:1;// 2 Output Toggle bit for this pinUint16 GPIO67:1;// 3 Output Toggle bit for this pinUint16 GPIO68:1;// 4 Output Toggle bit for this pinUint16 GPIO69:1;// 5 Output Toggle bit for this pinUint16 GPIO70:1;// 6 Output Toggle bit for this pinUint16 GPIO71:1;// 7 Output Toggle bit for this pinUint16 GPIO72:1;// 8 Output Toggle bit for this pinUint16 GPIO73:1;// 9 Output Toggle bit for this pinUint16 GPIO74:1;// 10 Output Toggle bit for this pinUint16 GPIO75:1;// 11 Output Toggle bit for this pinUint16 GPIO76:1;// 12 Output Toggle bit for this pinUint16 GPIO77:1;// 13 Output Toggle bit for this pinUint16 GPIO78:1;// 14 Output Toggle bit for this pinUint16 GPIO79:1;// 15 Output Toggle bit for this pinUint16 GPIO80:1;// 16 Output Toggle bit for this pinUint16 GPIO81:1;// 17 Output Toggle bit for this pinUint16 GPIO82:1;// 18 Output Toggle bit for this pinUint16 GPIO83:1;// 19 Output Toggle bit for this pinUint16 GPIO84:1;// 20 Output Toggle bit for this pinUint16 GPIO85:1;// 21 Output Toggle bit for this pinUint16 GPIO86:1;// 22 Output Toggle bit for this pinUint16 GPIO87:1;// 23 Output Toggle bit for this pinUint16 GPIO88:1;// 24 Output Toggle bit for this pinUint16 GPIO89:1;// 25 Output Toggle bit for this pinUint16 GPIO90:1;// 26 Output Toggle bit for this pinUint16 GPIO91:1;// 27 Output Toggle bit for this pinUint16 GPIO92:1;// 28 Output Toggle bit for this pinUint16 GPIO93:1;// 29 Output Toggle bit for this pinUint16 GPIO94:1;// 30 Output Toggle bit for this pinUint16 GPIO95:1;// 31 Output Toggle bit for this pin
};union GPCTOGGLE_REG {Uint32all;structGPCTOGGLE_BITSbit;
};struct GPDDAT_BITS {// bits descriptionUint16 GPIO96:1;// 0 Data Register for this pinUint16 GPIO97:1;// 1 Data Register for this pinUint16 GPIO98:1;// 2 Data Register for this pinUint16 GPIO99:1;// 3 Data Register for this pinUint16 GPIO100:1;// 4 Data Register for this pinUint16 GPIO101:1;// 5 Data Register for this pinUint16 GPIO102:1;// 6 Data Register for this pinUint16 GPIO103:1;// 7 Data Register for this pinUint16 GPIO104:1;// 8 Data Register for this pinUint16 GPIO105:1;// 9 Data Register for this pinUint16 GPIO106:1;// 10 Data Register for this pinUint16 GPIO107:1;// 11 Data Register for this pinUint16 GPIO108:1;// 12 Data Register for this pinUint16 GPIO109:1;// 13 Data Register for this pinUint16 GPIO110:1;// 14 Data Register for this pinUint16 GPIO111:1;// 15 Data Register for this pinUint16 GPIO112:1;// 16 Data Register for this pinUint16 GPIO113:1;// 17 Data Register for this pinUint16 GPIO114:1;// 18 Data Register for this pinUint16 GPIO115:1;// 19 Data Register for this pinUint16 GPIO116:1;// 20 Data Register for this pinUint16 GPIO117:1;// 21 Data Register for this pinUint16 GPIO118:1;// 22 Data Register for this pinUint16 GPIO119:1;// 23 Data Register for this pinUint16 GPIO120:1;// 24 Data Register for this pinUint16 GPIO121:1;// 25 Data Register for this pinUint16 GPIO122:1;// 26 Data Register for this pinUint16 GPIO123:1;// 27 Data Register for this pinUint16 GPIO124:1;// 28 Data Register for this pinUint16 GPIO125:1;// 29 Data Register for this pinUint16 GPIO126:1;// 30 Data Register for this pinUint16 GPIO127:1;// 31 Data Register for this pin
};union GPDDAT_REG {Uint32all;structGPDDAT_BITSbit;
};struct GPDSET_BITS {// bits descriptionUint16 GPIO96:1;// 0 Output Set bit for this pinUint16 GPIO97:1;// 1 Output Set bit for this pinUint16 GPIO98:1;// 2 Output Set bit for this pinUint16 GPIO99:1;// 3 Output Set bit for this pinUint16 GPIO100:1;// 4 Output Set bit for this pinUint16 GPIO101:1;// 5 Output Set bit for this pinUint16 GPIO102:1;// 6 Output Set bit for this pinUint16 GPIO103:1;// 7 Output Set bit for this pinUint16 GPIO104:1;// 8 Output Set bit for this pinUint16 GPIO105:1;// 9 Output Set bit for this pinUint16 GPIO106:1;// 10 Output Set bit for this pinUint16 GPIO107:1;// 11 Output Set bit for this pinUint16 GPIO108:1;// 12 Output Set bit for this pinUint16 GPIO109:1;// 13 Output Set bit for this pinUint16 GPIO110:1;// 14 Output Set bit for this pinUint16 GPIO111:1;// 15 Output Set bit for this pinUint16 GPIO112:1;// 16 Output Set bit for this pinUint16 GPIO113:1;// 17 Output Set bit for this pinUint16 GPIO114:1;// 18 Output Set bit for this pinUint16 GPIO115:1;// 19 Output Set bit for this pinUint16 GPIO116:1;// 20 Output Set bit for this pinUint16 GPIO117:1;// 21 Output Set bit for this pinUint16 GPIO118:1;// 22 Output Set bit for this pinUint16 GPIO119:1;// 23 Output Set bit for this pinUint16 GPIO120:1;// 24 Output Set bit for this pinUint16 GPIO121:1;// 25 Output Set bit for this pinUint16 GPIO122:1;// 26 Output Set bit for this pinUint16 GPIO123:1;// 27 Output Set bit for this pinUint16 GPIO124:1;// 28 Output Set bit for this pinUint16 GPIO125:1;// 29 Output Set bit for this pinUint16 GPIO126:1;// 30 Output Set bit for this pinUint16 GPIO127:1;// 31 Output Set bit for this pin
};union GPDSET_REG {Uint32all;structGPDSET_BITSbit;
};struct GPDCLEAR_BITS {// bits descriptionUint16 GPIO96:1;// 0 Output Clear bit for this pinUint16 GPIO97:1;// 1 Output Clear bit for this pinUint16 GPIO98:1;// 2 Output Clear bit for this pinUint16 GPIO99:1;// 3 Output Clear bit for this pinUint16 GPIO100:1;// 4 Output Clear bit for this pinUint16 GPIO101:1;// 5 Output Clear bit for this pinUint16 GPIO102:1;// 6 Output Clear bit for this pinUint16 GPIO103:1;// 7 Output Clear bit for this pinUint16 GPIO104:1;// 8 Output Clear bit for this pinUint16 GPIO105:1;// 9 Output Clear bit for this pinUint16 GPIO106:1;// 10 Output Clear bit for this pinUint16 GPIO107:1;// 11 Output Clear bit for this pinUint16 GPIO108:1;// 12 Output Clear bit for this pinUint16 GPIO109:1;// 13 Output Clear bit for this pinUint16 GPIO110:1;// 14 Output Clear bit for this pinUint16 GPIO111:1;// 15 Output Clear bit for this pinUint16 GPIO112:1;// 16 Output Clear bit for this pinUint16 GPIO113:1;// 17 Output Clear bit for this pinUint16 GPIO114:1;// 18 Output Clear bit for this pinUint16 GPIO115:1;// 19 Output Clear bit for this pinUint16 GPIO116:1;// 20 Output Clear bit for this pinUint16 GPIO117:1;// 21 Output Clear bit for this pinUint16 GPIO118:1;// 22 Output Clear bit for this pinUint16 GPIO119:1;// 23 Output Clear bit for this pinUint16 GPIO120:1;// 24 Output Clear bit for this pinUint16 GPIO121:1;// 25 Output Clear bit for this pinUint16 GPIO122:1;// 26 Output Clear bit for this pinUint16 GPIO123:1;// 27 Output Clear bit for this pinUint16 GPIO124:1;// 28 Output Clear bit for this pinUint16 GPIO125:1;// 29 Output Clear bit for this pinUint16 GPIO126:1;// 30 Output Clear bit for this pinUint16 GPIO127:1;// 31 Output Clear bit for this pin
};union GPDCLEAR_REG {Uint32all;structGPDCLEAR_BITSbit;
};struct GPDTOGGLE_BITS {// bits descriptionUint16 GPIO96:1;// 0 Output Toggle bit for this pinUint16 GPIO97:1;// 1 Output Toggle bit for this pinUint16 GPIO98:1;// 2 Output Toggle bit for this pinUint16 GPIO99:1;// 3 Output Toggle bit for this pinUint16 GPIO100:1;// 4 Output Toggle bit for this pinUint16 GPIO101:1;// 5 Output Toggle bit for this pinUint16 GPIO102:1;// 6 Output Toggle bit for this pinUint16 GPIO103:1;// 7 Output Toggle bit for this pinUint16 GPIO104:1;// 8 Output Toggle bit for this pinUint16 GPIO105:1;// 9 Output Toggle bit for this pinUint16 GPIO106:1;// 10 Output Toggle bit for this pinUint16 GPIO107:1;// 11 Output Toggle bit for this pinUint16 GPIO108:1;// 12 Output Toggle bit for this pinUint16 GPIO109:1;// 13 Output Toggle bit for this pinUint16 GPIO110:1;// 14 Output Toggle bit for this pinUint16 GPIO111:1;// 15 Output Toggle bit for this pinUint16 GPIO112:1;// 16 Output Toggle bit for this pinUint16 GPIO113:1;// 17 Output Toggle bit for this pinUint16 GPIO114:1;// 18 Output Toggle bit for this pinUint16 GPIO115:1;// 19 Output Toggle bit for this pinUint16 GPIO116:1;// 20 Output Toggle bit for this pinUint16 GPIO117:1;// 21 Output Toggle bit for this pinUint16 GPIO118:1;// 22 Output Toggle bit for this pinUint16 GPIO119:1;// 23 Output Toggle bit for this pinUint16 GPIO120:1;// 24 Output Toggle bit for this pinUint16 GPIO121:1;// 25 Output Toggle bit for this pinUint16 GPIO122:1;// 26 Output Toggle bit for this pinUint16 GPIO123:1;// 27 Output Toggle bit for this pinUint16 GPIO124:1;// 28 Output Toggle bit for this pinUint16 GPIO125:1;// 29 Output Toggle bit for this pinUint16 GPIO126:1;// 30 Output Toggle bit for this pinUint16 GPIO127:1;// 31 Output Toggle bit for this pin
};union GPDTOGGLE_REG {Uint32all;structGPDTOGGLE_BITSbit;
};struct GPEDAT_BITS {// bits descriptionUint16 GPIO128:1;// 0 Data Register for this pinUint16 GPIO129:1;// 1 Data Register for this pinUint16 GPIO130:1;// 2 Data Register for this pinUint16 GPIO131:1;// 3 Data Register for this pinUint16 GPIO132:1;// 4 Data Register for this pinUint16 GPIO133:1;// 5 Data Register for this pinUint16 GPIO134:1;// 6 Data Register for this pinUint16 GPIO135:1;// 7 Data Register for this pinUint16 GPIO136:1;// 8 Data Register for this pinUint16 GPIO137:1;// 9 Data Register for this pinUint16 GPIO138:1;// 10 Data Register for this pinUint16 GPIO139:1;// 11 Data Register for this pinUint16 GPIO140:1;// 12 Data Register for this pinUint16 GPIO141:1;// 13 Data Register for this pinUint16 GPIO142:1;// 14 Data Register for this pinUint16 GPIO143:1;// 15 Data Register for this pinUint16 GPIO144:1;// 16 Data Register for this pinUint16 GPIO145:1;// 17 Data Register for this pinUint16 GPIO146:1;// 18 Data Register for this pinUint16 GPIO147:1;// 19 Data Register for this pinUint16 GPIO148:1;// 20 Data Register for this pinUint16 GPIO149:1;// 21 Data Register for this pinUint16 GPIO150:1;// 22 Data Register for this pinUint16 GPIO151:1;// 23 Data Register for this pinUint16 GPIO152:1;// 24 Data Register for this pinUint16 GPIO153:1;// 25 Data Register for this pinUint16 GPIO154:1;// 26 Data Register for this pinUint16 GPIO155:1;// 27 Data Register for this pinUint16 GPIO156:1;// 28 Data Register for this pinUint16 GPIO157:1;// 29 Data Register for this pinUint16 GPIO158:1;// 30 Data Register for this pinUint16 GPIO159:1;// 31 Data Register for this pin
};union GPEDAT_REG {Uint32all;structGPEDAT_BITSbit;
};struct GPESET_BITS {// bits descriptionUint16 GPIO128:1;// 0 Output Set bit for this pinUint16 GPIO129:1;// 1 Output Set bit for this pinUint16 GPIO130:1;// 2 Output Set bit for this pinUint16 GPIO131:1;// 3 Output Set bit for this pinUint16 GPIO132:1;// 4 Output Set bit for this pinUint16 GPIO133:1;// 5 Output Set bit for this pinUint16 GPIO134:1;// 6 Output Set bit for this pinUint16 GPIO135:1;// 7 Output Set bit for this pinUint16 GPIO136:1;// 8 Output Set bit for this pinUint16 GPIO137:1;// 9 Output Set bit for this pinUint16 GPIO138:1;// 10 Output Set bit for this pinUint16 GPIO139:1;// 11 Output Set bit for this pinUint16 GPIO140:1;// 12 Output Set bit for this pinUint16 GPIO141:1;// 13 Output Set bit for this pinUint16 GPIO142:1;// 14 Output Set bit for this pinUint16 GPIO143:1;// 15 Output Set bit for this pinUint16 GPIO144:1;// 16 Output Set bit for this pinUint16 GPIO145:1;// 17 Output Set bit for this pinUint16 GPIO146:1;// 18 Output Set bit for this pinUint16 GPIO147:1;// 19 Output Set bit for this pinUint16 GPIO148:1;// 20 Output Set bit for this pinUint16 GPIO149:1;// 21 Output Set bit for this pinUint16 GPIO150:1;// 22 Output Set bit for this pinUint16 GPIO151:1;// 23 Output Set bit for this pinUint16 GPIO152:1;// 24 Output Set bit for this pinUint16 GPIO153:1;// 25 Output Set bit for this pinUint16 GPIO154:1;// 26 Output Set bit for this pinUint16 GPIO155:1;// 27 Output Set bit for this pinUint16 GPIO156:1;// 28 Output Set bit for this pinUint16 GPIO157:1;// 29 Output Set bit for this pinUint16 GPIO158:1;// 30 Output Set bit for this pinUint16 GPIO159:1;// 31 Output Set bit for this pin
};union GPESET_REG {Uint32all;structGPESET_BITSbit;
};struct GPECLEAR_BITS {// bits descriptionUint16 GPIO128:1;// 0 Output Clear bit for this pinUint16 GPIO129:1;// 1 Output Clear bit for this pinUint16 GPIO130:1;// 2 Output Clear bit for this pinUint16 GPIO131:1;// 3 Output Clear bit for this pinUint16 GPIO132:1;// 4 Output Clear bit for this pinUint16 GPIO133:1;// 5 Output Clear bit for this pinUint16 GPIO134:1;// 6 Output Clear bit for this pinUint16 GPIO135:1;// 7 Output Clear bit for this pinUint16 GPIO136:1;// 8 Output Clear bit for this pinUint16 GPIO137:1;// 9 Output Clear bit for this pinUint16 GPIO138:1;// 10 Output Clear bit for this pinUint16 GPIO139:1;// 11 Output Clear bit for this pinUint16 GPIO140:1;// 12 Output Clear bit for this pinUint16 GPIO141:1;// 13 Output Clear bit for this pinUint16 GPIO142:1;// 14 Output Clear bit for this pinUint16 GPIO143:1;// 15 Output Clear bit for this pinUint16 GPIO144:1;// 16 Output Clear bit for this pinUint16 GPIO145:1;// 17 Output Clear bit for this pinUint16 GPIO146:1;// 18 Output Clear bit for this pinUint16 GPIO147:1;// 19 Output Clear bit for this pinUint16 GPIO148:1;// 20 Output Clear bit for this pinUint16 GPIO149:1;// 21 Output Clear bit for this pinUint16 GPIO150:1;// 22 Output Clear bit for this pinUint16 GPIO151:1;// 23 Output Clear bit for this pinUint16 GPIO152:1;// 24 Output Clear bit for this pinUint16 GPIO153:1;// 25 Output Clear bit for this pinUint16 GPIO154:1;// 26 Output Clear bit for this pinUint16 GPIO155:1;// 27 Output Clear bit for this pinUint16 GPIO156:1;// 28 Output Clear bit for this pinUint16 GPIO157:1;// 29 Output Clear bit for this pinUint16 GPIO158:1;// 30 Output Clear bit for this pinUint16 GPIO159:1;// 31 Output Clear bit for this pin
};union GPECLEAR_REG {Uint32all;structGPECLEAR_BITSbit;
};struct GPETOGGLE_BITS {// bits descriptionUint16 GPIO128:1;// 0 Output Toggle bit for this pinUint16 GPIO129:1;// 1 Output Toggle bit for this pinUint16 GPIO130:1;// 2 Output Toggle bit for this pinUint16 GPIO131:1;// 3 Output Toggle bit for this pinUint16 GPIO132:1;// 4 Output Toggle bit for this pinUint16 GPIO133:1;// 5 Output Toggle bit for this pinUint16 GPIO134:1;// 6 Output Toggle bit for this pinUint16 GPIO135:1;// 7 Output Toggle bit for this pinUint16 GPIO136:1;// 8 Output Toggle bit for this pinUint16 GPIO137:1;// 9 Output Toggle bit for this pinUint16 GPIO138:1;// 10 Output Toggle bit for this pinUint16 GPIO139:1;// 11 Output Toggle bit for this pinUint16 GPIO140:1;// 12 Output Toggle bit for this pinUint16 GPIO141:1;// 13 Output Toggle bit for this pinUint16 GPIO142:1;// 14 Output Toggle bit for this pinUint16 GPIO143:1;// 15 Output Toggle bit for this pinUint16 GPIO144:1;// 16 Output Toggle bit for this pinUint16 GPIO145:1;// 17 Output Toggle bit for this pinUint16 GPIO146:1;// 18 Output Toggle bit for this pinUint16 GPIO147:1;// 19 Output Toggle bit for this pinUint16 GPIO148:1;// 20 Output Toggle bit for this pinUint16 GPIO149:1;// 21 Output Toggle bit for this pinUint16 GPIO150:1;// 22 Output Toggle bit for this pinUint16 GPIO151:1;// 23 Output Toggle bit for this pinUint16 GPIO152:1;// 24 Output Toggle bit for this pinUint16 GPIO153:1;// 25 Output Toggle bit for this pinUint16 GPIO154:1;// 26 Output Toggle bit for this pinUint16 GPIO155:1;// 27 Output Toggle bit for this pinUint16 GPIO156:1;// 28 Output Toggle bit for this pinUint16 GPIO157:1;// 29 Output Toggle bit for this pinUint16 GPIO158:1;// 30 Output Toggle bit for this pinUint16 GPIO159:1;// 31 Output Toggle bit for this pin
};union GPETOGGLE_REG {Uint32all;structGPETOGGLE_BITSbit;
};struct GPFDAT_BITS {// bits descriptionUint16 GPIO160:1;// 0 Data Register for this pinUint16 GPIO161:1;// 1 Data Register for this pinUint16 GPIO162:1;// 2 Data Register for this pinUint16 GPIO163:1;// 3 Data Register for this pinUint16 GPIO164:1;// 4 Data Register for this pinUint16 GPIO165:1;// 5 Data Register for this pinUint16 GPIO166:1;// 6 Data Register for this pinUint16 GPIO167:1;// 7 Data Register for this pinUint16 GPIO168:1;// 8 Data Register for this pinUint16 rsvd1:1;// 9 ReservedUint16 rsvd2:1;// 10 ReservedUint16 rsvd3:1;// 11 ReservedUint16 rsvd4:1;// 12 ReservedUint16 rsvd5:1;// 13 ReservedUint16 rsvd6:1;// 14 ReservedUint16 rsvd7:1;// 15 ReservedUint16 rsvd8:1;// 16 ReservedUint16 rsvd9:1;// 17 ReservedUint16 rsvd10:1;// 18 ReservedUint16 rsvd11:1;// 19 ReservedUint16 rsvd12:1;// 20 ReservedUint16 rsvd13:1;// 21 ReservedUint16 rsvd14:1;// 22 ReservedUint16 rsvd15:1;// 23 ReservedUint16 rsvd16:1;// 24 ReservedUint16 rsvd17:1;// 25 ReservedUint16 rsvd18:1;// 26 ReservedUint16 rsvd19:1;// 27 ReservedUint16 rsvd20:1;// 28 ReservedUint16 rsvd21:1;// 29 ReservedUint16 rsvd22:1;// 30 ReservedUint16 rsvd23:1;// 31 Reserved
};union GPFDAT_REG {Uint32all;structGPFDAT_BITSbit;
};struct GPFSET_BITS {// bits descriptionUint16 GPIO160:1;// 0 Output Set bit for this pinUint16 GPIO161:1;// 1 Output Set bit for this pinUint16 GPIO162:1;// 2 Output Set bit for this pinUint16 GPIO163:1;// 3 Output Set bit for this pinUint16 GPIO164:1;// 4 Output Set bit for this pinUint16 GPIO165:1;// 5 Output Set bit for this pinUint16 GPIO166:1;// 6 Output Set bit for this pinUint16 GPIO167:1;// 7 Output Set bit for this pinUint16 GPIO168:1;// 8 Output Set bit for this pinUint16 rsvd1:1;// 9 ReservedUint16 rsvd2:1;// 10 ReservedUint16 rsvd3:1;// 11 ReservedUint16 rsvd4:1;// 12 ReservedUint16 rsvd5:1;// 13 ReservedUint16 rsvd6:1;// 14 ReservedUint16 rsvd7:1;// 15 ReservedUint16 rsvd8:1;// 16 ReservedUint16 rsvd9:1;// 17 ReservedUint16 rsvd10:1;// 18 ReservedUint16 rsvd11:1;// 19 ReservedUint16 rsvd12:1;// 20 ReservedUint16 rsvd13:1;// 21 ReservedUint16 rsvd14:1;// 22 ReservedUint16 rsvd15:1;// 23 ReservedUint16 rsvd16:1;// 24 ReservedUint16 rsvd17:1;// 25 ReservedUint16 rsvd18:1;// 26 ReservedUint16 rsvd19:1;// 27 ReservedUint16 rsvd20:1;// 28 ReservedUint16 rsvd21:1;// 29 ReservedUint16 rsvd22:1;// 30 ReservedUint16 rsvd23:1;// 31 Reserved
};union GPFSET_REG {Uint32all;structGPFSET_BITSbit;
};struct GPFCLEAR_BITS {// bits descriptionUint16 GPIO160:1;// 0 Output Clear bit for this pinUint16 GPIO161:1;// 1 Output Clear bit for this pinUint16 GPIO162:1;// 2 Output Clear bit for this pinUint16 GPIO163:1;// 3 Output Clear bit for this pinUint16 GPIO164:1;// 4 Output Clear bit for this pinUint16 GPIO165:1;// 5 Output Clear bit for this pinUint16 GPIO166:1;// 6 Output Clear bit for this pinUint16 GPIO167:1;// 7 Output Clear bit for this pinUint16 GPIO168:1;// 8 Output Clear bit for this pinUint16 rsvd1:1;// 9 ReservedUint16 rsvd2:1;// 10 ReservedUint16 rsvd3:1;// 11 ReservedUint16 rsvd4:1;// 12 ReservedUint16 rsvd5:1;// 13 ReservedUint16 rsvd6:1;// 14 ReservedUint16 rsvd7:1;// 15 ReservedUint16 rsvd8:1;// 16 ReservedUint16 rsvd9:1;// 17 ReservedUint16 rsvd10:1;// 18 ReservedUint16 rsvd11:1;// 19 ReservedUint16 rsvd12:1;// 20 ReservedUint16 rsvd13:1;// 21 ReservedUint16 rsvd14:1;// 22 ReservedUint16 rsvd15:1;// 23 ReservedUint16 rsvd16:1;// 24 ReservedUint16 rsvd17:1;// 25 ReservedUint16 rsvd18:1;// 26 ReservedUint16 rsvd19:1;// 27 ReservedUint16 rsvd20:1;// 28 ReservedUint16 rsvd21:1;// 29 ReservedUint16 rsvd22:1;// 30 ReservedUint16 rsvd23:1;// 31 Reserved
};union GPFCLEAR_REG {Uint32all;structGPFCLEAR_BITSbit;
};struct GPFTOGGLE_BITS {// bits descriptionUint16 GPIO160:1;// 0 Output Toggle bit for this pinUint16 GPIO161:1;// 1 Output Toggle bit for this pinUint16 GPIO162:1;// 2 Output Toggle bit for this pinUint16 GPIO163:1;// 3 Output Toggle bit for this pinUint16 GPIO164:1;// 4 Output Toggle bit for this pinUint16 GPIO165:1;// 5 Output Toggle bit for this pinUint16 GPIO166:1;// 6 Output Toggle bit for this pinUint16 GPIO167:1;// 7 Output Toggle bit for this pinUint16 GPIO168:1;// 8 Output Toggle bit for this pinUint16 rsvd1:1;// 9 ReservedUint16 rsvd2:1;// 10 ReservedUint16 rsvd3:1;// 11 ReservedUint16 rsvd4:1;// 12 ReservedUint16 rsvd5:1;// 13 ReservedUint16 rsvd6:1;// 14 ReservedUint16 rsvd7:1;// 15 ReservedUint16 rsvd8:1;// 16 ReservedUint16 rsvd9:1;// 17 ReservedUint16 rsvd10:1;// 18 ReservedUint16 rsvd11:1;// 19 ReservedUint16 rsvd12:1;// 20 ReservedUint16 rsvd13:1;// 21 ReservedUint16 rsvd14:1;// 22 ReservedUint16 rsvd15:1;// 23 ReservedUint16 rsvd16:1;// 24 ReservedUint16 rsvd17:1;// 25 ReservedUint16 rsvd18:1;// 26 ReservedUint16 rsvd19:1;// 27 ReservedUint16 rsvd20:1;// 28 ReservedUint16 rsvd21:1;// 29 ReservedUint16 rsvd22:1;// 30 ReservedUint16 rsvd23:1;// 31 Reserved
};union GPFTOGGLE_REG {Uint32all;structGPFTOGGLE_BITSbit;
};struct GPIO_DATA_REGS {unionGPADAT_REGGPADAT;// GPIO A Data Register (GPIO0 to 31)unionGPASET_REGGPASET;// GPIO A Data Set Register (GPIO0 to 31)unionGPACLEAR_REGGPACLEAR;// GPIO A Data Clear Register (GPIO0 to 31)unionGPATOGGLE_REGGPATOGGLE;// GPIO A Data Toggle Register (GPIO0 to 31)unionGPBDAT_REGGPBDAT;// GPIO B Data Register (GPIO32 to 63)unionGPBSET_REGGPBSET;// GPIO B Data Set Register (GPIO32 to 63)unionGPBCLEAR_REGGPBCLEAR;// GPIO B Data Clear Register (GPIO32 to 63)unionGPBTOGGLE_REGGPBTOGGLE;// GPIO B Data Toggle Register (GPIO32 to 63)unionGPCDAT_REGGPCDAT;// GPIO C Data Register (GPIO64 to 95)unionGPCSET_REGGPCSET;// GPIO C Data Set Register (GPIO64 to 95)unionGPCCLEAR_REGGPCCLEAR;// GPIO C Data Clear Register (GPIO64 to 95)unionGPCTOGGLE_REGGPCTOGGLE;// GPIO C Data Toggle Register (GPIO64 to 95)unionGPDDAT_REGGPDDAT;// GPIO D Data Register (GPIO96 to 127)unionGPDSET_REGGPDSET;// GPIO D Data Set Register (GPIO96 to 127)unionGPDCLEAR_REGGPDCLEAR;// GPIO D Data Clear Register (GPIO96 to 127)unionGPDTOGGLE_REGGPDTOGGLE;// GPIO D Data Toggle Register (GPIO96 to 127)unionGPEDAT_REGGPEDAT;// GPIO E Data Register (GPIO128 to 159)unionGPESET_REGGPESET;// GPIO E Data Set Register (GPIO128 to 159)unionGPECLEAR_REGGPECLEAR;// GPIO E Data Clear Register (GPIO128 to 159)unionGPETOGGLE_REGGPETOGGLE;// GPIO E Data Toggle Register (GPIO128 to 159)unionGPFDAT_REGGPFDAT;// GPIO F Data Register (GPIO160 to 168)unionGPFSET_REGGPFSET;// GPIO F Data Set Register (GPIO160 to 168)unionGPFCLEAR_REGGPFCLEAR;// GPIO F Data Clear Register (GPIO160 to 168)unionGPFTOGGLE_REGGPFTOGGLE;// GPIO F Data Toggle Register (GPIO160 to 168)
};struct GPIO_DATA_READ_REGS {Uint32GPADAT_R;// GPIO A Data Read RegisterUint32GPBDAT_R;// GPIO B Data Read RegisterUint32GPCDAT_R;// GPIO C Data Read RegisterUint32GPDDAT_R;// GPIO D Data Read RegisterUint32GPEDAT_R;// GPIO E Data Read RegisterUint32GPFDAT_R;// GPIO F Data Read Register
};//---------------------------------------------------------------------------
// GPIO External References & Function Declarations:
//
#ifdef CPU1
extern volatile struct GPIO_CTRL_REGS GpioCtrlRegs;
extern volatile struct GPIO_DATA_REGS GpioDataRegs;
extern volatile struct GPIO_DATA_READ_REGS GpioDataReadRegs;
#endif
#ifdef CPU2
extern volatile struct GPIO_DATA_REGS GpioDataRegs;
extern volatile struct GPIO_DATA_READ_REGS GpioDataReadRegs;
#endif
#ifdef __cplusplus
}
#endif/* extern "C" */#endif//===========================================================================
// End of file.
//===========================================================================

user6355257:

回复 Susan Yang:

不是这个,我说的文件,里面定义了GPIO的功能。
查找了device.h文件,也没发现定义了100多个引脚的多路复用功能的

user6355257:

回复 Susan Yang:

感谢您的帮助,谢谢

user6355257:

回复 Susan Yang:

我这边,也在不断的寻找中

user6355257:

回复 Susan Yang:

哦,对了,想请教一下,我在.c和device.h中修改了引脚的定义。编译后,报错,

出错的原因,应该是由于底层的引脚配置没有进行修改吧

下图分别是在主函数和device.h中修改的位置截图

只改这两个地方,还不够,好像还有一个地方,也就是我要找的那个地方

特来请教

谢谢

Susan Yang:

回复 user6355257:

应该是这个

//###########################################################################
//
// FILE:pin_map.h
//
// TITLE:Definitions of pin mux info for gpio.c.
//
//###########################################################################
// $TI Release: F2838x Support Library v3.03.00.00 $
// $Release Date: Sun Oct4 16:00:36 IST 2020 $
// $Copyright:
// Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without// modification, are permitted provided that the following conditions// are met:
////Redistributions of source code must retain the above copyright//notice, this list of conditions and the following disclaimer.
////Redistributions in binary form must reproduce the above copyright
//notice, this list of conditions and the following disclaimer in the//documentation and/or other materials provided with the//distribution.
////Neither the name of Texas Instruments Incorporated nor the names of
//its contributors may be used to endorse or promote products derived
//from this software without specific prior written permission.
//// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//############################################################################ifndef __PIN_MAP_H__
#define __PIN_MAP_H__//*****************************************************************************
// 0x00000003 = MUX register value
// 0x0000000C = GMUX register value
// 0x0000FF00 = Shift amount within mux registers
// 0xFFFF0000 = Offset of MUX register
//*****************************************************************************//*****************************************************************************
// Latest pinmuxing MACROS - Recommended for new users
//*****************************************************************************#define GPIO_0_GPIO00x00060000U
#define GPIO_0_EPWM1A0x00060001U
#define GPIO_0_I2CA_SDA0x00060006U
#define GPIO_0_CM_I2CA_SDA0x00060009U
#define GPIO_0_ESC_GPI00x0006000AU
#define GPIO_0_FSITXA_D00x0006000DU#define GPIO_1_GPIO10x00060200U
#define GPIO_1_EPWM1B0x00060201U
#define GPIO_1_MFSRB0x00060203U
#define GPIO_1_I2CA_SCL0x00060206U
#define GPIO_1_CM_I2CA_SCL0x00060209U
#define GPIO_1_ESC_GPI10x0006020AU
#define GPIO_1_FSITXA_D10x0006020DU#define GPIO_2_GPIO20x00060400U
#define GPIO_2_EPWM2A0x00060401U
#define GPIO_2_OUTPUTXBAR10x00060405U
#define GPIO_2_I2CB_SDA0x00060406U
#define GPIO_2_ESC_GPI20x0006040AU
#define GPIO_2_FSITXA_CLK0x0006040DU#define GPIO_3_GPIO30x00060600U
#define GPIO_3_EPWM2B0x00060601U
#define GPIO_3_OUTPUTXBAR20x00060602U
#define GPIO_3_MCLKRB0x00060603U
#define GPIO_3_I2CB_SCL0x00060606U
#define GPIO_3_ESC_GPI30x0006060AU
#define GPIO_3_FSIRXA_D00x0006060DU#define GPIO_4_GPIO40x00060800U
#define GPIO_4_EPWM3A0x00060801U
#define GPIO_4_OUTPUTXBAR30x00060805U
#define GPIO_4_CANA_TX0x00060806U
#define GPIO_4_MCAN_TX0x00060809U
#define GPIO_4_ESC_GPI40x0006080AU
#define GPIO_4_FSIRXA_D10x0006080DU#define GPIO_5_GPIO50x00060A00U
#define GPIO_5_EPWM3B0x00060A01U
#define GPIO_5_MFSRA0x00060A02U
#define GPIO_5_OUTPUTXBAR30x00060A03U
#define GPIO_5_CANA_RX0x00060A06U
#define GPIO_5_MCAN_RX0x00060A09U
#define GPIO_5_ESC_GPI50x00060A0AU
#define GPIO_5_FSIRXA_CLK0x00060A0DU#define GPIO_6_GPIO60x00060C00U
#define GPIO_6_EPWM4A0x00060C01U
#define GPIO_6_OUTPUTXBAR40x00060C02U
#define GPIO_6_EXTSYNCOUT0x00060C03U
#define GPIO_6_EQEP3_A0x00060C05U
#define GPIO_6_CANB_TX0x00060C06U
#define GPIO_6_ESC_GPI60x00060C0AU
#define GPIO_6_FSITXB_D00x00060C0DU#define GPIO_7_GPIO70x00060E00U
#define GPIO_7_EPWM4B0x00060E01U
#define GPIO_7_MCLKRA0x00060E02U
#define GPIO_7_OUTPUTXBAR50x00060E03U
#define GPIO_7_EQEP3_B0x00060E05U
#define GPIO_7_CANB_RX0x00060E06U
#define GPIO_7_ESC_GPI70x00060E0AU
#define GPIO_7_FSITXB_D10x00060E0DU#define GPIO_8_GPIO80x00061000U
#define GPIO_8_EPWM5A0x00061001U
#define GPIO_8_CANB_TX0x00061002U
#define GPIO_8_ADCSOCAO0x00061003U
#define GPIO_8_EQEP3_STROBE0x00061005U
#define GPIO_8_SCIA_TX0x00061006U
#define GPIO_8_MCAN_TX0x00061009U
#define GPIO_8_ESC_GPO00x0006100AU
#define GPIO_8_FSITXB_CLK0x0006100DU
#define GPIO_8_FSITXA_D10x0006100EU
#define GPIO_8_FSIRXA_D00x0006100FU#define GPIO_9_GPIO90x00061200U
#define GPIO_9_EPWM5B0x00061201U
#define GPIO_9_SCIB_TX0x00061202U
#define GPIO_9_OUTPUTXBAR60x00061203U
#define GPIO_9_EQEP3_INDEX0x00061205U
#define GPIO_9_SCIA_RX0x00061206U
#define GPIO_9_ESC_GPO10x0006120AU
#define GPIO_9_FSIRXB_D00x0006120DU
#define GPIO_9_FSITXA_D00x0006120EU
#define GPIO_9_FSIRXA_CLK0x0006120FU#define GPIO_10_GPIO100x00061400U
#define GPIO_10_EPWM6A0x00061401U
#define GPIO_10_CANB_RX0x00061402U
#define GPIO_10_ADCSOCBO0x00061403U
#define GPIO_10_EQEP1_A0x00061405U
#define GPIO_10_SCIB_TX0x00061406U
#define GPIO_10_MCAN_RX0x00061409U
#define GPIO_10_ESC_GPO20x0006140AU
#define GPIO_10_FSIRXB_D10x0006140DU
#define GPIO_10_FSITXA_CLK0x0006140EU
#define GPIO_10_FSIRXA_D10x0006140FU#define GPIO_11_GPIO110x00061600U
#define GPIO_11_EPWM6B0x00061601U
#define GPIO_11_SCIB_RX0x00061602U
#define GPIO_11_OUTPUTXBAR70x00061603U
#define GPIO_11_EQEP1_B0x00061605U
#define GPIO_11_ESC_GPO30x0006160AU
#define GPIO_11_FSIRXB_CLK0x0006160DU
#define GPIO_11_FSIRXA_D10x0006160EU#define GPIO_12_GPIO120x00061800U
#define GPIO_12_EPWM7A0x00061801U
#define GPIO_12_CANB_TX0x00061802U
#define GPIO_12_MDXB0x00061803U
#define GPIO_12_EQEP1_STROBE0x00061805U
#define GPIO_12_SCIC_TX0x00061806U
#define GPIO_12_ESC_GPO40x0006180AU
#define GPIO_12_FSIRXC_D00x0006180DU
#define GPIO_12_FSIRXA_D00x0006180EU#define GPIO_13_GPIO130x00061A00U
#define GPIO_13_EPWM7B0x00061A01U
#define GPIO_13_CANB_RX0x00061A02U
#define GPIO_13_MDRB0x00061A03U
#define GPIO_13_EQEP1_INDEX0x00061A05U
#define GPIO_13_SCIC_RX0x00061A06U
#define GPIO_13_ESC_GPO50x00061A0AU
#define GPIO_13_FSIRXC_D10x00061A0DU
#define GPIO_13_FSIRXA_CLK0x00061A0EU#define GPIO_14_GPIO140x00061C00U
#define GPIO_14_EPWM8A0x00061C01U
#define GPIO_14_SCIB_TX0x00061C02U
#define GPIO_14_MCLKXB0x00061C03U
#define GPIO_14_OUTPUTXBAR30x00061C06U
#define GPIO_14_ESC_GPO60x00061C0AU
#define GPIO_14_FSIRXC_CLK0x00061C0DU#define GPIO_15_GPIO150x00061E00U
#define GPIO_15_EPWM8B0x00061E01U
#define GPIO_15_SCIB_RX0x00061E02U
#define GPIO_15_MFSXB0x00061E03U
#define GPIO_15_OUTPUTXBAR40x00061E06U
#define GPIO_15_ESC_GPO70x00061E0AU
#define GPIO_15_FSIRXD_D00x00061E0DU#define GPIO_16_GPIO160x00080000U
#define GPIO_16_SPIA_SIMO0x00080001U
#define GPIO_16_CANB_TX0x00080002U
#define GPIO_16_OUTPUTXBAR70x00080003U
#define GPIO_16_EPWM9A0x00080005U
#define GPIO_16_SD1_D10x00080007U
#define GPIO_16_SSIA_TX0x0008000BU
#define GPIO_16_FSIRXD_D10x0008000DU#define GPIO_17_GPIO170x00080200U
#define GPIO_17_SPIA_SOMI0x00080201U
#define GPIO_17_CANB_RX0x00080202U
#define GPIO_17_OUTPUTXBAR80x00080203U
#define GPIO_17_EPWM9B0x00080205U
#define GPIO_17_SD1_C10x00080207U
#define GPIO_17_SSIA_RX0x0008020BU
#define GPIO_17_FSIRXD_CLK0x0008020DU#define GPIO_18_GPIO180x00080400U
#define GPIO_18_SPIA_CLK0x00080401U
#define GPIO_18_SCIB_TX0x00080402U
#define GPIO_18_CANA_RX0x00080403U
#define GPIO_18_EPWM10A0x00080405U
#define GPIO_18_SD1_D20x00080407U
#define GPIO_18_MCAN_RX0x00080409U
#define GPIO_18_EMIF1_CS2N0x0008040AU
#define GPIO_18_SSIA_CLK0x0008040BU
#define GPIO_18_FSIRXE_D00x0008040DU#define GPIO_19_GPIO190x00080600U
#define GPIO_19_SPIA_STEN0x00080601U
#define GPIO_19_SCIB_RX0x00080602U
#define GPIO_19_CANA_TX0x00080603U
#define GPIO_19_EPWM10B0x00080605U
#define GPIO_19_SD1_C20x00080607U
#define GPIO_19_MCAN_TX0x00080609U
#define GPIO_19_EMIF1_CS3N0x0008060AU
#define GPIO_19_SSIA_FSS0x0008060BU
#define GPIO_19_FSIRXE_D10x0008060DU#define GPIO_20_GPIO200x00080800U
#define GPIO_20_EQEP1_A0x00080801U
#define GPIO_20_MDXA0x00080802U
#define GPIO_20_CANB_TX0x00080803U
#define GPIO_20_EPWM11A0x00080805U
#define GPIO_20_SD1_D30x00080807U
#define GPIO_20_EMIF1_BA00x0008080AU
#define GPIO_20_TRACE_DATA00x0008080BU
#define GPIO_20_FSIRXE_CLK0x0008080DU
#define GPIO_20_SPIC_SIMO0x0008080EU#define GPIO_21_GPIO210x00080A00U
#define GPIO_21_EQEP1_B0x00080A01U
#define GPIO_21_MDRA0x00080A02U
#define GPIO_21_CANB_RX0x00080A03U
#define GPIO_21_EPWM11B0x00080A05U
#define GPIO_21_SD1_C30x00080A07U
#define GPIO_21_EMIF1_BA10x00080A0AU
#define GPIO_21_TRACE_DATA10x00080A0BU
#define GPIO_21_FSIRXF_D00x00080A0DU
#define GPIO_21_SPIC_SOMI0x00080A0EU#define GPIO_22_GPIO220x00080C00U
#define GPIO_22_EQEP1_STROBE0x00080C01U
#define GPIO_22_MCLKXA0x00080C02U
#define GPIO_22_SCIB_TX0x00080C03U
#define GPIO_22_EPWM12A0x00080C05U
#define GPIO_22_SPIB_CLK0x00080C06U
#define GPIO_22_SD1_D40x00080C07U
#define GPIO_22_MCAN_TX0x00080C09U
#define GPIO_22_EMIF1_RAS0x00080C0AU
#define GPIO_22_TRACE_DATA20x00080C0BU
#define GPIO_22_FSIRXF_D10x00080C0DU
#define GPIO_22_SPIC_CLK0x00080C0EU#define GPIO_23_GPIO230x00080E00U
#define GPIO_23_EQEP1_INDEX0x00080E01U
#define GPIO_23_MFSXA0x00080E02U
#define GPIO_23_SCIB_RX0x00080E03U
#define GPIO_23_EPWM12B0x00080E05U
#define GPIO_23_SPIB_STEN0x00080E06U
#define GPIO_23_SD1_C40x00080E07U
#define GPIO_23_MCAN_RX0x00080E09U
#define GPIO_23_EMIF1_CAS0x00080E0AU
#define GPIO_23_TRACE_DATA30x00080E0BU
#define GPIO_23_FSIRXF_CLK0x00080E0DU
#define GPIO_23_SPIC_STEN0x00080E0EU#define GPIO_24_GPIO240x00081000U
#define GPIO_24_OUTPUTXBAR10x00081001U
#define GPIO_24_EQEP2_A0x00081002U
#define GPIO_24_MDXB0x00081003U
#define GPIO_24_SPIB_SIMO0x00081006U
#define GPIO_24_SD2_D10x00081007U
#define GPIO_24_PMBUSA_SCL0x00081009U
#define GPIO_24_EMIF1_DQM00x0008100AU
#define GPIO_24_TRACE_CLK0x0008100BU
#define GPIO_24_EPWM13A0x0008100DU
#define GPIO_24_FSIRXG_D00x0008100FU#define GPIO_25_GPIO250x00081200U
#define GPIO_25_OUTPUTXBAR20x00081201U
#define GPIO_25_EQEP2_B0x00081202U
#define GPIO_25_MDRB0x00081203U
#define GPIO_25_SPIB_SOMI0x00081206U
#define GPIO_25_SD2_C10x00081207U
#define GPIO_25_PMBUSA_SDA0x00081209U
#define GPIO_25_EMIF1_DQM10x0008120AU
#define GPIO_25_TRACE_SWO0x0008120BU
#define GPIO_25_EPWM13B0x0008120DU
#define GPIO_25_FSITXA_D10x0008120EU
#define GPIO_25_FSIRXG_D10x0008120FU#define GPIO_26_GPIO260x00081400U
#define GPIO_26_OUTPUTXBAR30x00081401U
#define GPIO_26_EQEP2_INDEX0x00081402U
#define GPIO_26_MCLKXB0x00081403U
#define GPIO_26_SPIB_CLK0x00081406U
#define GPIO_26_SD2_D20x00081407U
#define GPIO_26_PMBUSA_ALERT0x00081409U
#define GPIO_26_EMIF1_DQM20x0008140AU
#define GPIO_26_ESC_MDIO_CLK0x0008140BU
#define GPIO_26_EPWM14A0x0008140DU
#define GPIO_26_FSITXA_D00x0008140EU
#define GPIO_26_FSIRXG_CLK0x0008140FU#define GPIO_27_GPIO270x00081600U
#define GPIO_27_OUTPUTXBAR40x00081601U
#define GPIO_27_EQEP2_STROBE0x00081602U
#define GPIO_27_MFSXB0x00081603U
#define GPIO_27_SPIB_STEN0x00081606U
#define GPIO_27_SD2_C20x00081607U
#define GPIO_27_PMBUSA_CTL0x00081609U
#define GPIO_27_EMIF1_DQM30x0008160AU
#define GPIO_27_ESC_MDIO_DATA0x0008160BU
#define GPIO_27_EPWM14B0x0008160DU
#define GPIO_27_FSITXA_CLK0x0008160EU
#define GPIO_27_FSIRXH_D00x0008160FU#define GPIO_28_GPIO280x00081800U
#define GPIO_28_SCIA_RX0x00081801U
#define GPIO_28_EMIF1_CS4N0x00081802U
#define GPIO_28_OUTPUTXBAR50x00081805U
#define GPIO_28_EQEP3_A0x00081806U
#define GPIO_28_SD2_D30x00081807U
#define GPIO_28_EMIF1_CS2N0x00081809U
#define GPIO_28_EPWM15A0x0008180DU
#define GPIO_28_FSIRXH_D10x0008180FU#define GPIO_29_GPIO290x00081A00U
#define GPIO_29_SCIA_TX0x00081A01U
#define GPIO_29_EMIF1_SDCKE0x00081A02U
#define GPIO_29_OUTPUTXBAR60x00081A05U
#define GPIO_29_EQEP3_B0x00081A06U
#define GPIO_29_SD2_C30x00081A07U
#define GPIO_29_EMIF1_CS3N0x00081A09U
#define GPIO_29_ESC_LATCH00x00081A0AU
#define GPIO_29_ESC_I2C_SDA0x00081A0BU
#define GPIO_29_EPWM15B0x00081A0DU
#define GPIO_29_ESC_SYNC00x00081A0EU
#define GPIO_29_FSIRXH_CLK0x00081A0FU#define GPIO_30_GPIO300x00081C00U
#define GPIO_30_CANA_RX0x00081C01U
#define GPIO_30_EMIF1_CLK0x00081C02U
#define GPIO_30_MCAN_RX0x00081C03U
#define GPIO_30_OUTPUTXBAR70x00081C05U
#define GPIO_30_EQEP3_STROBE0x00081C06U
#define GPIO_30_SD2_D40x00081C07U
#define GPIO_30_EMIF1_CS4N0x00081C09U
#define GPIO_30_ESC_LATCH10x00081C0AU
#define GPIO_30_ESC_I2C_SCL0x00081C0BU
#define GPIO_30_EPWM16A0x00081C0DU
#define GPIO_30_ESC_SYNC10x00081C0EU
#define GPIO_30_SPID_SIMO0x00081C0FU#define GPIO_31_GPIO310x00081E00U
#define GPIO_31_CANA_TX0x00081E01U
#define GPIO_31_EMIF1_WEN0x00081E02U
#define GPIO_31_MCAN_TX0x00081E03U
#define GPIO_31_OUTPUTXBAR80x00081E05U
#define GPIO_31_EQEP3_INDEX0x00081E06U
#define GPIO_31_SD2_C40x00081E07U
#define GPIO_31_EMIF1_RNW0x00081E09U
#define GPIO_31_I2CA_SDA0x00081E0AU
#define GPIO_31_CM_I2CA_SDA0x00081E0BU
#define GPIO_31_EPWM16B0x00081E0DU
#define GPIO_31_SPID_SOMI0x00081E0FU#define GPIO_32_GPIO320x00460000U
#define GPIO_32_I2CA_SDA0x00460001U
#define GPIO_32_EMIF1_CS0N0x00460002U
#define GPIO_32_SPIA_SIMO0x00460003U
#define GPIO_32_CLB_OUTPUTXBAR10x00460007U
#define GPIO_32_EMIF1_OEN0x00460009U
#define GPIO_32_I2CA_SCL0x0046000AU
#define GPIO_32_CM_I2CA_SCL0x0046000BU
#define GPIO_32_SPID_CLK0x0046000FU#define GPIO_33_GPIO330x00460200U
#define GPIO_33_I2CA_SCL0x00460201U
#define GPIO_33_EMIF1_RNW0x00460202U
#define GPIO_33_SPIA_SOMI0x00460203U
#define GPIO_33_CLB_OUTPUTXBAR20x00460207U
#define GPIO_33_EMIF1_BA00x00460209U
#define GPIO_33_SPID_STEN0x0046020FU#define GPIO_34_GPIO340x00460400U
#define GPIO_34_OUTPUTXBAR10x00460401U
#define GPIO_34_EMIF1_CS2N0x00460402U
#define GPIO_34_SPIA_CLK0x00460403U
#define GPIO_34_I2CB_SDA0x00460406U
#define GPIO_34_CLB_OUTPUTXBAR30x00460407U
#define GPIO_34_EMIF1_BA10x00460409U
#define GPIO_34_ESC_LATCH00x0046040AU
#define GPIO_34_ENET_MII_CRS0x0046040BU
#define GPIO_34_SCIA_TX0x0046040DU
#define GPIO_34_ESC_SYNC00x0046040EU#define GPIO_35_GPIO350x00460600U
#define GPIO_35_SCIA_RX0x00460601U
#define GPIO_35_EMIF1_CS3N0x00460602U
#define GPIO_35_SPIA_STEN0x00460603U
#define GPIO_35_I2CB_SCL0x00460606U
#define GPIO_35_CLB_OUTPUTXBAR40x00460607U
#define GPIO_35_EMIF1_A00x00460609U
#define GPIO_35_ESC_LATCH10x0046060AU
#define GPIO_35_ENET_MII_COL0x0046060BU
#define GPIO_35_ESC_SYNC10x0046060EU#define GPIO_36_GPIO360x00460800U
#define GPIO_36_SCIA_TX0x00460801U
#define GPIO_36_EMIF1_WAIT0x00460802U
#define GPIO_36_CANA_RX0x00460806U
#define GPIO_36_CLB_OUTPUTXBAR50x00460807U
#define GPIO_36_EMIF1_A10x00460809U
#define GPIO_36_MCAN_RX0x0046080AU
#define GPIO_36_SD1_D10x0046080DU#define GPIO_37_GPIO370x00460A00U
#define GPIO_37_OUTPUTXBAR20x00460A01U
#define GPIO_37_EMIF1_OEN0x00460A02U
#define GPIO_37_CANA_TX0x00460A06U
#define GPIO_37_CLB_OUTPUTXBAR60x00460A07U
#define GPIO_37_EMIF1_A20x00460A09U
#define GPIO_37_MCAN_TX0x00460A0AU
#define GPIO_37_SD1_D20x00460A0DU#define GPIO_38_GPIO380x00460C00U
#define GPIO_38_EMIF1_A00x00460C02U
#define GPIO_38_SCIC_TX0x00460C05U
#define GPIO_38_CANB_TX0x00460C06U
#define GPIO_38_CLB_OUTPUTXBAR70x00460C07U
#define GPIO_38_EMIF1_A30x00460C09U
#define GPIO_38_ENET_MII_RX_DV0x00460C0AU
#define GPIO_38_ENET_MII_CRS0x00460C0BU
#define GPIO_38_SD1_D30x00460C0DU#define GPIO_39_GPIO390x00460E00U
#define GPIO_39_EMIF1_A10x00460E02U
#define GPIO_39_SCIC_RX0x00460E05U
#define GPIO_39_CANB_RX0x00460E06U
#define GPIO_39_CLB_OUTPUTXBAR80x00460E07U
#define GPIO_39_EMIF1_A40x00460E09U
#define GPIO_39_ENET_MII_RX_ERR0x00460E0AU
#define GPIO_39_ENET_MII_COL0x00460E0BU
#define GPIO_39_SD1_D40x00460E0DU#define GPIO_40_GPIO400x00461000U
#define GPIO_40_EMIF1_A20x00461002U
#define GPIO_40_I2CB_SDA0x00461006U
#define GPIO_40_ENET_MII_CRS0x0046100BU
#define GPIO_40_ESC_I2C_SDA0x0046100EU#define GPIO_41_GPIO410x00461200U
#define GPIO_41_EMIF1_A30x00461202U
#define GPIO_41_I2CB_SCL0x00461206U
#define GPIO_41_ENET_REVMII_MDIO_RST0x0046120AU
#define GPIO_41_ENET_MII_COL0x0046120BU
#define GPIO_41_ESC_I2C_SCL0x0046120EU#define GPIO_42_GPIO420x00461400U
#define GPIO_42_I2CA_SDA0x00461406U
#define GPIO_42_ENET_MDIO_CLK0x0046140AU
#define GPIO_42_UARTA_TX0x0046140BU
#define GPIO_42_SCIA_TX0x0046140FU#define GPIO_43_GPIO430x00461600U
#define GPIO_43_I2CA_SCL0x00461606U
#define GPIO_43_ENET_MDIO_DATA0x0046160AU
#define GPIO_43_UARTA_RX0x0046160BU
#define GPIO_43_SCIA_RX0x0046160FU#define GPIO_44_GPIO440x00461800U
#define GPIO_44_EMIF1_A40x00461802U
#define GPIO_44_ENET_MII_TX_CLK0x0046180BU
#define GPIO_44_ESC_TX1_CLK0x0046180EU#define GPIO_45_GPIO450x00461A00U
#define GPIO_45_EMIF1_A50x00461A02U
#define GPIO_45_ENET_MII_TX_EN0x00461A0BU
#define GPIO_45_ESC_TX1_ENA0x00461A0EU#define GPIO_46_GPIO460x00461C00U
#define GPIO_46_EMIF1_A60x00461C02U
#define GPIO_46_SCID_RX0x00461C06U
#define GPIO_46_ENET_MII_TX_ERR0x00461C0BU
#define GPIO_46_ESC_MDIO_CLK0x00461C0EU#define GPIO_47_GPIO470x00461E00U
#define GPIO_47_EMIF1_A70x00461E02U
#define GPIO_47_SCID_TX0x00461E06U
#define GPIO_47_ENET_PPS00x00461E0BU
#define GPIO_47_ESC_MDIO_DATA0x00461E0EU#define GPIO_48_GPIO480x00480000U
#define GPIO_48_OUTPUTXBAR30x00480001U
#define GPIO_48_EMIF1_A80x00480002U
#define GPIO_48_SCIA_TX0x00480006U
#define GPIO_48_SD1_D10x00480007U
#define GPIO_48_ENET_PPS10x0048000BU
#define GPIO_48_ESC_PHY_CLK0x0048000EU#define GPIO_49_GPIO490x00480200U
#define GPIO_49_OUTPUTXBAR40x00480201U
#define GPIO_49_EMIF1_A90x00480202U
#define GPIO_49_SCIA_RX0x00480206U
#define GPIO_49_SD1_C10x00480207U
#define GPIO_49_EMIF1_A50x00480209U
#define GPIO_49_ENET_MII_RX_CLK0x0048020BU
#define GPIO_49_SD2_D10x0048020DU
#define GPIO_49_FSITXA_D00x0048020EU#define GPIO_50_GPIO500x00480400U
#define GPIO_50_EQEP1_A0x00480401U
#define GPIO_50_EMIF1_A100x00480402U
#define GPIO_50_SPIC_SIMO0x00480406U
#define GPIO_50_SD1_D20x00480407U
#define GPIO_50_EMIF1_A60x00480409U
#define GPIO_50_ENET_MII_RX_DV0x0048040BU
#define GPIO_50_SD2_D20x0048040DU
#define GPIO_50_FSITXA_D10x0048040EU#define GPIO_51_GPIO510x00480600U
#define GPIO_51_EQEP1_B0x00480601U
#define GPIO_51_EMIF1_A110x00480602U
#define GPIO_51_SPIC_SOMI0x00480606U
#define GPIO_51_SD1_C20x00480607U
#define GPIO_51_EMIF1_A70x00480609U
#define GPIO_51_ENET_MII_RX_ERR0x0048060BU
#define GPIO_51_SD2_D30x0048060DU
#define GPIO_51_FSITXA_CLK0x0048060EU#define GPIO_52_GPIO520x00480800U
#define GPIO_52_EQEP1_STROBE0x00480801U
#define GPIO_52_EMIF1_A120x00480802U
#define GPIO_52_SPIC_CLK0x00480806U
#define GPIO_52_SD1_D30x00480807U
#define GPIO_52_EMIF1_A80x00480809U
#define GPIO_52_ENET_MII_RX_DATA00x0048080BU
#define GPIO_52_SD2_D40x0048080DU
#define GPIO_52_FSIRXA_D00x0048080EU#define GPIO_53_GPIO530x00480A00U
#define GPIO_53_EQEP1_INDEX0x00480A01U
#define GPIO_53_EMIF1_D310x00480A02U
#define GPIO_53_EMIF2_D150x00480A03U
#define GPIO_53_SPIC_STEN0x00480A06U
#define GPIO_53_SD1_C30x00480A07U
#define GPIO_53_EMIF1_A90x00480A09U
#define GPIO_53_ENET_MII_RX_DATA10x00480A0BU
#define GPIO_53_SD1_C10x00480A0DU
#define GPIO_53_FSIRXA_D10x00480A0EU#define GPIO_54_GPIO540x00480C00U
#define GPIO_54_SPIA_SIMO0x00480C01U
#define GPIO_54_EMIF1_D300x00480C02U
#define GPIO_54_EMIF2_D140x00480C03U
#define GPIO_54_EQEP2_A0x00480C05U
#define GPIO_54_SCIB_TX0x00480C06U
#define GPIO_54_SD1_D40x00480C07U
#define GPIO_54_EMIF1_A100x00480C09U
#define GPIO_54_ENET_MII_RX_DATA20x00480C0BU
#define GPIO_54_SD1_C20x00480C0DU
#define GPIO_54_FSIRXA_CLK0x00480C0EU
#define GPIO_54_SSIA_TX0x00480C0FU#define GPIO_55_GPIO550x00480E00U
#define GPIO_55_SPIA_SOMI0x00480E01U
#define GPIO_55_EMIF1_D290x00480E02U
#define GPIO_55_EMIF2_D130x00480E03U
#define GPIO_55_EQEP2_B0x00480E05U
#define GPIO_55_SCIB_RX0x00480E06U
#define GPIO_55_SD1_C40x00480E07U
#define GPIO_55_EMIF1_D00x00480E09U
#define GPIO_55_ENET_MII_RX_DATA30x00480E0BU
#define GPIO_55_SD1_C30x00480E0DU
#define GPIO_55_FSITXB_D00x00480E0EU
#define GPIO_55_SSIA_RX0x00480E0FU#define GPIO_56_GPIO560x00481000U
#define GPIO_56_SPIA_CLK0x00481001U
#define GPIO_56_EMIF1_D280x00481002U
#define GPIO_56_EMIF2_D120x00481003U
#define GPIO_56_EQEP2_STROBE0x00481005U
#define GPIO_56_SCIC_TX0x00481006U
#define GPIO_56_SD2_D10x00481007U
#define GPIO_56_EMIF1_D10x00481009U
#define GPIO_56_I2CA_SDA0x0048100AU
#define GPIO_56_ENET_MII_TX_EN0x0048100BU
#define GPIO_56_SD1_C40x0048100DU
#define GPIO_56_FSITXB_CLK0x0048100EU
#define GPIO_56_SSIA_CLK0x0048100FU#define GPIO_57_GPIO570x00481200U
#define GPIO_57_SPIA_STEN0x00481201U
#define GPIO_57_EMIF1_D270x00481202U
#define GPIO_57_EMIF2_D110x00481203U
#define GPIO_57_EQEP2_INDEX0x00481205U
#define GPIO_57_SCIC_RX0x00481206U
#define GPIO_57_SD2_C10x00481207U
#define GPIO_57_EMIF1_D20x00481209U
#define GPIO_57_I2CA_SCL0x0048120AU
#define GPIO_57_ENET_MII_TX_ERR0x0048120BU
#define GPIO_57_FSITXB_D10x0048120EU
#define GPIO_57_SSIA_FSS0x0048120FU#define GPIO_58_GPIO580x00481400U
#define GPIO_58_MCLKRA0x00481401U
#define GPIO_58_EMIF1_D260x00481402U
#define GPIO_58_EMIF2_D100x00481403U
#define GPIO_58_OUTPUTXBAR10x00481405U
#define GPIO_58_SPIB_CLK0x00481406U
#define GPIO_58_SD2_D20x00481407U
#define GPIO_58_EMIF1_D30x00481409U
#define GPIO_58_ESC_LED_LINK0_ACTIVE0x0048140AU
#define GPIO_58_ENET_MII_TX_CLK0x0048140BU
#define GPIO_58_SD2_C20x0048140DU
#define GPIO_58_FSIRXB_D00x0048140EU
#define GPIO_58_SPIA_SIMO0x0048140FU#define GPIO_59_GPIO590x00481600U
#define GPIO_59_MFSRA0x00481601U
#define GPIO_59_EMIF1_D250x00481602U
#define GPIO_59_EMIF2_D90x00481603U
#define GPIO_59_OUTPUTXBAR20x00481605U
#define GPIO_59_SPIB_STEN0x00481606U
#define GPIO_59_SD2_C20x00481607U
#define GPIO_59_EMIF1_D40x00481609U
#define GPIO_59_ESC_LED_LINK1_ACTIVE0x0048160AU
#define GPIO_59_ENET_MII_TX_DATA00x0048160BU
#define GPIO_59_SD2_C30x0048160DU
#define GPIO_59_FSIRXB_D10x0048160EU
#define GPIO_59_SPIA_SOMI0x0048160FU#define GPIO_60_GPIO600x00481800U
#define GPIO_60_MCLKRB0x00481801U
#define GPIO_60_EMIF1_D240x00481802U
#define GPIO_60_EMIF2_D80x00481803U
#define GPIO_60_OUTPUTXBAR30x00481805U
#define GPIO_60_SPIB_SIMO0x00481806U
#define GPIO_60_SD2_D30x00481807U
#define GPIO_60_EMIF1_D50x00481809U
#define GPIO_60_ESC_LED_ERR0x0048180AU
#define GPIO_60_ENET_MII_TX_DATA10x0048180BU
#define GPIO_60_SD2_C40x0048180DU
#define GPIO_60_FSIRXB_CLK0x0048180EU
#define GPIO_60_SPIA_CLK0x0048180FU#define GPIO_61_GPIO610x00481A00U
#define GPIO_61_MFSRB0x00481A01U
#define GPIO_61_EMIF1_D230x00481A02U
#define GPIO_61_EMIF2_D70x00481A03U
#define GPIO_61_OUTPUTXBAR40x00481A05U
#define GPIO_61_SPIB_SOMI0x00481A06U
#define GPIO_61_SD2_C30x00481A07U
#define GPIO_61_EMIF1_D60x00481A09U
#define GPIO_61_ESC_LED_RUN0x00481A0AU
#define GPIO_61_ENET_MII_TX_DATA20x00481A0BU
#define GPIO_61_CANA_RX0x00481A0EU
#define GPIO_61_SPIA_STEN0x00481A0FU#define GPIO_62_GPIO620x00481C00U
#define GPIO_62_SCIC_RX0x00481C01U
#define GPIO_62_EMIF1_D220x00481C02U
#define GPIO_62_EMIF2_D60x00481C03U
#define GPIO_62_EQEP3_A0x00481C05U
#define GPIO_62_CANA_RX0x00481C06U
#define GPIO_62_SD2_D40x00481C07U
#define GPIO_62_EMIF1_D70x00481C09U
#define GPIO_62_ESC_LED_STATE_RUN0x00481C0AU
#define GPIO_62_ENET_MII_TX_DATA30x00481C0BU
#define GPIO_62_CANA_TX0x00481C0EU#define GPIO_63_GPIO630x00481E00U
#define GPIO_63_SCIC_TX0x00481E01U
#define GPIO_63_EMIF1_D210x00481E02U
#define GPIO_63_EMIF2_D50x00481E03U
#define GPIO_63_EQEP3_B0x00481E05U
#define GPIO_63_CANA_TX0x00481E06U
#define GPIO_63_SD2_C40x00481E07U
#define GPIO_63_SSIA_TX0x00481E09U
#define GPIO_63_ENET_MII_RX_DATA00x00481E0BU
#define GPIO_63_SD1_D10x00481E0DU
#define GPIO_63_ESC_RX1_DATA00x00481E0EU
#define GPIO_63_SPIB_SIMO0x00481E0FU#define GPIO_64_GPIO640x00860000U
#define GPIO_64_EMIF1_D200x00860002U
#define GPIO_64_EMIF2_D40x00860003U
#define GPIO_64_EQEP3_STROBE0x00860005U
#define GPIO_64_SCIA_RX0x00860006U
#define GPIO_64_SSIA_RX0x00860009U
#define GPIO_64_ENET_MII_RX_DV0x0086000AU
#define GPIO_64_ENET_MII_RX_DATA10x0086000BU
#define GPIO_64_SD1_C10x0086000DU
#define GPIO_64_ESC_RX1_DATA10x0086000EU
#define GPIO_64_SPIB_SOMI0x0086000FU#define GPIO_65_GPIO650x00860200U
#define GPIO_65_EMIF1_D190x00860202U
#define GPIO_65_EMIF2_D30x00860203U
#define GPIO_65_EQEP3_INDEX0x00860205U
#define GPIO_65_SCIA_TX0x00860206U
#define GPIO_65_SSIA_CLK0x00860209U
#define GPIO_65_ENET_MII_RX_ERR0x0086020AU
#define GPIO_65_ENET_MII_RX_DATA20x0086020BU
#define GPIO_65_SD1_D20x0086020DU
#define GPIO_65_ESC_RX1_DATA20x0086020EU
#define GPIO_65_SPIB_CLK0x0086020FU#define GPIO_66_GPIO660x00860400U
#define GPIO_66_EMIF1_D180x00860402U
#define GPIO_66_EMIF2_D20x00860403U
#define GPIO_66_I2CB_SDA0x00860406U
#define GPIO_66_SSIA_FSS0x00860409U
#define GPIO_66_ENET_MII_RX_DATA00x0086040AU
#define GPIO_66_ENET_MII_RX_DATA30x0086040BU
#define GPIO_66_SD1_C20x0086040DU
#define GPIO_66_ESC_RX1_DATA30x0086040EU
#define GPIO_66_SPIB_STEN0x0086040FU#define GPIO_67_GPIO670x00860600U
#define GPIO_67_EMIF1_D170x00860602U
#define GPIO_67_EMIF2_D10x00860603U
#define GPIO_67_ENET_MII_RX_CLK0x0086060AU
#define GPIO_67_ENET_REVMII_MDIO_RST0x0086060BU
#define GPIO_67_SD1_D30x0086060DU#define GPIO_68_GPIO680x00860800U
#define GPIO_68_EMIF1_D160x00860802U
#define GPIO_68_EMIF2_D00x00860803U
#define GPIO_68_ENET_MII_INTR0x0086080BU
#define GPIO_68_SD1_C30x0086080DU
#define GPIO_68_ESC_PHY1_LINKSTATUS0x0086080EU#define GPIO_69_GPIO690x00860A00U
#define GPIO_69_EMIF1_D150x00860A02U
#define GPIO_69_I2CB_SCL0x00860A06U
#define GPIO_69_ENET_MII_TX_EN0x00860A0AU
#define GPIO_69_ENET_MII_RX_CLK0x00860A0BU
#define GPIO_69_SD1_D40x00860A0DU
#define GPIO_69_ESC_RX1_CLK0x00860A0EU
#define GPIO_69_SPIC_SIMO0x00860A0FU#define GPIO_70_GPIO700x00860C00U
#define GPIO_70_EMIF1_D140x00860C02U
#define GPIO_70_CANA_RX0x00860C05U
#define GPIO_70_SCIB_TX0x00860C06U
#define GPIO_70_MCAN_RX0x00860C09U
#define GPIO_70_ENET_MII_RX_DV0x00860C0BU
#define GPIO_70_SD1_C40x00860C0DU
#define GPIO_70_ESC_RX1_DV0x00860C0EU
#define GPIO_70_SPIC_SOMI0x00860C0FU#define GPIO_71_GPIO710x00860E00U
#define GPIO_71_EMIF1_D130x00860E02U
#define GPIO_71_CANA_TX0x00860E05U
#define GPIO_71_SCIB_RX0x00860E06U
#define GPIO_71_MCAN_TX0x00860E09U
#define GPIO_71_ENET_MII_RX_DATA00x00860E0AU
#define GPIO_71_ENET_MII_RX_ERR0x00860E0BU
#define GPIO_71_ESC_RX1_ERR0x00860E0EU
#define GPIO_71_SPIC_CLK0x00860E0FU#define GPIO_72_GPIO720x00861000U
#define GPIO_72_EMIF1_D120x00861002U
#define GPIO_72_CANB_TX0x00861005U
#define GPIO_72_SCIC_TX0x00861006U
#define GPIO_72_ENET_MII_RX_DATA10x0086100AU
#define GPIO_72_ENET_MII_TX_DATA30x0086100BU
#define GPIO_72_ESC_TX1_DATA30x0086100EU
#define GPIO_72_SPIC_STEN0x0086100FU#define GPIO_73_GPIO730x00861200U
#define GPIO_73_EMIF1_D110x00861202U
#define GPIO_73_XCLKOUT0x00861203U
#define GPIO_73_CANB_RX0x00861205U
#define GPIO_73_SCIC_RX0x00861206U
#define GPIO_73_ENET_RMII_CLK0x0086120AU
#define GPIO_73_ENET_MII_TX_DATA20x0086120BU
#define GPIO_73_SD2_D20x0086120DU
#define GPIO_73_ESC_TX1_DATA20x0086120EU#define GPIO_74_GPIO740x00861400U
#define GPIO_74_EMIF1_D100x00861402U
#define GPIO_74_MCAN_TX0x00861409U
#define GPIO_74_ENET_MII_TX_DATA10x0086140BU
#define GPIO_74_SD2_C20x0086140DU
#define GPIO_74_ESC_TX1_DATA10x0086140EU#define GPIO_75_GPIO750x00861600U
#define GPIO_75_EMIF1_D90x00861602U
#define GPIO_75_MCAN_RX0x00861609U
#define GPIO_75_ENET_MII_TX_DATA00x0086160BU
#define GPIO_75_SD2_D30x0086160DU
#define GPIO_75_ESC_TX1_DATA00x0086160EU#define GPIO_76_GPIO760x00861800U
#define GPIO_76_EMIF1_D80x00861802U
#define GPIO_76_SCID_TX0x00861806U
#define GPIO_76_ENET_MII_RX_ERR0x0086180AU
#define GPIO_76_SD2_C30x0086180DU
#define GPIO_76_ESC_PHY_RESETN0x0086180EU#define GPIO_77_GPIO770x00861A00U
#define GPIO_77_EMIF1_D70x00861A02U
#define GPIO_77_SCID_RX0x00861A06U
#define GPIO_77_SD2_D40x00861A0DU
#define GPIO_77_ESC_RX0_CLK0x00861A0EU#define GPIO_78_GPIO780x00861C00U
#define GPIO_78_EMIF1_D60x00861C02U
#define GPIO_78_EQEP2_A0x00861C06U
#define GPIO_78_SD2_C40x00861C0DU
#define GPIO_78_ESC_RX0_DV0x00861C0EU#define GPIO_79_GPIO790x00861E00U
#define GPIO_79_EMIF1_D50x00861E02U
#define GPIO_79_EQEP2_B0x00861E06U
#define GPIO_79_SD2_D10x00861E0DU
#define GPIO_79_ESC_RX0_ERR0x00861E0EU#define GPIO_80_GPIO800x00880000U
#define GPIO_80_EMIF1_D40x00880002U
#define GPIO_80_EQEP2_STROBE0x00880006U
#define GPIO_80_SD2_C10x0088000DU
#define GPIO_80_ESC_RX0_DATA00x0088000EU#define GPIO_81_GPIO810x00880200U
#define GPIO_81_EMIF1_D30x00880202U
#define GPIO_81_EQEP2_INDEX0x00880206U
#define GPIO_81_ESC_RX0_DATA10x0088020EU#define GPIO_82_GPIO820x00880400U
#define GPIO_82_EMIF1_D20x00880402U
#define GPIO_82_ESC_RX0_DATA20x0088040EU#define GPIO_83_GPIO830x00880600U
#define GPIO_83_EMIF1_D10x00880602U
#define GPIO_83_ESC_RX0_DATA30x0088060EU#define GPIO_84_GPIO840x00880800U
#define GPIO_84_SCIA_TX0x00880805U
#define GPIO_84_MDXB0x00880806U
#define GPIO_84_UARTA_TX0x0088080BU
#define GPIO_84_ESC_TX0_ENA0x0088080EU
#define GPIO_84_MDXA0x0088080FU#define GPIO_85_GPIO850x00880A00U
#define GPIO_85_EMIF1_D00x00880A02U
#define GPIO_85_SCIA_RX0x00880A05U
#define GPIO_85_MDRB0x00880A06U
#define GPIO_85_UARTA_RX0x00880A0BU
#define GPIO_85_ESC_TX0_CLK0x00880A0EU
#define GPIO_85_MDRA0x00880A0FU#define GPIO_86_GPIO860x00880C00U
#define GPIO_86_EMIF1_A130x00880C02U
#define GPIO_86_EMIF1_CAS0x00880C03U
#define GPIO_86_SCIB_TX0x00880C05U
#define GPIO_86_MCLKXB0x00880C06U
#define GPIO_86_ESC_PHY0_LINKSTATUS0x00880C0EU
#define GPIO_86_MCLKXA0x00880C0FU#define GPIO_87_GPIO870x00880E00U
#define GPIO_87_EMIF1_A140x00880E02U
#define GPIO_87_EMIF1_RAS0x00880E03U
#define GPIO_87_SCIB_RX0x00880E05U
#define GPIO_87_MFSXB0x00880E06U
#define GPIO_87_EMIF1_DQM30x00880E09U
#define GPIO_87_ESC_TX0_DATA00x00880E0EU
#define GPIO_87_MFSXA0x00880E0FU#define GPIO_88_GPIO880x00881000U
#define GPIO_88_EMIF1_A150x00881002U
#define GPIO_88_EMIF1_DQM00x00881003U
#define GPIO_88_EMIF1_DQM10x00881009U
#define GPIO_88_ESC_TX0_DATA10x0088100EU#define GPIO_89_GPIO890x00881200U
#define GPIO_89_EMIF1_A160x00881202U
#define GPIO_89_EMIF1_DQM10x00881203U
#define GPIO_89_SCIC_TX0x00881206U
#define GPIO_89_EMIF1_CAS0x00881209U
#define GPIO_89_ESC_TX0_DATA20x0088120EU#define GPIO_90_GPIO900x00881400U
#define GPIO_90_EMIF1_A170x00881402U
#define GPIO_90_EMIF1_DQM20x00881403U
#define GPIO_90_SCIC_RX0x00881406U
#define GPIO_90_EMIF1_RAS0x00881409U
#define GPIO_90_ESC_TX0_DATA30x0088140EU#define GPIO_91_GPIO910x00881600U
#define GPIO_91_EMIF1_A180x00881602U
#define GPIO_91_EMIF1_DQM30x00881603U
#define GPIO_91_I2CA_SDA0x00881606U
#define GPIO_91_EMIF1_DQM20x00881609U
#define GPIO_91_PMBUSA_SCL0x0088160AU
#define GPIO_91_SSIA_TX0x0088160BU
#define GPIO_91_FSIRXF_D00x0088160DU
#define GPIO_91_CLB_OUTPUTXBAR10x0088160EU
#define GPIO_91_SPID_SIMO0x0088160FU#define GPIO_92_GPIO920x00881800U
#define GPIO_92_EMIF1_A190x00881802U
#define GPIO_92_EMIF1_BA10x00881803U
#define GPIO_92_I2CA_SCL0x00881806U
#define GPIO_92_EMIF1_DQM00x00881809U
#define GPIO_92_PMBUSA_SDA0x0088180AU
#define GPIO_92_SSIA_RX0x0088180BU
#define GPIO_92_FSIRXF_D10x0088180DU
#define GPIO_92_CLB_OUTPUTXBAR20x0088180EU
#define GPIO_92_SPID_SOMI0x0088180FU#define GPIO_93_GPIO930x00881A00U
#define GPIO_93_EMIF1_BA00x00881A03U
#define GPIO_93_SCID_TX0x00881A06U
#define GPIO_93_PMBUSA_ALERT0x00881A0AU
#define GPIO_93_SSIA_CLK0x00881A0BU
#define GPIO_93_FSIRXF_CLK0x00881A0DU
#define GPIO_93_CLB_OUTPUTXBAR30x00881A0EU
#define GPIO_93_SPID_CLK0x00881A0FU#define GPIO_94_GPIO940x00881C00U
#define GPIO_94_SCID_RX0x00881C06U
#define GPIO_94_EMIF1_BA10x00881C09U
#define GPIO_94_PMBUSA_CTL0x00881C0AU
#define GPIO_94_SSIA_FSS0x00881C0BU
#define GPIO_94_FSIRXG_D00x00881C0DU
#define GPIO_94_CLB_OUTPUTXBAR40x00881C0EU
#define GPIO_94_SPID_STEN0x00881C0FU#define GPIO_95_GPIO950x00881E00U
#define GPIO_95_EMIF2_A120x00881E03U
#define GPIO_95_FSIRXG_D10x00881E0DU
#define GPIO_95_CLB_OUTPUTXBAR50x00881E0EU#define GPIO_96_GPIO960x00C60000U
#define GPIO_96_EMIF2_DQM10x00C60003U
#define GPIO_96_EQEP1_A0x00C60005U
#define GPIO_96_FSIRXG_CLK0x00C6000DU
#define GPIO_96_CLB_OUTPUTXBAR60x00C6000EU#define GPIO_97_GPIO970x00C60200U
#define GPIO_97_EMIF2_DQM00x00C60203U
#define GPIO_97_EQEP1_B0x00C60205U
#define GPIO_97_FSIRXH_D00x00C6020DU
#define GPIO_97_CLB_OUTPUTXBAR70x00C6020EU#define GPIO_98_GPIO980x00C60400U
#define GPIO_98_EMIF2_A00x00C60403U
#define GPIO_98_EQEP1_STROBE0x00C60405U
#define GPIO_98_FSIRXH_D10x00C6040DU
#define GPIO_98_CLB_OUTPUTXBAR80x00C6040EU#define GPIO_99_GPIO990x00C60600U
#define GPIO_99_EMIF2_A10x00C60603U
#define GPIO_99_EQEP1_INDEX0x00C60605U
#define GPIO_99_FSIRXH_CLK0x00C6060DU#define GPIO_100_GPIO1000x00C60800U
#define GPIO_100_EMIF2_A20x00C60803U
#define GPIO_100_EQEP2_A0x00C60805U
#define GPIO_100_SPIC_SIMO0x00C60806U
#define GPIO_100_ESC_GPI00x00C6080AU
#define GPIO_100_FSITXA_D00x00C6080DU#define GPIO_101_GPIO1010x00C60A00U
#define GPIO_101_EMIF2_A30x00C60A03U
#define GPIO_101_EQEP2_B0x00C60A05U
#define GPIO_101_SPIC_SOMI0x00C60A06U
#define GPIO_101_ESC_GPI10x00C60A0AU
#define GPIO_101_FSITXA_D10x00C60A0DU#define GPIO_102_GPIO1020x00C60C00U
#define GPIO_102_EMIF2_A40x00C60C03U
#define GPIO_102_EQEP2_STROBE0x00C60C05U
#define GPIO_102_SPIC_CLK0x00C60C06U
#define GPIO_102_ESC_GPI20x00C60C0AU
#define GPIO_102_FSITXA_CLK0x00C60C0DU#define GPIO_103_GPIO1030x00C60E00U
#define GPIO_103_EMIF2_A50x00C60E03U
#define GPIO_103_EQEP2_INDEX0x00C60E05U
#define GPIO_103_SPIC_STEN0x00C60E06U
#define GPIO_103_ESC_GPI30x00C60E0AU
#define GPIO_103_FSIRXA_D00x00C60E0DU#define GPIO_104_GPIO1040x00C61000U
#define GPIO_104_I2CA_SDA0x00C61001U
#define GPIO_104_EMIF2_A60x00C61003U
#define GPIO_104_EQEP3_A0x00C61005U
#define GPIO_104_SCID_TX0x00C61006U
#define GPIO_104_ESC_GPI40x00C6100AU
#define GPIO_104_CM_I2CA_SDA0x00C6100BU
#define GPIO_104_FSIRXA_D10x00C6100DU#define GPIO_105_GPIO1050x00C61200U
#define GPIO_105_I2CA_SCL0x00C61201U
#define GPIO_105_EMIF2_A70x00C61203U
#define GPIO_105_EQEP3_B0x00C61205U
#define GPIO_105_SCID_RX0x00C61206U
#define GPIO_105_ESC_GPI50x00C6120AU
#define GPIO_105_CM_I2CA_SCL0x00C6120BU
#define GPIO_105_FSIRXA_CLK0x00C6120DU
#define GPIO_105_ENET_MDIO_CLK0x00C6120EU#define GPIO_106_GPIO1060x00C61400U
#define GPIO_106_EMIF2_A80x00C61403U
#define GPIO_106_EQEP3_STROBE0x00C61405U
#define GPIO_106_SCIC_TX0x00C61406U
#define GPIO_106_ESC_GPI60x00C6140AU
#define GPIO_106_FSITXB_D00x00C6140DU
#define GPIO_106_ENET_MDIO_DATA0x00C6140EU#define GPIO_107_GPIO1070x00C61600U
#define GPIO_107_EMIF2_A90x00C61603U
#define GPIO_107_EQEP3_INDEX0x00C61605U
#define GPIO_107_SCIC_RX0x00C61606U
#define GPIO_107_ESC_GPI70x00C6160AU
#define GPIO_107_FSITXB_D10x00C6160DU
#define GPIO_107_ENET_REVMII_MDIO_RST0x00C6160EU#define GPIO_108_GPIO1080x00C61800U
#define GPIO_108_EMIF2_A100x00C61803U
#define GPIO_108_ESC_GPI80x00C6180AU
#define GPIO_108_FSITXB_CLK0x00C6180DU
#define GPIO_108_ENET_MII_INTR0x00C6180EU#define GPIO_109_GPIO1090x00C61A00U
#define GPIO_109_EMIF2_A110x00C61A03U
#define GPIO_109_ESC_GPI90x00C61A0AU
#define GPIO_109_ENET_MII_CRS0x00C61A0EU#define GPIO_110_GPIO1100x00C61C00U
#define GPIO_110_EMIF2_WAIT0x00C61C03U
#define GPIO_110_ESC_GPI100x00C61C0AU
#define GPIO_110_FSIRXB_D00x00C61C0DU
#define GPIO_110_ENET_MII_COL0x00C61C0EU#define GPIO_111_GPIO1110x00C61E00U
#define GPIO_111_EMIF2_BA00x00C61E03U
#define GPIO_111_ESC_GPI110x00C61E0AU
#define GPIO_111_FSIRXB_D10x00C61E0DU
#define GPIO_111_ENET_MII_RX_CLK0x00C61E0EU#define GPIO_112_GPIO1120x00C80000U
#define GPIO_112_EMIF2_BA10x00C80003U
#define GPIO_112_ESC_GPI120x00C8000AU
#define GPIO_112_FSIRXB_CLK0x00C8000DU
#define GPIO_112_ENET_MII_RX_DV0x00C8000EU#define GPIO_113_GPIO1130x00C80200U
#define GPIO_113_EMIF2_CAS0x00C80203U
#define GPIO_113_ESC_GPI130x00C8020AU
#define GPIO_113_ENET_MII_RX_ERR0x00C8020EU#define GPIO_114_GPIO1140x00C80400U
#define GPIO_114_EMIF2_RAS0x00C80403U
#define GPIO_114_ESC_GPI140x00C8040AU
#define GPIO_114_ENET_MII_RX_DATA00x00C8040EU#define GPIO_115_GPIO1150x00C80600U
#define GPIO_115_EMIF2_CS0N0x00C80603U
#define GPIO_115_OUTPUTXBAR50x00C80605U
#define GPIO_115_ESC_GPI150x00C8060AU
#define GPIO_115_FSIRXC_D00x00C8060DU
#define GPIO_115_ENET_MII_RX_DATA10x00C8060EU#define GPIO_116_GPIO1160x00C80800U
#define GPIO_116_EMIF2_CS2N0x00C80803U
#define GPIO_116_OUTPUTXBAR60x00C80805U
#define GPIO_116_ESC_GPI160x00C8080AU
#define GPIO_116_FSIRXC_D10x00C8080DU
#define GPIO_116_ENET_MII_RX_DATA20x00C8080EU#define GPIO_117_GPIO1170x00C80A00U
#define GPIO_117_EMIF2_SDCKE0x00C80A03U
#define GPIO_117_ESC_GPI170x00C80A0AU
#define GPIO_117_FSIRXC_CLK0x00C80A0DU
#define GPIO_117_ENET_MII_RX_DATA30x00C80A0EU#define GPIO_118_GPIO1180x00C80C00U
#define GPIO_118_EMIF2_CLK0x00C80C03U
#define GPIO_118_ESC_GPI180x00C80C0AU
#define GPIO_118_FSIRXD_D00x00C80C0DU
#define GPIO_118_ENET_MII_TX_EN0x00C80C0EU#define GPIO_119_GPIO1190x00C80E00U
#define GPIO_119_EMIF2_RNW0x00C80E03U
#define GPIO_119_ESC_GPI190x00C80E0AU
#define GPIO_119_FSIRXD_D10x00C80E0DU
#define GPIO_119_ENET_MII_TX_ERR0x00C80E0EU#define GPIO_120_GPIO1200x00C81000U
#define GPIO_120_EMIF2_WEN0x00C81003U
#define GPIO_120_ESC_GPI200x00C8100AU
#define GPIO_120_FSIRXD_CLK0x00C8100DU
#define GPIO_120_ENET_MII_TX_CLK0x00C8100EU#define GPIO_121_GPIO1210x00C81200U
#define GPIO_121_EMIF2_OEN0x00C81203U
#define GPIO_121_ESC_GPI210x00C8120AU
#define GPIO_121_FSIRXE_D00x00C8120DU
#define GPIO_121_ENET_MII_TX_DATA00x00C8120EU#define GPIO_122_GPIO1220x00C81400U
#define GPIO_122_EMIF2_D150x00C81403U
#define GPIO_122_SPIC_SIMO0x00C81406U
#define GPIO_122_SD1_D10x00C81407U
#define GPIO_122_ESC_GPI220x00C8140AU
#define GPIO_122_ENET_MII_TX_DATA10x00C8140EU#define GPIO_123_GPIO1230x00C81600U
#define GPIO_123_EMIF2_D140x00C81603U
#define GPIO_123_SPIC_SOMI0x00C81606U
#define GPIO_123_SD1_C10x00C81607U
#define GPIO_123_ESC_GPI230x00C8160AU
#define GPIO_123_ENET_MII_TX_DATA20x00C8160EU#define GPIO_124_GPIO1240x00C81800U
#define GPIO_124_EMIF2_D130x00C81803U
#define GPIO_124_SPIC_CLK0x00C81806U
#define GPIO_124_SD1_D20x00C81807U
#define GPIO_124_ESC_GPI240x00C8180AU
#define GPIO_124_ENET_MII_TX_DATA30x00C8180EU#define GPIO_125_GPIO1250x00C81A00U
#define GPIO_125_EMIF2_D120x00C81A03U
#define GPIO_125_SPIC_STEN0x00C81A06U
#define GPIO_125_SD1_C20x00C81A07U
#define GPIO_125_ESC_GPI250x00C81A0AU
#define GPIO_125_FSIRXE_D10x00C81A0DU
#define GPIO_125_ESC_LATCH00x00C81A0EU#define GPIO_126_GPIO1260x00C81C00U
#define GPIO_126_EMIF2_D110x00C81C03U
#define GPIO_126_SD1_D30x00C81C07U
#define GPIO_126_ESC_GPI260x00C81C0AU
#define GPIO_126_FSIRXE_CLK0x00C81C0DU
#define GPIO_126_ESC_LATCH10x00C81C0EU#define GPIO_127_GPIO1270x00C81E00U
#define GPIO_127_EMIF2_D100x00C81E03U
#define GPIO_127_SD1_C30x00C81E07U
#define GPIO_127_ESC_GPI270x00C81E0AU
#define GPIO_127_ESC_SYNC00x00C81E0EU#define GPIO_128_GPIO1280x01060000U
#define GPIO_128_EMIF2_D90x01060003U
#define GPIO_128_SD1_D40x01060007U
#define GPIO_128_ESC_GPI280x0106000AU
#define GPIO_128_ESC_SYNC10x0106000EU#define GPIO_129_GPIO1290x01060200U
#define GPIO_129_EMIF2_D80x01060203U
#define GPIO_129_SD1_C40x01060207U
#define GPIO_129_ESC_GPI290x0106020AU
#define GPIO_129_ESC_TX1_ENA0x0106020EU#define GPIO_130_GPIO1300x01060400U
#define GPIO_130_EMIF2_D70x01060403U
#define GPIO_130_SD2_D10x01060407U
#define GPIO_130_ESC_GPI300x0106040AU
#define GPIO_130_ESC_TX1_CLK0x0106040EU#define GPIO_131_GPIO1310x01060600U
#define GPIO_131_EMIF2_D60x01060603U
#define GPIO_131_SD2_C10x01060607U
#define GPIO_131_ESC_GPI310x0106060AU
#define GPIO_131_ESC_TX1_DATA00x0106060EU#define GPIO_132_GPIO1320x01060800U
#define GPIO_132_EMIF2_D50x01060803U
#define GPIO_132_SD2_D20x01060807U
#define GPIO_132_ESC_GPO00x0106080AU
#define GPIO_132_ESC_TX1_DATA10x0106080EU#define GPIO_133_GPIO1330x01060A00U
#define GPIO_133_SD2_C20x01060A07U#define GPIO_134_GPIO1340x01060C00U
#define GPIO_134_EMIF2_D40x01060C03U
#define GPIO_134_SD2_D30x01060C07U
#define GPIO_134_ESC_GPO10x01060C0AU
#define GPIO_134_ESC_TX1_DATA20x01060C0EU#define GPIO_135_GPIO1350x01060E00U
#define GPIO_135_EMIF2_D30x01060E03U
#define GPIO_135_SCIA_TX0x01060E06U
#define GPIO_135_SD2_C30x01060E07U
#define GPIO_135_ESC_GPO20x01060E0AU
#define GPIO_135_ESC_TX1_DATA30x01060E0EU#define GPIO_136_GPIO1360x01061000U
#define GPIO_136_EMIF2_D20x01061003U
#define GPIO_136_SCIA_RX0x01061006U
#define GPIO_136_SD2_D40x01061007U
#define GPIO_136_ESC_GPO30x0106100AU
#define GPIO_136_ESC_RX1_DV0x0106100EU#define GPIO_137_GPIO1370x01061200U
#define GPIO_137_EPWM13A0x01061201U
#define GPIO_137_EMIF2_D10x01061203U
#define GPIO_137_SCIB_TX0x01061206U
#define GPIO_137_SD2_C40x01061207U
#define GPIO_137_ESC_GPO40x0106120AU
#define GPIO_137_ESC_RX1_CLK0x0106120EU#define GPIO_138_GPIO1380x01061400U
#define GPIO_138_EPWM13B0x01061401U
#define GPIO_138_EMIF2_D00x01061403U
#define GPIO_138_SCIB_RX0x01061406U
#define GPIO_138_ESC_GPO50x0106140AU
#define GPIO_138_ESC_RX1_ERR0x0106140EU#define GPIO_139_GPIO1390x01061600U
#define GPIO_139_EPWM14A0x01061601U
#define GPIO_139_SCIC_RX0x01061606U
#define GPIO_139_ESC_GPO60x0106160AU
#define GPIO_139_ESC_RX1_DATA00x0106160EU#define GPIO_140_GPIO1400x01061800U
#define GPIO_140_EPWM14B0x01061801U
#define GPIO_140_SCIC_TX0x01061806U
#define GPIO_140_ESC_GPO70x0106180AU
#define GPIO_140_ESC_RX1_DATA10x0106180EU#define GPIO_141_GPIO1410x01061A00U
#define GPIO_141_EPWM15A0x01061A01U
#define GPIO_141_SCID_RX0x01061A06U
#define GPIO_141_ESC_GPO80x01061A0AU
#define GPIO_141_ESC_RX1_DATA20x01061A0EU#define GPIO_142_GPIO1420x01061C00U
#define GPIO_142_EPWM15B0x01061C01U
#define GPIO_142_SCID_TX0x01061C06U
#define GPIO_142_ESC_GPO90x01061C0AU
#define GPIO_142_ESC_RX1_DATA30x01061C0EU#define GPIO_143_GPIO1430x01061E00U
#define GPIO_143_EPWM16A0x01061E01U
#define GPIO_143_ESC_GPO100x01061E0AU
#define GPIO_143_ESC_LED_LINK0_ACTIVE0x01061E0EU#define GPIO_144_GPIO1440x01080000U
#define GPIO_144_EPWM16B0x01080001U
#define GPIO_144_ESC_GPO110x0108000AU
#define GPIO_144_ESC_LED_LINK1_ACTIVE0x0108000EU#define GPIO_145_GPIO1450x01080200U
#define GPIO_145_EPWM1A0x01080201U
#define GPIO_145_ESC_GPO120x0108020AU
#define GPIO_145_ESC_LED_ERR0x0108020EU#define GPIO_146_GPIO1460x01080400U
#define GPIO_146_EPWM1B0x01080401U
#define GPIO_146_ESC_GPO130x0108040AU
#define GPIO_146_ESC_LED_RUN0x0108040EU#define GPIO_147_GPIO1470x01080600U
#define GPIO_147_EPWM2A0x01080601U
#define GPIO_147_ESC_GPO140x0108060AU
#define GPIO_147_ESC_LED_STATE_RUN0x0108060EU#define GPIO_148_GPIO1480x01080800U
#define GPIO_148_EPWM2B0x01080801U
#define GPIO_148_ESC_GPO150x0108080AU
#define GPIO_148_ESC_PHY0_LINKSTATUS0x0108080EU#define GPIO_149_GPIO1490x01080A00U
#define GPIO_149_EPWM3A0x01080A01U
#define GPIO_149_ESC_GPO160x01080A0AU
#define GPIO_149_ESC_PHY1_LINKSTATUS0x01080A0EU#define GPIO_150_GPIO1500x01080C00U
#define GPIO_150_EPWM3B0x01080C01U
#define GPIO_150_ESC_GPO170x01080C0AU
#define GPIO_150_ESC_I2C_SDA0x01080C0EU#define GPIO_151_GPIO1510x01080E00U
#define GPIO_151_EPWM4A0x01080E01U
#define GPIO_151_ESC_GPO180x01080E0AU
#define GPIO_151_ESC_I2C_SCL0x01080E0EU#define GPIO_152_GPIO1520x01081000U
#define GPIO_152_EPWM4B0x01081001U
#define GPIO_152_ESC_GPO190x0108100AU
#define GPIO_152_ESC_MDIO_CLK0x0108100EU#define GPIO_153_GPIO1530x01081200U
#define GPIO_153_EPWM5A0x01081201U
#define GPIO_153_ESC_GPO200x0108120AU
#define GPIO_153_ESC_MDIO_DATA0x0108120EU#define GPIO_154_GPIO1540x01081400U
#define GPIO_154_EPWM5B0x01081401U
#define GPIO_154_ESC_GPO210x0108140AU
#define GPIO_154_ESC_PHY_CLK0x0108140EU#define GPIO_155_GPIO1550x01081600U
#define GPIO_155_EPWM6A0x01081601U
#define GPIO_155_ESC_GPO220x0108160AU
#define GPIO_155_ESC_PHY_RESETN0x0108160EU#define GPIO_156_GPIO1560x01081800U
#define GPIO_156_EPWM6B0x01081801U
#define GPIO_156_ESC_GPO230x0108180AU
#define GPIO_156_ESC_TX0_ENA0x0108180EU#define GPIO_157_GPIO1570x01081A00U
#define GPIO_157_EPWM7A0x01081A01U
#define GPIO_157_ESC_GPO240x01081A0AU
#define GPIO_157_ESC_TX0_CLK0x01081A0EU#define GPIO_158_GPIO1580x01081C00U
#define GPIO_158_EPWM7B0x01081C01U
#define GPIO_158_ESC_GPO250x01081C0AU
#define GPIO_158_ESC_TX0_DATA00x01081C0EU#define GPIO_159_GPIO1590x01081E00U
#define GPIO_159_EPWM8A0x01081E01U
#define GPIO_159_ESC_GPO260x01081E0AU
#define GPIO_159_ESC_TX0_DATA10x01081E0EU#define GPIO_160_GPIO1600x01460000U
#define GPIO_160_EPWM8B0x01460001U
#define GPIO_160_ESC_GPO270x0146000AU
#define GPIO_160_ESC_TX0_DATA20x0146000EU#define GPIO_161_GPIO1610x01460200U
#define GPIO_161_EPWM9A0x01460201U
#define GPIO_161_ESC_GPO280x0146020AU
#define GPIO_161_ESC_TX0_DATA30x0146020EU#define GPIO_162_GPIO1620x01460400U
#define GPIO_162_EPWM9B0x01460401U
#define GPIO_162_ESC_GPO290x0146040AU
#define GPIO_162_ESC_RX0_DV0x0146040EU#define GPIO_163_GPIO1630x01460600U
#define GPIO_163_EPWM10A0x01460601U
#define GPIO_163_ESC_GPO300x0146060AU
#define GPIO_163_ESC_RX0_CLK0x0146060EU#define GPIO_164_GPIO1640x01460800U
#define GPIO_164_EPWM10B0x01460801U
#define GPIO_164_ESC_GPO310x0146080AU
#define GPIO_164_ESC_RX0_ERR0x0146080EU#define GPIO_165_GPIO1650x01460A00U
#define GPIO_165_EPWM11A0x01460A01U
#define GPIO_165_MDXA0x01460A0AU
#define GPIO_165_ESC_RX0_DATA00x01460A0EU#define GPIO_166_GPIO1660x01460C00U
#define GPIO_166_EPWM11B0x01460C01U
#define GPIO_166_MDRA0x01460C0AU
#define GPIO_166_ESC_RX0_DATA10x01460C0EU#define GPIO_167_GPIO1670x01460E00U
#define GPIO_167_EPWM12A0x01460E01U
#define GPIO_167_MCLKXA0x01460E0AU
#define GPIO_167_ESC_RX0_DATA20x01460E0EU#define GPIO_168_GPIO1680x01461000U
#define GPIO_168_EPWM12B0x01461001U
#define GPIO_168_MFSXA0x0146100AU
#define GPIO_168_ESC_RX0_DATA30x0146100EU#endif // PIN_MAP_H

user6355257:

回复 Susan Yang:

对对对,就是这个。
哦,对了,还想请教一下,上面168个引脚的定义,可否像FPGA一样,更改对应的功能。
更改后,是否能起作用。
就像帖子一开始,例程中定义引脚GPIO8的功能是SCIATX,我是否可以将GPIO8定义为SCIARX,然后进行编程使用。
GPIO8的多路复用引脚中没有我这种想法的定义。

打扰了
谢谢

user6355257:

回复 Susan Yang:

突然感觉想法有些问题。
想法是将F28388D的GPIO8的功能与GPIO9的功能互换,然后连接232进行使用。
请教一下,是不是不可行。
我想着,得到回复后,按照我的想法测试一下去

user6355257:

回复 Susan Yang:

明白了,谢谢您

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