TMS320F280023 ADC-TI中文支持网

可以烧写！
280023还有关于AD设置，设置采样通道参考电压为内部3.3V，但外部AD采样引脚(PIN11)上的电压为1.65V时，AdcaResultRegs.ADCRESULT0 结果为1024，不应该为2048吗？12位AD。并且VREFHI引脚上没有电压输出，硬件上PIN12-VREFHI 引脚悬空。
#define ADC_usDELAY 1000L
//—————————————————————————
// InitAdc:
//—————————————————————————
// This function initializes ADC to a known state.
//
// NOTE: ADC INIT IS DIFFERENT ON 2803x DEVICES COMPARED TO OTHER 28X DEVICES
//
#define AD_ACQPS 11
void InitAdc(void)
{
//
// Setup VREF as internal
//
SetVREF(ADC_ADCA, ADC_INTERNAL, ADC_VREF3P3);
//
// Set ADCCLK divider to /4 100M/4=25M
//
ADC_setPrescaler(ADCA_BASE, ADC_CLK_DIV_4_0);
//
// Set pulse positions to late
//
ADC_setInterruptPulseMode(ADCA_BASE, ADC_PULSE_END_OF_CONV);
//
// Power up the ADC and then delay for 1 ms
//
ADC_enableConverter(ADCA_BASE);
DELAY_US(ADC_usDELAY); // Delay before converting ADC channels
//
// Select the channels to convert and the end of conversion flag
//
EALLOW;
AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1; //ADCINT1 trips after AdcResults latch
AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1; //Enabled ADCINT1
AdcaRegs.ADCINTSEL1N2.bit.INT1CONT = 0; //Disable ADCINT1 Continuous mode
AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 7; //setup EOC7 to trigger ADCINT1 to fire
AdcaRegs.ADCSOC0CTL.bit.CHSEL = 0; // SOC0 will convert pin A1
// 0:A0 1:A1 2:A2 3:A3
// 4:A4 5:A5 6:A6 7:A7
// 8:A8 9:A9 A:A10 B:A11
// C:A12 D:A13 E:A14 F:A15
AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 0; //set SOC0 start trigger Software only.
AdcaRegs.ADCSOC0CTL.bit.ACQPS = AD_ACQPS; //set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC1CTL.bit.CHSEL = 1; //set SOC1 channel select to ADCINA0 (INVT-AD)
AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 0; //set SOC1 start trigger Software only.
AdcaRegs.ADCSOC1CTL.bit.ACQPS = AD_ACQPS; //set SOC1 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC2CTL.bit.CHSEL = 2; //set SOC2 channel select to ADCINA1 (IUI-AD)
AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = 0; //set SOC2 start trigger Software only.
AdcaRegs.ADCSOC2CTL.bit.ACQPS = AD_ACQPS; //set SOC2 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC3CTL.bit.CHSEL = 3; //set SOC3 channel select to ADCINA2 (IVI-AD)
AdcaRegs.ADCSOC3CTL.bit.TRIGSEL = 0; //set SOC3 start trigger Software only.
AdcaRegs.ADCSOC3CTL.bit.ACQPS = AD_ACQPS; //set SOC3 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC4CTL.bit.CHSEL = 5; //set SOC4 channel select to ADCINA3 (IWI-AD)
AdcaRegs.ADCSOC4CTL.bit.TRIGSEL = 0; //set SOC4 start trigger Software only.
AdcaRegs.ADCSOC4CTL.bit.ACQPS = AD_ACQPS; //set SOC4 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC5CTL.bit.CHSEL = 6; //set SOC5 channel select to ADCINA4 (AI1-AD)
AdcaRegs.ADCSOC5CTL.bit.TRIGSEL = 0; //set SOC5 start trigger Software only.
AdcaRegs.ADCSOC5CTL.bit.ACQPS = AD_ACQPS; //set SOC5 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC6CTL.bit.CHSEL = 7; //set SOC0 channel select to ADCINA6 (AI2-AD)
AdcaRegs.ADCSOC6CTL.bit.TRIGSEL = 0; //set SOC0 start trigger Software only.
AdcaRegs.ADCSOC6CTL.bit.ACQPS = AD_ACQPS; //set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC7CTL.bit.CHSEL = 12; //set SOC1 channel select to ADCINA7 (AI3-AD)
AdcaRegs.ADCSOC7CTL.bit.TRIGSEL = 0; //set SOC1 start trigger Software only.
AdcaRegs.ADCSOC7CTL.bit.ACQPS = AD_ACQPS; //set SOC1 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC8CTL.bit.CHSEL = 8; //set SOC0 channel select to ADCINB0 (DI1-DSP)
AdcaRegs.ADCSOC8CTL.bit.TRIGSEL = 4; //set SOC0 start trigger Software only.
AdcaRegs.ADCSOC8CTL.bit.ACQPS = AD_ACQPS; //set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC9CTL.bit.CHSEL = 9; //set SOC1 channel select to ADCINB1 (DI2-DSP)
AdcaRegs.ADCSOC9CTL.bit.TRIGSEL = 4; //set SOC1 start trigger Software only.
AdcaRegs.ADCSOC9CTL.bit.ACQPS = AD_ACQPS; //set SOC1 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC10CTL.bit.CHSEL = 10; //set SOC0 channel select to ADCINB2 (DI3-DSP)
AdcaRegs.ADCSOC10CTL.bit.TRIGSEL = 4; //set SOC0 start trigger Software only.
AdcaRegs.ADCSOC10CTL.bit.ACQPS = AD_ACQPS; //set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC11CTL.bit.CHSEL = 11; //set SOC1 channel select to ADCINB3 (DI4-DSP)
AdcaRegs.ADCSOC11CTL.bit.TRIGSEL = 4; //set SOC1 start trigger Software only.
AdcaRegs.ADCSOC11CTL.bit.ACQPS = AD_ACQPS; //set SOC1 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC12CTL.bit.CHSEL = 12; //set SOC0 channel select to ADCINB4 (DI6-DSP)
AdcaRegs.ADCSOC12CTL.bit.TRIGSEL = 4; //set SOC0 start trigger Software only.
AdcaRegs.ADCSOC12CTL.bit.ACQPS = AD_ACQPS; //set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC13CTL.bit.CHSEL = 3; //set SOC1 channel select to ADCINB5 (NO)
AdcaRegs.ADCSOC13CTL.bit.TRIGSEL = 4; //set SOC1 start trigger Software only.
AdcaRegs.ADCSOC13CTL.bit.ACQPS = AD_ACQPS; //set SOC1 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC14CTL.bit.CHSEL = 14; //set SOC0 channel select to ADCINB6 (LPE-DSP)
AdcaRegs.ADCSOC14CTL.bit.TRIGSEL = 4; //set SOC0 start trigger Software only.
AdcaRegs.ADCSOC14CTL.bit.ACQPS = AD_ACQPS; //set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcaRegs.ADCSOC15CTL.bit.CHSEL = 15; //set SOC1 channel select to ADCINB7 (SOFTE-DSP)
AdcaRegs.ADCSOC15CTL.bit.TRIGSEL = 4; //set SOC1 start trigger Software only.
AdcaRegs.ADCSOC15CTL.bit.ACQPS = AD_ACQPS; //set SOC1 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
EDIS;
}