TI中文支持网
TI专业的中文技术问题咨询交流网站

The design of SN74LVC1G07 will causing latch-up?

Dear Sir,

We are using SN74LVC1G07 for 3.3V UART to 1.8V UART. The VCC=1.8V, A port = 3.3V input, Y port = 1.8V output. The design of SN74LVC1G07 is shown in below.

Does this design will casuing latch-up? 

Annie Liu:

您的问题在E2E英文论坛已有工程师跟进,请继续关注。https://e2e.ti.com/support/logic/f/151/p/922384/3407522

赞(0)
未经允许不得转载:TI中文支持网 » The design of SN74LVC1G07 will causing latch-up?
分享到: 更多 (0)