TI中文支持网你好：
看规格书有这样一句话，请问怎么理解1-V LDO bypass and PA LDO 。原理设计需要注意什么。谢谢
Three simultaneous transmitter operation is supported only in 1-V LDO bypass and PA LDO disable mode. In this mode 1V supply
needs to be fed on the VOUT PA pin.
Long Lee：
还有这句话：3 Transmitters can simultaneously be deployed only in AWR1243P device with 1V / LDO bypass and PA LDO disable mode. In this
mode 1V supply needs to be fed on the VOUT PA pin. In this case the peak 1V supply current goes up to 2500 mA
1V LDO和1.3V是什么关系。如何理解
Long Lee：
回复 Shine:
你好 shine:
我想了解下AWR1243的频率大概每秒多少帧规格书没有查到该项描述。谢谢。
Shine：
回复 Long Lee:
请参考下面的文档。
www.ti.com/…/swra553a.pdf
