TI中文支持网Part Number:TMS320F280049C
在CLA中调用GPIO_writePin和GPIO_togglePin，IO没有反应
请问该如何解决?
Taylor：
您好，
已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
,
YuanZe Wang：
GPIO要配置由CPU控制或CLA控制
,
John Pan：
好的，可以了，谢谢
TMS320F280039C: CCS12.1.0 build程序会卡住不动
Part Number:TMS320F280039C
我的电脑CPU为i5-12450H，编译构建程序总是会卡在某个进度不动。
从Project->Clean… 编译并构建程序，进度一定会卡在49%或者64%, Cancel Operation后再点击Build(锤子)通常可以编译成功，这导致我build程序很不顺畅，这是为什么呢？我本来以为是CPU不足，试过限制编译线程（-j 8 -> -j 2, 甚至关闭并行编译），问题没有改善。麻烦帮助排查解决！！感谢！！
Taylor：
您好，
已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
TMS320F280049C: CLA无法运行，卡死在CLASin函数查表过程
Part Number:TMS320F280049C
问题前述：已经成功配置CLA以及CLAmath库，并且在CLA中控制ADC采样并完成锁相环计算操作，运行结果准确。
问题详情：因为开发需求，需要给一个标志位FlagPLL来进行锁相环的复位操作，在写入复位操作代码后，CLA卡死在CLASin函数语句。复位代码示例如下：
if(FlagPLL == 1){a = 0;b = 0;
}
此时FlagPLL = 0，意味着if语句后面的代码块不会被执行，但是当注释掉中间两句赋值代码后，CLA中的锁相环程序能够正常运行，代码示例如下：
if(FlagPLL == 1){
//a = 0;
//b = 0;
}
有大神知道这种问题因为哪个地方配置不对导致的吗？
Links：
您好，
已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
TMS320F28P550SG: 28P55ADC使用外部2.5V参考电压基准采样值不对
Part Number:TMS320F28P550SG
电路板 VREFHI链接外部参考电源芯片的2.5V，VREFLO接模拟地，AD引脚输入1.25V时ADC的转换结果大概只有1180，请帮忙看看ADC初始化哪里出了问题？谢谢
ADC的初始化程序如下：
AdcBaseAddr[0] = ADCA_BASE;
AdcBaseAddr[1] = ADCB_BASE;
AdcBaseAddr[2] = ADCC_BASE;
AdcBaseAddr[3] = ADCD_BASE;
AdcBaseAddr[4] = ADCE_BASE;
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCD);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCE);
EALLOW;
ASysCtl_disableTemperatureSensor();
// Set the analog voltage reference selection to external.
ASysCtl_setAnalogReferenceExternal(ASYSCTL_ANAREF_VREFHI_ADCA | ASYSCTL_ANAREF_VREFHI_ADCB | ASYSCTL_ANAREF_VREFHI_ADCC | ASYSCTL_ANAREF_VREFHI_ADCD | ASYSCTL_ANAREF_VREFHI_ADCE);
ASysCtl_setVrefHiReferenceVREFHI(ASYSCTL_ANAREF_VREFHI_ADCA | ASYSCTL_ANAREF_VREFHI_ADCB | ASYSCTL_ANAREF_VREFHI_ADCC | ASYSCTL_ANAREF_VREFHI_ADCD | ASYSCTL_ANAREF_VREFHI_ADCE);
ASysCtl_setVrefLoReferenceVREFLO(ASYSCTL_ANAREF_INTREF_ADCA | ASYSCTL_ANAREF_INTREF_ADCB | ASYSCTL_ANAREF_INTREF_ADCC | ASYSCTL_ANAREF_INTREF_ADCD | ASYSCTL_ANAREF_INTREF_ADCE);
//ASysCtl_setAnalogReference2P5( ASYSCTL_ANAREF_ADCA | ASYSCTL_ANAREF_ADCB | ASYSCTL_ANAREF_ADCC | ASYSCTL_ANAREF_ADCD | ASYSCTL_ANAREF_ADCE );// Set the internal analog voltage reference selection to 2.5V.
// ADC Initialization: Write ADC configurations and power up the ADC
for(i = 0; i < 5; i++)
{
ADC_setVREF(AdcBaseAddr[i], ADC_REFERENCE_EXTERNAL, ADC_REFERENCE_VREFHI);
//ADC_setOffsetTrim(AdcBaseAddr[i]);
ADC_setPrescaler(AdcBaseAddr[i], ADC_CLK_DIV_2_0);// Configures the analog-to-digital converter module prescaler.
ADC_setInterruptPulseMode(AdcBaseAddr[i], ADC_PULSE_END_OF_CONV);// Sets the timing of the end-of-conversion pulse
ADC_enableConverter(AdcBaseAddr[i]);// Powers up the analog-to-digital converter core.
DEVICE_DELAY_US(5000);// Delay for 1ms to allow ADC time to power up
//ADC_enableAltDMATiming(AdcBaseAddr[i]);// Enable alternate timings for DMA trigger
ADC_disableBurstMode(AdcBaseAddr[i]);// Disables SOC burst mode.
ADC_setSOCPriority(AdcBaseAddr[i], ADC_PRI_ALL_HIPRI);// Sets the priority mode of the SOCs.
}
DEVICE_DELAY_US(50000);
Links：
您好，
已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
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TMS320F28035: bootloader 将bin文件写入flash，跳转APP失败
Part Number:TMS320F28035
我用bootloader接收完程序后，进入跳转APP始地址后，bootloader程序会复位，重新进入引导程序，这是为什么？这是我CMD文件编写有问题吗？始地址为0x3e8100； APP的begin 为0x3e8100
Lydia：
您好， 已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
,
Alice：
您好，
Lingxin Meng 说：始地址为0x3e8100； APP的begin 为0x3e8100
是同一个地址吗？请重新说明一下。
关于程序无法运行，请检查BootLoader是否正确地进行擦除并烧写了，另一个是APP程序本身能否正常运行？
TMS320F280049C: 在CLA中调用sin/cos/sqrtf函数，程序会异常
Part Number:TMS320F280049C
在CLA中调用sin/cos/sqrtf函数，程序会异常
请问该如何解决？
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Lydia：
您好，
已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
LAUNCHXL-F28P55X: SCI_ex1加入EPWM失敗
Part Number:LAUNCHXL-F28P55XOther Parts Discussed in Thread:SYSCONFIG, C2000WARE
我在使用SCI的EX!後，想加入一個EPWM在PWM2A，也已經將設定調整至與成功過的專案一樣，但無法成功，以下是程式.c以及board.c
//###########################################################################
//
// FILE: sci_ex1_loopback.c
//
// TITLE: SCI FIFO Digital Loop Back.
//
//! \addtogroup driver_example_list
//! <h1>SCI FIFO Digital Loop Back</h1>
//!
//! This program uses the internal loop back test mode of the peripheral.
//! Other then boot mode pin configuration, no other hardware configuration
//! is required. The pinmux and SCI modules are configured through the//! sysconfig file.
//!
//! This test uses the loopback test mode of the SCI module to send
//! characters starting with 0x00 through 0xFF. The test will send
//! a character and then check the receive buffer for a correct match.
//!
//! \note This example project has support for migration across our C2000//! device families. If you are wanting to build this project from launchpad
//! or controlCARD, please specify in the .syscfg file the board you're using.
//! At any time you can select another device to migrate this example.
//!
//! \b Watch \b Variables \n
//! – \b loopCount – Number of characters sent
//! – \b errorCount – Number of errors detected
//! – \b sendChar – Character sent
//! – \b receivedChar – Character received
//!
//
//#############################################################################
//
//
//// C2000Ware v5.04.00.00
//
// Copyright (C) 2024 Texas Instruments Incorporated – http://www.ti.com
//
// Redistribution and use in source and binary forms, with or without// modification, are permitted provided that the following conditions// are met:
//// Redistributions of source code must retain the above copyright// notice, this list of conditions and the following disclaimer.
//// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the// documentation and/or other materials provided with the// distribution.
//// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
//
// Included Files
//
#include "driverlib.h"
#include "device.h"
#include "board.h"
//
// Globals
//
uint16_t loopCount;
uint16_t errorCount;
//
// Function Prototypes
//
void error();
//
// Main
//
void main(void)
{
uint16_t sendChar;
uint16_t receivedChar;
//
// Initialize device clock and peripherals
//
Device_init();
//
// Setup GPIO by disabling pin locks and enabling pullups
//
Device_initGPIO();
//
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
//
Interrupt_initModule();
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
//
Interrupt_initVectorTable();
//
// Board Initialization
//
Board_init();
EINT;
ERTM;
//
// Enables CPU interrupts
//
Interrupt_enableGlobal();
//
// Initialize counts
//
loopCount = 0;
errorCount = 0;
//
// Send a character starting with 0
//
sendChar = 0;
//
// Send Characters forever starting with 0x00 and going through 0xFF.
// After sending each, check the receive buffer for the correct value.
//
while(1)
{
SCI_writeCharNonBlocking(mySCI0_BASE, sendChar);
//
// Wait for RRDY/RXFFST = 1 for 1 data available in FIFO
//
while(SCI_getRxFIFOStatus(mySCI0_BASE) == SCI_FIFO_RX0)
{
;
}
//
// Check received character
//
receivedChar = SCI_readCharBlockingFIFO(mySCI0_BASE);
//
// Received character not correct
//
if(receivedChar != sendChar)
{
errorCount++;
// asm(" ESTOP0"); // Uncomment to stop the test here
for (;;);
}
//
// Move to the next character and repeat the test
//
sendChar++;
//
// Limit the character to 8-bits
//
sendChar &= 0x00FF;
loopCount++;
DEVICE_DELAY_US(50000);
}
}
//
// End of file
//
//=============================================board.c==============================================
/*
* Copyright (c) 2020 Texas Instruments Incorporated – http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "board.h"
//*****************************************************************************
//
// Board Configurations
// Initializes the rest of the modules.// Call this function in your application if you wish to do all module// initialization.
// If you wish to not use some of the initializations, instead of the// Board_init use the individual Module_inits
//
//*****************************************************************************
void Board_init()
{
EALLOW;
PinMux_init();
SYSCTL_init();
SYNC_init();
ASYSCTL_init();
MEMCFG_init();
DAC_init();
EPWM_init();
SCI_init();
EDIS;
}
//*****************************************************************************
//
// PINMUX Configurations
//
//*****************************************************************************
void PinMux_init()
{
//
// PinMux for modules assigned to CPU1
//
//
// ANALOG -> myANALOGPinMux0 Pinmux
//
// Analog PinMux for A0, B15, C15, DACA_OUT
GPIO_setPinConfig(GPIO_231_GPIO231);
// AIO -> Analog mode selected
GPIO_setAnalogMode(231, GPIO_ANALOG_ENABLED);
//
// EPWM2 -> myEPWM2 Pinmux
//
GPIO_setPinConfig(myEPWM2_EPWMA_PIN_CONFIG);
GPIO_setPadConfig(myEPWM2_EPWMA_GPIO, GPIO_PIN_TYPE_STD);
GPIO_setQualificationMode(myEPWM2_EPWMA_GPIO, GPIO_QUAL_SYNC);
GPIO_setPinConfig(myEPWM2_EPWMB_PIN_CONFIG);
GPIO_setPadConfig(myEPWM2_EPWMB_GPIO, GPIO_PIN_TYPE_STD);
GPIO_setQualificationMode(myEPWM2_EPWMB_GPIO, GPIO_QUAL_SYNC);
//
// SCIA -> mySCI0 Pinmux
//
GPIO_setPinConfig(mySCI0_SCIRX_PIN_CONFIG);
// AGPIO -> GPIO mode selected
GPIO_setAnalogMode(28, GPIO_ANALOG_DISABLED);
GPIO_setPadConfig(mySCI0_SCIRX_GPIO, GPIO_PIN_TYPE_STD | GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(mySCI0_SCIRX_GPIO, GPIO_QUAL_ASYNC);
GPIO_setPinConfig(mySCI0_SCITX_PIN_CONFIG);
GPIO_setPadConfig(mySCI0_SCITX_GPIO, GPIO_PIN_TYPE_STD | GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(mySCI0_SCITX_GPIO, GPIO_QUAL_ASYNC);
}
//*****************************************************************************
//
// ASYSCTL Configurations
//
//*****************************************************************************
void ASYSCTL_init(){
//
// asysctl initialization
//
// Disables the temperature sensor output to the ADC.
//
ASysCtl_disableTemperatureSensor();
//
// Set the analog voltage reference selection to external.
//
ASysCtl_setAnalogReferenceExternal( ASYSCTL_ANAREF_VREFHI_ADCA | ASYSCTL_ANAREF_VREFHI_ADCB | ASYSCTL_ANAREF_VREFHI_ADCC | ASYSCTL_ANAREF_VREFHI_ADCD | ASYSCTL_ANAREF_VREFHI_ADCE );
}
//*****************************************************************************
//
// DAC Configurations
//
//*****************************************************************************
void DAC_init(){
myDAC0_init();
}
void myDAC0_init(){
//
// Set DAC reference voltage.
//
DAC_setReferenceVoltage(myDAC0_BASE, DAC_REF_ADC_VREFHI);
//
// Set DAC gain mode.
//
DAC_setGainMode(myDAC0_BASE, DAC_GAIN_ONE);
//
// Set DAC load mode.
//
DAC_setLoadMode(myDAC0_BASE, DAC_LOAD_SYSCLK);
//
// Enable the DAC output
//
DAC_enableOutput(myDAC0_BASE);
//
// Set the DAC shadow output
//
DAC_setShadowValue(myDAC0_BASE, 2048U);
//
// Delay for buffered DAC to power up.
//
DEVICE_DELAY_US(500);
}
//*****************************************************************************
//
// EPWM Configurations
//
//*****************************************************************************
void EPWM_init(){
EPWM_setClockPrescaler(myEPWM2_BASE, EPWM_CLOCK_DIVIDER_1, EPWM_HSCLOCK_DIVIDER_2); EPWM_setTimeBasePeriod(myEPWM2_BASE, 7500); EPWM_enableGlobalLoadRegisters(myEPWM2_BASE, EPWM_GL_REGISTER_TBPRD_TBPRDHR); EPWM_setTimeBaseCounter(myEPWM2_BASE, 0); EPWM_setTimeBaseCounterMode(myEPWM2_BASE, EPWM_COUNTER_MODE_UP); EPWM_disablePhaseShiftLoad(myEPWM2_BASE); EPWM_setPhaseShift(myEPWM2_BASE, 0); EPWM_setSyncInPulseSource(myEPWM2_BASE, EPWM_SYNC_IN_PULSE_SRC_DISABLE); EPWM_setCounterCompareValue(myEPWM2_BASE, EPWM_COUNTER_COMPARE_A, 3750); EPWM_enableGlobalLoadRegisters(myEPWM2_BASE, EPWM_GL_REGISTER_CMPA_CMPAHR); EPWM_setCounterCompareShadowLoadMode(myEPWM2_BASE, EPWM_COUNTER_COMPARE_A, EPWM_COMP_LOAD_ON_CNTR_ZERO); EPWM_setCounterCompareValue(myEPWM2_BASE, EPWM_COUNTER_COMPARE_B, 0); EPWM_setCounterCompareShadowLoadMode(myEPWM2_BASE, EPWM_COUNTER_COMPARE_B, EPWM_COMP_LOAD_ON_CNTR_ZERO); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB); EPWM_setActionQualifierAction(myEPWM2_BASE, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_NO_CHANGE, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB); EPWM_setRisingEdgeDelayCountShadowLoadMode(myEPWM2_BASE, EPWM_RED_LOAD_ON_CNTR_ZERO); EPWM_disableRisingEdgeDelayCountShadowLoadMode(myEPWM2_BASE); EPWM_setFallingEdgeDelayCountShadowLoadMode(myEPWM2_BASE, EPWM_FED_LOAD_ON_CNTR_ZERO); EPWM_disableFallingEdgeDelayCountShadowLoadMode(myEPWM2_BASE); EPWM_enableADCTrigger(myEPWM2_BASE, EPWM_SOC_A); EPWM_setADCTriggerSource(myEPWM2_BASE, EPWM_SOC_A, EPWM_SOC_TBCTR_ZERO); EPWM_setADCTriggerEventPrescale(myEPWM2_BASE, EPWM_SOC_A, 1);}
//*****************************************************************************
//
// MEMCFG Configurations
//
//*****************************************************************************
void MEMCFG_init(){
//
// Initialize RAMs
//
//
// Configure LSRAMs
//
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS0, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS1, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS2, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS3, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS4, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS5, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS6, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS7, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS8, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS9, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
//
// Configure GSRAMs
//
//
// Configure Access Protection for RAMs
//
MemCfg_setProtection(MEMCFG_SECT_M0, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_M1, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS0, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS1, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS2, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS3, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS4, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS5, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS6, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS7, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS8, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS9, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_GS0, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE | MEMCFG_PROT_ALLOWDMAWRITE);
MemCfg_setProtection(MEMCFG_SECT_GS1, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE | MEMCFG_PROT_ALLOWDMAWRITE);
MemCfg_setProtection(MEMCFG_SECT_GS2, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE | MEMCFG_PROT_ALLOWDMAWRITE);
MemCfg_setProtection(MEMCFG_SECT_GS3, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE | MEMCFG_PROT_ALLOWDMAWRITE);
//
// Lock/Commit Registers
//
//
// Enable Access Violation Interrupt
//
//
// Correctable error Interrupt
//
MemCfg_setCorrErrorThreshold(0);
MemCfg_disableCorrErrorInterrupt(MEMCFG_CERR_CPUREAD);
}//*****************************************************************************
//
// SCI Configurations
//
//*****************************************************************************
void SCI_init(){
mySCI0_init();
}
void mySCI0_init(){
SCI_clearInterruptStatus(mySCI0_BASE, SCI_INT_RXFF | SCI_INT_TXFF | SCI_INT_FE | SCI_INT_OE | SCI_INT_PE | SCI_INT_RXERR | SCI_INT_RXRDY_BRKDT | SCI_INT_TXRDY);
SCI_clearOverflowStatus(mySCI0_BASE);
SCI_resetTxFIFO(mySCI0_BASE);
SCI_resetRxFIFO(mySCI0_BASE);
SCI_resetChannels(mySCI0_BASE);
SCI_setConfig(mySCI0_BASE, DEVICE_LSPCLK_FREQ, mySCI0_BAUDRATE, (SCI_CONFIG_WLEN_8|SCI_CONFIG_STOP_ONE|SCI_CONFIG_PAR_NONE));
SCI_enableLoopback(mySCI0_BASE);
SCI_performSoftwareReset(mySCI0_BASE);
SCI_setFIFOInterruptLevel(mySCI0_BASE, SCI_FIFO_TX0, SCI_FIFO_RX0);
SCI_enableFIFO(mySCI0_BASE);
SCI_enableModule(mySCI0_BASE);
}
//*****************************************************************************
//
// SYNC Scheme Configurations
//
//*****************************************************************************
void SYNC_init(){
SysCtl_setSyncOutputConfig(SYSCTL_SYNC_OUT_SRC_EPWM1SYNCOUT);
//
// SOCA
//
SysCtl_enableExtADCSOCSource(0);
//
// SOCB
//
SysCtl_enableExtADCSOCSource(0);
}
//*****************************************************************************
//
// SYSCTL Configurations
//
//*****************************************************************************
void SYSCTL_init(){
//
// sysctl initialization
//
SysCtl_setStandbyQualificationPeriod(2);
SysCtl_configureType(SYSCTL_USBTYPE, 0, 0);
SysCtl_configureType(SYSCTL_ECAPTYPE, 0, 0);
SysCtl_selectErrPinPolarity(0);
SysCtl_disableMCD();
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCB, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCB, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCB, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCC, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCC, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCC, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCD, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCD, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCD, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCE, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCE, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ADCE, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS1, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS1, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS1, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS2, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS2, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS2, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS3, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS3, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS3, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS4, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS4, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CMPSS4, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_DACA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_DACA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_DACA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PGA1, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PGA1, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PGA1, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PGA2, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PGA2, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PGA2, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PGA3, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PGA3, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PGA3, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM1, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM1, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM1, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM2, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM2, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM2, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM3, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM3, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM3, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM4, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM4, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM4, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM5, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM5, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM5, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM6, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM6, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM6, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM7, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM7, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM7, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM8, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM8, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM8, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM9, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM9, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM9, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM10, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM10, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM10, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM11, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM11, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM11, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM12, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM12, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EPWM12, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EQEP1, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EQEP1, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EQEP1, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EQEP2, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EQEP2, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EQEP2, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EQEP3, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EQEP3, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_EQEP3, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ECAP1, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ECAP1, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ECAP1, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ECAP2, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ECAP2, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_ECAP2, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CLB1, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CLB1, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CLB1, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CLB2, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CLB2, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_CLB2, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SCIA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SCIA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SCIA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SCIB, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SCIB, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SCIB, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SCIC, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SCIC, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SCIC, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SPIA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SPIA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SPIA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SPIB, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SPIB, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_SPIB, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_I2CA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_I2CA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_I2CA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_I2CB, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_I2CB, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_I2CB, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PMBUSA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PMBUSA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_PMBUSA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_LINA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_LINA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_LINA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_MCANA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_MCANA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_MCANA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_MCANB, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_MCANB, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_MCANB, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_FSIATX, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_FSIATX, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_FSIATX, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_FSIARX, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_FSIARX, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_FSIARX, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_USBA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_USBA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_USBA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_HRPWMA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_HRPWMA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_HRPWMA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_AESA, SYSCTL_ACCESS_CPU1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_AESA, SYSCTL_ACCESS_CLA1, SYSCTL_ACCESS_FULL);
SysCtl_setPeripheralAccessControl(SYSCTL_ACCESS_AESA, SYSCTL_ACCESS_DMA1, SYSCTL_ACCESS_FULL);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DMA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER0);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_HRCAL);
SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ERAD);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM3);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM4);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM5);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM6);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM7);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM8);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM9);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM10);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM11);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM12);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP3);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCANA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCANB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_USBA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_NPU);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCD);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCE);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS3);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS4);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PGA1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PGA2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PGA3);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSITXA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_LINA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PMBUSA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DCC0);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DCC1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_AESA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPG1);
}
tony：
sci_ex1_loopback.zip附上完整專案
,
Taylor：
您好，
已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
LAUNCHXL-F280049C: SPI FIFO 主从通信问题
Part Number:LAUNCHXL-F280049C
两块开发板 SPI fifo 主从通讯
master主机：使用FIFO发送
uint16_t sData[16] = {0x111,0x222,0x333,0x444,0x555,0x666,0x777,0x888,0x999,0xaaa,0xbbb,0xccc,0xddd,0xeee,0xa5a5,0xb6b6}; // Send data buffer
slave从机:FIFO接收
中断接收
问题点 1：接收到的数据缺少最后一个 0xB6B6
问题2：接收数据错位 ，正确的应该是应该是 0x0111-0xEEE 0xA5A5 0xB6B6
请问是哪里配置有问题吗？
Taylor：
您好，
已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
TMS320F280049C: Flash Driver 与主体应用程序分开，写入指定地址空间的实现方式和接口调用方法？
Part Number:TMS320F280049C
客户要求，Flash Driver和主体应用程序的Flash存储位置是分开的，独立的；通过boot可以单独更新flash driver或者主题应用程序。
ST的案例操作方式：
ST提供每个Flash Driver接口函数对应的16进制数据，可以这些文件写入指定的Flash存储位置；主体应用程序上电时，再将指定位置的16进制数据读取到RAM内，进行Flash Driver接口函数的调用。
TI的Flash Driver以Lib库的形式提过给用户，请问我应该怎样操作？
Taylor：
您好，
已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
TMS320F280039C: PMP41081 HLC问题
Part Number:TMS320F280039COther Parts Discussed in Thread:PMP41081
关于HLC有更详细的说明么？比如这个指令什么时候生效，具体做用是什么（是把counter 0 复位到0么）？
该例程是TI的PMP41081
Lydia：
您好，
已经收到了您的案例，调查需要些时间，感谢您的耐心等待。
,
Taylor：
可能没有太多这方面资料，最详细的就是应用手册了：
www.ti.com.cn/…/zhcae44a.pdf