TMS320C6678: DDR3阻抗设计

我在进行C6678的DDR3内存设计,在设计C6678的DDR电路时,DQ,DQS,CK的阻抗设计为40Ω,80Ω,80Ω.还是设计为50Ω,100Ω,100Ω.

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您好，

很理解您的这个疑惑，请参考下面的链接

(+) (+)TMS320C6678：DDR3 单端走线阻抗需要说明 – 处理器论坛 – 处理器 – TI E2E 支持论坛

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